2 * Copyright (C) ST-Ericsson SA 2013
4 * Author: Patrice Chotard <patrice.chotard@st.com>
5 * License terms: GNU General Public License (GPL) version 2
7 * Driver allows to use AxB5xx unused pins to be used as GPIO
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/slab.h>
16 #include <linux/init.h>
17 #include <linux/err.h>
19 #include <linux/of_device.h>
20 #include <linux/platform_device.h>
21 #include <linux/gpio.h>
22 #include <linux/irq.h>
23 #include <linux/irqdomain.h>
24 #include <linux/interrupt.h>
25 #include <linux/bitops.h>
26 #include <linux/mfd/abx500.h>
27 #include <linux/mfd/abx500/ab8500.h>
28 #include <linux/pinctrl/pinctrl.h>
29 #include <linux/pinctrl/consumer.h>
30 #include <linux/pinctrl/pinmux.h>
31 #include <linux/pinctrl/pinconf.h>
32 #include <linux/pinctrl/pinconf-generic.h>
33 #include <linux/pinctrl/machine.h>
35 #include "pinctrl-abx500.h"
37 #include "../pinconf.h"
38 #include "../pinctrl-utils.h"
41 * The AB9540 and AB8540 GPIO support are extended versions
42 * of the AB8500 GPIO support.
43 * The AB9540 supports an additional (7th) register so that
44 * more GPIO may be configured and used.
45 * The AB8540 supports 4 new gpios (GPIOx_VBAT) that have
46 * internal pull-up and pull-down capabilities.
50 * GPIO registers offset
53 #define AB8500_GPIO_SEL1_REG 0x00
54 #define AB8500_GPIO_SEL2_REG 0x01
55 #define AB8500_GPIO_SEL3_REG 0x02
56 #define AB8500_GPIO_SEL4_REG 0x03
57 #define AB8500_GPIO_SEL5_REG 0x04
58 #define AB8500_GPIO_SEL6_REG 0x05
59 #define AB9540_GPIO_SEL7_REG 0x06
61 #define AB8500_GPIO_DIR1_REG 0x10
62 #define AB8500_GPIO_DIR2_REG 0x11
63 #define AB8500_GPIO_DIR3_REG 0x12
64 #define AB8500_GPIO_DIR4_REG 0x13
65 #define AB8500_GPIO_DIR5_REG 0x14
66 #define AB8500_GPIO_DIR6_REG 0x15
67 #define AB9540_GPIO_DIR7_REG 0x16
69 #define AB8500_GPIO_OUT1_REG 0x20
70 #define AB8500_GPIO_OUT2_REG 0x21
71 #define AB8500_GPIO_OUT3_REG 0x22
72 #define AB8500_GPIO_OUT4_REG 0x23
73 #define AB8500_GPIO_OUT5_REG 0x24
74 #define AB8500_GPIO_OUT6_REG 0x25
75 #define AB9540_GPIO_OUT7_REG 0x26
77 #define AB8500_GPIO_PUD1_REG 0x30
78 #define AB8500_GPIO_PUD2_REG 0x31
79 #define AB8500_GPIO_PUD3_REG 0x32
80 #define AB8500_GPIO_PUD4_REG 0x33
81 #define AB8500_GPIO_PUD5_REG 0x34
82 #define AB8500_GPIO_PUD6_REG 0x35
83 #define AB9540_GPIO_PUD7_REG 0x36
85 #define AB8500_GPIO_IN1_REG 0x40
86 #define AB8500_GPIO_IN2_REG 0x41
87 #define AB8500_GPIO_IN3_REG 0x42
88 #define AB8500_GPIO_IN4_REG 0x43
89 #define AB8500_GPIO_IN5_REG 0x44
90 #define AB8500_GPIO_IN6_REG 0x45
91 #define AB9540_GPIO_IN7_REG 0x46
92 #define AB8540_GPIO_VINSEL_REG 0x47
93 #define AB8540_GPIO_PULL_UPDOWN_REG 0x48
94 #define AB8500_GPIO_ALTFUN_REG 0x50
95 #define AB8540_GPIO_PULL_UPDOWN_MASK 0x03
96 #define AB8540_GPIO_VINSEL_MASK 0x03
97 #define AB8540_GPIOX_VBAT_START 51
98 #define AB8540_GPIOX_VBAT_END 54
100 #define ABX500_GPIO_INPUT 0
101 #define ABX500_GPIO_OUTPUT 1
103 struct abx500_pinctrl
{
105 struct pinctrl_dev
*pctldev
;
106 struct abx500_pinctrl_soc_data
*soc
;
107 struct gpio_chip chip
;
108 struct ab8500
*parent
;
109 struct abx500_gpio_irq_cluster
*irq_cluster
;
110 int irq_cluster_size
;
113 static int abx500_gpio_get_bit(struct gpio_chip
*chip
, u8 reg
,
114 unsigned offset
, bool *bit
)
116 struct abx500_pinctrl
*pct
= gpiochip_get_data(chip
);
122 ret
= abx500_get_register_interruptible(pct
->dev
,
123 AB8500_MISC
, reg
, &val
);
125 *bit
= !!(val
& BIT(pos
));
129 "%s read reg =%x, offset=%x failed (%d)\n",
130 __func__
, reg
, offset
, ret
);
135 static int abx500_gpio_set_bits(struct gpio_chip
*chip
, u8 reg
,
136 unsigned offset
, int val
)
138 struct abx500_pinctrl
*pct
= gpiochip_get_data(chip
);
143 ret
= abx500_mask_and_set_register_interruptible(pct
->dev
,
144 AB8500_MISC
, reg
, BIT(pos
), val
<< pos
);
146 dev_err(pct
->dev
, "%s write reg, %x offset %x failed (%d)\n",
147 __func__
, reg
, offset
, ret
);
153 * abx500_gpio_get() - Get the particular GPIO value
155 * @offset: GPIO number to read
157 static int abx500_gpio_get(struct gpio_chip
*chip
, unsigned offset
)
159 struct abx500_pinctrl
*pct
= gpiochip_get_data(chip
);
162 u8 gpio_offset
= offset
- 1;
165 ret
= abx500_gpio_get_bit(chip
, AB8500_GPIO_DIR1_REG
,
166 gpio_offset
, &is_out
);
171 ret
= abx500_gpio_get_bit(chip
, AB8500_GPIO_OUT1_REG
,
174 ret
= abx500_gpio_get_bit(chip
, AB8500_GPIO_IN1_REG
,
178 dev_err(pct
->dev
, "%s failed (%d)\n", __func__
, ret
);
185 static void abx500_gpio_set(struct gpio_chip
*chip
, unsigned offset
, int val
)
187 struct abx500_pinctrl
*pct
= gpiochip_get_data(chip
);
190 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_OUT1_REG
, offset
, val
);
192 dev_err(pct
->dev
, "%s write failed (%d)\n", __func__
, ret
);
195 #ifdef CONFIG_DEBUG_FS
196 static int abx500_get_pull_updown(struct abx500_pinctrl
*pct
, int offset
,
197 enum abx500_gpio_pull_updown
*pull_updown
)
202 struct pullud
*pullud
;
204 if (!pct
->soc
->pullud
) {
205 dev_err(pct
->dev
, "%s AB chip doesn't support pull up/down feature",
211 pullud
= pct
->soc
->pullud
;
213 if ((offset
< pullud
->first_pin
)
214 || (offset
> pullud
->last_pin
)) {
219 ret
= abx500_get_register_interruptible(pct
->dev
,
220 AB8500_MISC
, AB8540_GPIO_PULL_UPDOWN_REG
, &val
);
222 pos
= (offset
- pullud
->first_pin
) << 1;
223 *pull_updown
= (val
>> pos
) & AB8540_GPIO_PULL_UPDOWN_MASK
;
227 dev_err(pct
->dev
, "%s failed (%d)\n", __func__
, ret
);
233 static int abx500_set_pull_updown(struct abx500_pinctrl
*pct
,
234 int offset
, enum abx500_gpio_pull_updown val
)
238 struct pullud
*pullud
;
240 if (!pct
->soc
->pullud
) {
241 dev_err(pct
->dev
, "%s AB chip doesn't support pull up/down feature",
247 pullud
= pct
->soc
->pullud
;
249 if ((offset
< pullud
->first_pin
)
250 || (offset
> pullud
->last_pin
)) {
254 pos
= (offset
- pullud
->first_pin
) << 1;
256 ret
= abx500_mask_and_set_register_interruptible(pct
->dev
,
257 AB8500_MISC
, AB8540_GPIO_PULL_UPDOWN_REG
,
258 AB8540_GPIO_PULL_UPDOWN_MASK
<< pos
, val
<< pos
);
262 dev_err(pct
->dev
, "%s failed (%d)\n", __func__
, ret
);
267 static bool abx500_pullud_supported(struct gpio_chip
*chip
, unsigned gpio
)
269 struct abx500_pinctrl
*pct
= gpiochip_get_data(chip
);
270 struct pullud
*pullud
= pct
->soc
->pullud
;
273 gpio
>= pullud
->first_pin
&&
274 gpio
<= pullud
->last_pin
);
277 static int abx500_gpio_direction_output(struct gpio_chip
*chip
,
281 struct abx500_pinctrl
*pct
= gpiochip_get_data(chip
);
285 /* set direction as output */
286 ret
= abx500_gpio_set_bits(chip
,
287 AB8500_GPIO_DIR1_REG
,
293 /* disable pull down */
294 ret
= abx500_gpio_set_bits(chip
,
295 AB8500_GPIO_PUD1_REG
,
297 ABX500_GPIO_PULL_NONE
);
301 /* if supported, disable both pull down and pull up */
303 if (abx500_pullud_supported(chip
, gpio
)) {
304 ret
= abx500_set_pull_updown(pct
,
306 ABX500_GPIO_PULL_NONE
);
310 dev_err(pct
->dev
, "%s failed (%d)\n", __func__
, ret
);
314 /* set the output as 1 or 0 */
315 return abx500_gpio_set_bits(chip
, AB8500_GPIO_OUT1_REG
, offset
, val
);
318 static int abx500_gpio_direction_input(struct gpio_chip
*chip
, unsigned offset
)
320 /* set the register as input */
321 return abx500_gpio_set_bits(chip
,
322 AB8500_GPIO_DIR1_REG
,
327 static int abx500_gpio_to_irq(struct gpio_chip
*chip
, unsigned offset
)
329 struct abx500_pinctrl
*pct
= gpiochip_get_data(chip
);
330 /* The AB8500 GPIO numbers are off by one */
331 int gpio
= offset
+ 1;
335 for (i
= 0; i
< pct
->irq_cluster_size
; i
++) {
336 struct abx500_gpio_irq_cluster
*cluster
=
337 &pct
->irq_cluster
[i
];
339 if (gpio
>= cluster
->start
&& gpio
<= cluster
->end
) {
341 * The ABx500 GPIO's associated IRQs are clustered together
342 * throughout the interrupt numbers at irregular intervals.
343 * To solve this quandry, we have placed the read-in values
344 * into the cluster information table.
346 hwirq
= gpio
- cluster
->start
+ cluster
->to_irq
;
347 return irq_create_mapping(pct
->parent
->domain
, hwirq
);
354 static int abx500_set_mode(struct pinctrl_dev
*pctldev
, struct gpio_chip
*chip
,
355 unsigned gpio
, int alt_setting
)
357 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
358 struct alternate_functions af
= pct
->soc
->alternate_functions
[gpio
];
363 const char *modes
[] = {
364 [ABX500_DEFAULT
] = "default",
365 [ABX500_ALT_A
] = "altA",
366 [ABX500_ALT_B
] = "altB",
367 [ABX500_ALT_C
] = "altC",
371 if (((alt_setting
== ABX500_ALT_A
) && (af
.gpiosel_bit
== UNUSED
)) ||
372 ((alt_setting
== ABX500_ALT_B
) && (af
.alt_bit1
== UNUSED
)) ||
373 ((alt_setting
== ABX500_ALT_C
) && (af
.alt_bit2
== UNUSED
))) {
374 dev_dbg(pct
->dev
, "pin %d doesn't support %s mode\n", gpio
,
379 /* on ABx5xx, there is no GPIO0, so adjust the offset */
382 switch (alt_setting
) {
385 * for ABx5xx family, default mode is always selected by
386 * writing 0 to GPIOSELx register, except for pins which
387 * support at least ALT_B mode, default mode is selected
388 * by writing 1 to GPIOSELx register
391 if (af
.alt_bit1
!= UNUSED
)
394 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_SEL1_REG
,
400 * for ABx5xx family, alt_a mode is always selected by
401 * writing 1 to GPIOSELx register, except for pins which
402 * support at least ALT_B mode, alt_a mode is selected
403 * by writing 0 to GPIOSELx register and 0 in ALTFUNC
406 if (af
.alt_bit1
!= UNUSED
) {
407 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_SEL1_REG
,
412 ret
= abx500_gpio_set_bits(chip
,
413 AB8500_GPIO_ALTFUN_REG
,
415 !!(af
.alta_val
& BIT(0)));
419 if (af
.alt_bit2
!= UNUSED
)
420 ret
= abx500_gpio_set_bits(chip
,
421 AB8500_GPIO_ALTFUN_REG
,
423 !!(af
.alta_val
& BIT(1)));
425 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_SEL1_REG
,
430 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_SEL1_REG
,
435 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_ALTFUN_REG
,
436 af
.alt_bit1
, !!(af
.altb_val
& BIT(0)));
440 if (af
.alt_bit2
!= UNUSED
)
441 ret
= abx500_gpio_set_bits(chip
,
442 AB8500_GPIO_ALTFUN_REG
,
444 !!(af
.altb_val
& BIT(1)));
448 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_SEL1_REG
,
453 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_ALTFUN_REG
,
454 af
.alt_bit2
, !!(af
.altc_val
& BIT(0)));
458 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_ALTFUN_REG
,
459 af
.alt_bit2
, !!(af
.altc_val
& BIT(1)));
463 dev_dbg(pct
->dev
, "unknown alt_setting %d\n", alt_setting
);
469 dev_err(pct
->dev
, "%s failed (%d)\n", __func__
, ret
);
474 #ifdef CONFIG_DEBUG_FS
475 static int abx500_get_mode(struct pinctrl_dev
*pctldev
, struct gpio_chip
*chip
,
482 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
483 struct alternate_functions af
= pct
->soc
->alternate_functions
[gpio
];
484 /* on ABx5xx, there is no GPIO0, so adjust the offset */
485 unsigned offset
= gpio
- 1;
489 * if gpiosel_bit is set to unused,
490 * it means no GPIO or special case
492 if (af
.gpiosel_bit
== UNUSED
)
493 return ABX500_DEFAULT
;
495 /* read GpioSelx register */
496 ret
= abx500_gpio_get_bit(chip
, AB8500_GPIO_SEL1_REG
+ (offset
/ 8),
497 af
.gpiosel_bit
, &bit_mode
);
504 if ((af
.alt_bit1
< UNUSED
) || (af
.alt_bit1
> 7) ||
505 (af
.alt_bit2
< UNUSED
) || (af
.alt_bit2
> 7)) {
507 "alt_bitX value not in correct range (-1 to 7)\n");
511 /* if alt_bit2 is used, alt_bit1 must be used too */
512 if ((af
.alt_bit2
!= UNUSED
) && (af
.alt_bit1
== UNUSED
)) {
514 "if alt_bit2 is used, alt_bit1 can't be unused\n");
518 /* check if pin use AlternateFunction register */
519 if ((af
.alt_bit1
== UNUSED
) && (af
.alt_bit2
== UNUSED
))
522 * if pin GPIOSEL bit is set and pin supports alternate function,
523 * it means DEFAULT mode
526 return ABX500_DEFAULT
;
529 * pin use the AlternatFunction register
530 * read alt_bit1 value
532 ret
= abx500_gpio_get_bit(chip
, AB8500_GPIO_ALTFUN_REG
,
533 af
.alt_bit1
, &alt_bit1
);
537 if (af
.alt_bit2
!= UNUSED
) {
538 /* read alt_bit2 value */
539 ret
= abx500_gpio_get_bit(chip
, AB8500_GPIO_ALTFUN_REG
,
547 mode
= (alt_bit2
<< 1) + alt_bit1
;
548 if (mode
== af
.alta_val
)
550 else if (mode
== af
.altb_val
)
556 dev_err(pct
->dev
, "%s failed (%d)\n", __func__
, ret
);
560 #include <linux/seq_file.h>
562 static void abx500_gpio_dbg_show_one(struct seq_file
*s
,
563 struct pinctrl_dev
*pctldev
,
564 struct gpio_chip
*chip
,
565 unsigned offset
, unsigned gpio
)
567 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
568 const char *label
= gpiochip_is_requested(chip
, offset
- 1);
569 u8 gpio_offset
= offset
- 1;
573 enum abx500_gpio_pull_updown pud
= 0;
576 const char *modes
[] = {
577 [ABX500_DEFAULT
] = "default",
578 [ABX500_ALT_A
] = "altA",
579 [ABX500_ALT_B
] = "altB",
580 [ABX500_ALT_C
] = "altC",
583 const char *pull_up_down
[] = {
584 [ABX500_GPIO_PULL_DOWN
] = "pull down",
585 [ABX500_GPIO_PULL_NONE
] = "pull none",
586 [ABX500_GPIO_PULL_NONE
+ 1] = "pull none",
587 [ABX500_GPIO_PULL_UP
] = "pull up",
590 ret
= abx500_gpio_get_bit(chip
, AB8500_GPIO_DIR1_REG
,
591 gpio_offset
, &is_out
);
595 seq_printf(s
, " gpio-%-3d (%-20.20s) %-3s",
596 gpio
, label
?: "(none)",
597 is_out
? "out" : "in ");
600 if (abx500_pullud_supported(chip
, offset
)) {
601 ret
= abx500_get_pull_updown(pct
, offset
, &pud
);
605 seq_printf(s
, " %-9s", pull_up_down
[pud
]);
607 ret
= abx500_gpio_get_bit(chip
, AB8500_GPIO_PUD1_REG
,
612 seq_printf(s
, " %-9s", pull_up_down
[pd
]);
615 seq_printf(s
, " %-9s", chip
->get(chip
, offset
) ? "hi" : "lo");
617 mode
= abx500_get_mode(pctldev
, chip
, offset
);
619 seq_printf(s
, " %s", (mode
< 0) ? "unknown" : modes
[mode
]);
623 dev_err(pct
->dev
, "%s failed (%d)\n", __func__
, ret
);
626 static void abx500_gpio_dbg_show(struct seq_file
*s
, struct gpio_chip
*chip
)
629 unsigned gpio
= chip
->base
;
630 struct abx500_pinctrl
*pct
= gpiochip_get_data(chip
);
631 struct pinctrl_dev
*pctldev
= pct
->pctldev
;
633 for (i
= 0; i
< chip
->ngpio
; i
++, gpio
++) {
634 /* On AB8500, there is no GPIO0, the first is the GPIO 1 */
635 abx500_gpio_dbg_show_one(s
, pctldev
, chip
, i
+ 1, gpio
);
641 static inline void abx500_gpio_dbg_show_one(struct seq_file
*s
,
642 struct pinctrl_dev
*pctldev
,
643 struct gpio_chip
*chip
,
644 unsigned offset
, unsigned gpio
)
647 #define abx500_gpio_dbg_show NULL
650 static const struct gpio_chip abx500gpio_chip
= {
651 .label
= "abx500-gpio",
652 .owner
= THIS_MODULE
,
653 .request
= gpiochip_generic_request
,
654 .free
= gpiochip_generic_free
,
655 .direction_input
= abx500_gpio_direction_input
,
656 .get
= abx500_gpio_get
,
657 .direction_output
= abx500_gpio_direction_output
,
658 .set
= abx500_gpio_set
,
659 .to_irq
= abx500_gpio_to_irq
,
660 .dbg_show
= abx500_gpio_dbg_show
,
663 static int abx500_pmx_get_funcs_cnt(struct pinctrl_dev
*pctldev
)
665 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
667 return pct
->soc
->nfunctions
;
670 static const char *abx500_pmx_get_func_name(struct pinctrl_dev
*pctldev
,
673 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
675 return pct
->soc
->functions
[function
].name
;
678 static int abx500_pmx_get_func_groups(struct pinctrl_dev
*pctldev
,
680 const char * const **groups
,
681 unsigned * const num_groups
)
683 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
685 *groups
= pct
->soc
->functions
[function
].groups
;
686 *num_groups
= pct
->soc
->functions
[function
].ngroups
;
691 static int abx500_pmx_set(struct pinctrl_dev
*pctldev
, unsigned function
,
694 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
695 struct gpio_chip
*chip
= &pct
->chip
;
696 const struct abx500_pingroup
*g
;
700 g
= &pct
->soc
->groups
[group
];
701 if (g
->altsetting
< 0)
704 dev_dbg(pct
->dev
, "enable group %s, %u pins\n", g
->name
, g
->npins
);
706 for (i
= 0; i
< g
->npins
; i
++) {
707 dev_dbg(pct
->dev
, "setting pin %d to altsetting %d\n",
708 g
->pins
[i
], g
->altsetting
);
710 ret
= abx500_set_mode(pctldev
, chip
, g
->pins
[i
], g
->altsetting
);
714 dev_err(pct
->dev
, "%s failed (%d)\n", __func__
, ret
);
719 static int abx500_gpio_request_enable(struct pinctrl_dev
*pctldev
,
720 struct pinctrl_gpio_range
*range
,
723 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
724 const struct abx500_pinrange
*p
;
729 * Different ranges have different ways to enable GPIO function on a
730 * pin, so refer back to our local range type, where we handily define
731 * what altfunc enables GPIO for a certain pin.
733 for (i
= 0; i
< pct
->soc
->gpio_num_ranges
; i
++) {
734 p
= &pct
->soc
->gpio_ranges
[i
];
735 if ((offset
>= p
->offset
) &&
736 (offset
< (p
->offset
+ p
->npins
)))
740 if (i
== pct
->soc
->gpio_num_ranges
) {
741 dev_err(pct
->dev
, "%s failed to locate range\n", __func__
);
745 dev_dbg(pct
->dev
, "enable GPIO by altfunc %d at gpio %d\n",
748 ret
= abx500_set_mode(pct
->pctldev
, &pct
->chip
,
751 dev_err(pct
->dev
, "%s setting altfunc failed\n", __func__
);
756 static void abx500_gpio_disable_free(struct pinctrl_dev
*pctldev
,
757 struct pinctrl_gpio_range
*range
,
762 static const struct pinmux_ops abx500_pinmux_ops
= {
763 .get_functions_count
= abx500_pmx_get_funcs_cnt
,
764 .get_function_name
= abx500_pmx_get_func_name
,
765 .get_function_groups
= abx500_pmx_get_func_groups
,
766 .set_mux
= abx500_pmx_set
,
767 .gpio_request_enable
= abx500_gpio_request_enable
,
768 .gpio_disable_free
= abx500_gpio_disable_free
,
771 static int abx500_get_groups_cnt(struct pinctrl_dev
*pctldev
)
773 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
775 return pct
->soc
->ngroups
;
778 static const char *abx500_get_group_name(struct pinctrl_dev
*pctldev
,
781 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
783 return pct
->soc
->groups
[selector
].name
;
786 static int abx500_get_group_pins(struct pinctrl_dev
*pctldev
,
788 const unsigned **pins
,
791 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
793 *pins
= pct
->soc
->groups
[selector
].pins
;
794 *num_pins
= pct
->soc
->groups
[selector
].npins
;
799 static void abx500_pin_dbg_show(struct pinctrl_dev
*pctldev
,
800 struct seq_file
*s
, unsigned offset
)
802 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
803 struct gpio_chip
*chip
= &pct
->chip
;
805 abx500_gpio_dbg_show_one(s
, pctldev
, chip
, offset
,
806 chip
->base
+ offset
- 1);
809 static int abx500_dt_add_map_mux(struct pinctrl_map
**map
,
810 unsigned *reserved_maps
,
811 unsigned *num_maps
, const char *group
,
812 const char *function
)
814 if (*num_maps
== *reserved_maps
)
817 (*map
)[*num_maps
].type
= PIN_MAP_TYPE_MUX_GROUP
;
818 (*map
)[*num_maps
].data
.mux
.group
= group
;
819 (*map
)[*num_maps
].data
.mux
.function
= function
;
825 static int abx500_dt_add_map_configs(struct pinctrl_map
**map
,
826 unsigned *reserved_maps
,
827 unsigned *num_maps
, const char *group
,
828 unsigned long *configs
, unsigned num_configs
)
830 unsigned long *dup_configs
;
832 if (*num_maps
== *reserved_maps
)
835 dup_configs
= kmemdup(configs
, num_configs
* sizeof(*dup_configs
),
840 (*map
)[*num_maps
].type
= PIN_MAP_TYPE_CONFIGS_PIN
;
842 (*map
)[*num_maps
].data
.configs
.group_or_pin
= group
;
843 (*map
)[*num_maps
].data
.configs
.configs
= dup_configs
;
844 (*map
)[*num_maps
].data
.configs
.num_configs
= num_configs
;
850 static const char *abx500_find_pin_name(struct pinctrl_dev
*pctldev
,
851 const char *pin_name
)
854 struct abx500_pinctrl
*npct
= pinctrl_dev_get_drvdata(pctldev
);
856 if (sscanf((char *)pin_name
, "GPIO%d", &pin_number
) == 1)
857 for (i
= 0; i
< npct
->soc
->npins
; i
++)
858 if (npct
->soc
->pins
[i
].number
== pin_number
)
859 return npct
->soc
->pins
[i
].name
;
863 static int abx500_dt_subnode_to_map(struct pinctrl_dev
*pctldev
,
864 struct device_node
*np
,
865 struct pinctrl_map
**map
,
866 unsigned *reserved_maps
,
870 const char *function
= NULL
;
871 unsigned long *configs
;
872 unsigned int nconfigs
= 0;
873 struct property
*prop
;
875 ret
= of_property_read_string(np
, "function", &function
);
879 ret
= of_property_count_strings(np
, "groups");
883 ret
= pinctrl_utils_reserve_map(pctldev
, map
, reserved_maps
,
888 of_property_for_each_string(np
, "groups", prop
, group
) {
889 ret
= abx500_dt_add_map_mux(map
, reserved_maps
,
890 num_maps
, group
, function
);
896 ret
= pinconf_generic_parse_dt_config(np
, pctldev
, &configs
, &nconfigs
);
898 const char *gpio_name
;
901 ret
= of_property_count_strings(np
, "pins");
905 ret
= pinctrl_utils_reserve_map(pctldev
, map
,
911 of_property_for_each_string(np
, "pins", prop
, pin
) {
912 gpio_name
= abx500_find_pin_name(pctldev
, pin
);
914 ret
= abx500_dt_add_map_configs(map
, reserved_maps
,
915 num_maps
, gpio_name
, configs
, 1);
925 static int abx500_dt_node_to_map(struct pinctrl_dev
*pctldev
,
926 struct device_node
*np_config
,
927 struct pinctrl_map
**map
, unsigned *num_maps
)
929 unsigned reserved_maps
;
930 struct device_node
*np
;
937 for_each_child_of_node(np_config
, np
) {
938 ret
= abx500_dt_subnode_to_map(pctldev
, np
, map
,
939 &reserved_maps
, num_maps
);
941 pinctrl_utils_free_map(pctldev
, *map
, *num_maps
);
949 static const struct pinctrl_ops abx500_pinctrl_ops
= {
950 .get_groups_count
= abx500_get_groups_cnt
,
951 .get_group_name
= abx500_get_group_name
,
952 .get_group_pins
= abx500_get_group_pins
,
953 .pin_dbg_show
= abx500_pin_dbg_show
,
954 .dt_node_to_map
= abx500_dt_node_to_map
,
955 .dt_free_map
= pinctrl_utils_free_map
,
958 static int abx500_pin_config_get(struct pinctrl_dev
*pctldev
,
960 unsigned long *config
)
965 static int abx500_pin_config_set(struct pinctrl_dev
*pctldev
,
967 unsigned long *configs
,
968 unsigned num_configs
)
970 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
971 struct gpio_chip
*chip
= &pct
->chip
;
975 enum pin_config_param param
;
976 enum pin_config_param argument
;
978 for (i
= 0; i
< num_configs
; i
++) {
979 param
= pinconf_to_config_param(configs
[i
]);
980 argument
= pinconf_to_config_argument(configs
[i
]);
982 dev_dbg(chip
->parent
, "pin %d [%#lx]: %s %s\n",
984 (param
== PIN_CONFIG_OUTPUT
) ? "output " : "input",
985 (param
== PIN_CONFIG_OUTPUT
) ?
986 (argument
? "high" : "low") :
987 (argument
? "pull up" : "pull down"));
989 /* on ABx500, there is no GPIO0, so adjust the offset */
993 case PIN_CONFIG_BIAS_DISABLE
:
994 ret
= abx500_gpio_direction_input(chip
, offset
);
998 * Some chips only support pull down, while some
999 * actually support both pull up and pull down. Such
1000 * chips have a "pullud" range specified for the pins
1001 * that support both features. If the pin is not
1002 * within that range, we fall back to the old bit set
1003 * that only support pull down.
1005 if (abx500_pullud_supported(chip
, pin
))
1006 ret
= abx500_set_pull_updown(pct
,
1008 ABX500_GPIO_PULL_NONE
);
1010 /* Chip only supports pull down */
1011 ret
= abx500_gpio_set_bits(chip
,
1012 AB8500_GPIO_PUD1_REG
, offset
,
1013 ABX500_GPIO_PULL_NONE
);
1016 case PIN_CONFIG_BIAS_PULL_DOWN
:
1017 ret
= abx500_gpio_direction_input(chip
, offset
);
1021 * if argument = 1 set the pull down
1022 * else clear the pull down
1023 * Some chips only support pull down, while some
1024 * actually support both pull up and pull down. Such
1025 * chips have a "pullud" range specified for the pins
1026 * that support both features. If the pin is not
1027 * within that range, we fall back to the old bit set
1028 * that only support pull down.
1030 if (abx500_pullud_supported(chip
, pin
))
1031 ret
= abx500_set_pull_updown(pct
,
1033 argument
? ABX500_GPIO_PULL_DOWN
:
1034 ABX500_GPIO_PULL_NONE
);
1036 /* Chip only supports pull down */
1037 ret
= abx500_gpio_set_bits(chip
,
1038 AB8500_GPIO_PUD1_REG
,
1040 argument
? ABX500_GPIO_PULL_DOWN
:
1041 ABX500_GPIO_PULL_NONE
);
1044 case PIN_CONFIG_BIAS_PULL_UP
:
1045 ret
= abx500_gpio_direction_input(chip
, offset
);
1049 * if argument = 1 set the pull up
1050 * else clear the pull up
1052 ret
= abx500_gpio_direction_input(chip
, offset
);
1054 * Some chips only support pull down, while some
1055 * actually support both pull up and pull down. Such
1056 * chips have a "pullud" range specified for the pins
1057 * that support both features. If the pin is not
1058 * within that range, do nothing
1060 if (abx500_pullud_supported(chip
, pin
))
1061 ret
= abx500_set_pull_updown(pct
,
1063 argument
? ABX500_GPIO_PULL_UP
:
1064 ABX500_GPIO_PULL_NONE
);
1067 case PIN_CONFIG_OUTPUT
:
1068 ret
= abx500_gpio_direction_output(chip
, offset
,
1073 dev_err(chip
->parent
,
1074 "illegal configuration requested\n");
1076 } /* for each config */
1079 dev_err(pct
->dev
, "%s failed (%d)\n", __func__
, ret
);
1084 static const struct pinconf_ops abx500_pinconf_ops
= {
1085 .pin_config_get
= abx500_pin_config_get
,
1086 .pin_config_set
= abx500_pin_config_set
,
1090 static struct pinctrl_desc abx500_pinctrl_desc
= {
1091 .name
= "pinctrl-abx500",
1092 .pctlops
= &abx500_pinctrl_ops
,
1093 .pmxops
= &abx500_pinmux_ops
,
1094 .confops
= &abx500_pinconf_ops
,
1095 .owner
= THIS_MODULE
,
1098 static int abx500_get_gpio_num(struct abx500_pinctrl_soc_data
*soc
)
1100 unsigned int lowest
= 0;
1101 unsigned int highest
= 0;
1102 unsigned int npins
= 0;
1106 * Compute number of GPIOs from the last SoC gpio range descriptors
1107 * These ranges may include "holes" but the GPIO number space shall
1108 * still be homogeneous, so we need to detect and account for any
1109 * such holes so that these are included in the number of GPIO pins.
1111 for (i
= 0; i
< soc
->gpio_num_ranges
; i
++) {
1114 const struct abx500_pinrange
*p
;
1116 p
= &soc
->gpio_ranges
[i
];
1118 gend
= p
->offset
+ p
->npins
- 1;
1121 /* First iteration, set start values */
1125 if (gstart
< lowest
)
1131 /* this gives the absolute number of pins */
1132 npins
= highest
- lowest
+ 1;
1136 static const struct of_device_id abx500_gpio_match
[] = {
1137 { .compatible
= "stericsson,ab8500-gpio", .data
= (void *)PINCTRL_AB8500
, },
1138 { .compatible
= "stericsson,ab8505-gpio", .data
= (void *)PINCTRL_AB8505
, },
1139 { .compatible
= "stericsson,ab8540-gpio", .data
= (void *)PINCTRL_AB8540
, },
1140 { .compatible
= "stericsson,ab9540-gpio", .data
= (void *)PINCTRL_AB9540
, },
1144 static int abx500_gpio_probe(struct platform_device
*pdev
)
1146 struct device_node
*np
= pdev
->dev
.of_node
;
1147 const struct of_device_id
*match
;
1148 struct abx500_pinctrl
*pct
;
1149 unsigned int id
= -1;
1154 dev_err(&pdev
->dev
, "gpio dt node missing\n");
1158 pct
= devm_kzalloc(&pdev
->dev
, sizeof(struct abx500_pinctrl
),
1162 "failed to allocate memory for pct\n");
1166 pct
->dev
= &pdev
->dev
;
1167 pct
->parent
= dev_get_drvdata(pdev
->dev
.parent
);
1168 pct
->chip
= abx500gpio_chip
;
1169 pct
->chip
.parent
= &pdev
->dev
;
1170 pct
->chip
.base
= -1; /* Dynamic allocation */
1172 match
= of_match_device(abx500_gpio_match
, &pdev
->dev
);
1174 dev_err(&pdev
->dev
, "gpio dt not matching\n");
1177 id
= (unsigned long)match
->data
;
1179 /* Poke in other ASIC variants here */
1181 case PINCTRL_AB8500
:
1182 abx500_pinctrl_ab8500_init(&pct
->soc
);
1184 case PINCTRL_AB8540
:
1185 abx500_pinctrl_ab8540_init(&pct
->soc
);
1187 case PINCTRL_AB9540
:
1188 abx500_pinctrl_ab9540_init(&pct
->soc
);
1190 case PINCTRL_AB8505
:
1191 abx500_pinctrl_ab8505_init(&pct
->soc
);
1194 dev_err(&pdev
->dev
, "Unsupported pinctrl sub driver (%d)\n", id
);
1199 dev_err(&pdev
->dev
, "Invalid SOC data\n");
1203 pct
->chip
.ngpio
= abx500_get_gpio_num(pct
->soc
);
1204 pct
->irq_cluster
= pct
->soc
->gpio_irq_cluster
;
1205 pct
->irq_cluster_size
= pct
->soc
->ngpio_irq_cluster
;
1207 ret
= gpiochip_add_data(&pct
->chip
, pct
);
1209 dev_err(&pdev
->dev
, "unable to add gpiochip: %d\n", ret
);
1212 dev_info(&pdev
->dev
, "added gpiochip\n");
1214 abx500_pinctrl_desc
.pins
= pct
->soc
->pins
;
1215 abx500_pinctrl_desc
.npins
= pct
->soc
->npins
;
1216 pct
->pctldev
= devm_pinctrl_register(&pdev
->dev
, &abx500_pinctrl_desc
,
1218 if (IS_ERR(pct
->pctldev
)) {
1220 "could not register abx500 pinctrl driver\n");
1221 ret
= PTR_ERR(pct
->pctldev
);
1224 dev_info(&pdev
->dev
, "registered pin controller\n");
1226 /* We will handle a range of GPIO pins */
1227 for (i
= 0; i
< pct
->soc
->gpio_num_ranges
; i
++) {
1228 const struct abx500_pinrange
*p
= &pct
->soc
->gpio_ranges
[i
];
1230 ret
= gpiochip_add_pin_range(&pct
->chip
,
1231 dev_name(&pdev
->dev
),
1232 p
->offset
- 1, p
->offset
, p
->npins
);
1237 platform_set_drvdata(pdev
, pct
);
1238 dev_info(&pdev
->dev
, "initialized abx500 pinctrl driver\n");
1243 gpiochip_remove(&pct
->chip
);
1248 * abx500_gpio_remove() - remove Ab8500-gpio driver
1249 * @pdev: Platform device registered
1251 static int abx500_gpio_remove(struct platform_device
*pdev
)
1253 struct abx500_pinctrl
*pct
= platform_get_drvdata(pdev
);
1255 gpiochip_remove(&pct
->chip
);
1259 static struct platform_driver abx500_gpio_driver
= {
1261 .name
= "abx500-gpio",
1262 .of_match_table
= abx500_gpio_match
,
1264 .probe
= abx500_gpio_probe
,
1265 .remove
= abx500_gpio_remove
,
1268 static int __init
abx500_gpio_init(void)
1270 return platform_driver_register(&abx500_gpio_driver
);
1272 core_initcall(abx500_gpio_init
);