2 * Exynos specific definitions for Samsung pinctrl and gpiolib driver.
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2012 Linaro Ltd
7 * http://www.linaro.org
9 * This file contains the Exynos specific definitions for the Samsung
10 * pinctrl/gpiolib interface drivers.
12 * Author: Thomas Abraham <thomas.ab@samsung.com>
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
20 #ifndef __PINCTRL_SAMSUNG_EXYNOS_H
21 #define __PINCTRL_SAMSUNG_EXYNOS_H
23 /* External GPIO and wakeup interrupt related definitions */
24 #define EXYNOS_GPIO_ECON_OFFSET 0x700
25 #define EXYNOS_GPIO_EFLTCON_OFFSET 0x800
26 #define EXYNOS_GPIO_EMASK_OFFSET 0x900
27 #define EXYNOS_GPIO_EPEND_OFFSET 0xA00
28 #define EXYNOS_WKUP_ECON_OFFSET 0xE00
29 #define EXYNOS_WKUP_EMASK_OFFSET 0xF00
30 #define EXYNOS_WKUP_EPEND_OFFSET 0xF40
31 #define EXYNOS7_WKUP_ECON_OFFSET 0x700
32 #define EXYNOS7_WKUP_EMASK_OFFSET 0x900
33 #define EXYNOS7_WKUP_EPEND_OFFSET 0xA00
34 #define EXYNOS_SVC_OFFSET 0xB08
36 /* helpers to access interrupt service register */
37 #define EXYNOS_SVC_GROUP_SHIFT 3
38 #define EXYNOS_SVC_GROUP_MASK 0x1f
39 #define EXYNOS_SVC_NUM_MASK 7
40 #define EXYNOS_SVC_GROUP(x) ((x >> EXYNOS_SVC_GROUP_SHIFT) & \
41 EXYNOS_SVC_GROUP_MASK)
43 /* Exynos specific external interrupt trigger types */
44 #define EXYNOS_EINT_LEVEL_LOW 0
45 #define EXYNOS_EINT_LEVEL_HIGH 1
46 #define EXYNOS_EINT_EDGE_FALLING 2
47 #define EXYNOS_EINT_EDGE_RISING 3
48 #define EXYNOS_EINT_EDGE_BOTH 4
49 #define EXYNOS_EINT_CON_MASK 0xF
50 #define EXYNOS_EINT_CON_LEN 4
52 #define EXYNOS_EINT_MAX_PER_BANK 8
53 #define EXYNOS_EINT_NR_WKUP_EINT
55 #define EXYNOS_PIN_BANK_EINTN(pins, reg, id) \
57 .type = &bank_type_off, \
60 .eint_type = EINT_TYPE_NONE, \
64 #define EXYNOS_PIN_BANK_EINTG(pins, reg, id, offs) \
66 .type = &bank_type_off, \
69 .eint_type = EINT_TYPE_GPIO, \
70 .eint_offset = offs, \
74 #define EXYNOS_PIN_BANK_EINTW(pins, reg, id, offs) \
76 .type = &bank_type_alive, \
79 .eint_type = EINT_TYPE_WKUP, \
80 .eint_offset = offs, \
84 #define EXYNOS5433_PIN_BANK_EINTG(pins, reg, id, offs) \
86 .type = &exynos5433_bank_type_off, \
89 .eint_type = EINT_TYPE_GPIO, \
90 .eint_offset = offs, \
94 #define EXYNOS5433_PIN_BANK_EINTW(pins, reg, id, offs) \
96 .type = &exynos5433_bank_type_alive, \
99 .eint_type = EINT_TYPE_WKUP, \
100 .eint_offset = offs, \
104 #define EXYNOS5433_PIN_BANK_EINTW_EXT(pins, reg, id, offs, pctl_idx) \
106 .type = &exynos5433_bank_type_alive, \
107 .pctl_offset = reg, \
109 .eint_type = EINT_TYPE_WKUP, \
110 .eint_offset = offs, \
112 .pctl_res_idx = pctl_idx, \
116 * struct exynos_weint_data: irq specific data for all the wakeup interrupts
117 * generated by the external wakeup interrupt controller.
118 * @irq: interrupt number within the domain.
119 * @bank: bank responsible for this interrupt
121 struct exynos_weint_data
{
123 struct samsung_pin_bank
*bank
;
127 * struct exynos_muxed_weint_data: irq specific data for muxed wakeup interrupts
128 * generated by the external wakeup interrupt controller.
129 * @nr_banks: count of banks being part of the mux
130 * @banks: array of banks being part of the mux
132 struct exynos_muxed_weint_data
{
133 unsigned int nr_banks
;
134 struct samsung_pin_bank
*banks
[];
137 int exynos_eint_gpio_init(struct samsung_pinctrl_drv_data
*d
);
138 int exynos_eint_wkup_init(struct samsung_pinctrl_drv_data
*d
);
139 void exynos_pinctrl_suspend(struct samsung_pinctrl_drv_data
*drvdata
);
140 void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data
*drvdata
);
141 struct samsung_retention_ctrl
*
142 exynos_retention_init(struct samsung_pinctrl_drv_data
*drvdata
,
143 const struct samsung_retention_data
*data
);
145 #endif /* __PINCTRL_SAMSUNG_EXYNOS_H */