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x86/speculation/mds: Fix documentation typo
[linux/fpc-iii.git] / drivers / staging / rtlwifi / efuse.c
blob6d5e657017c6a48ae781e62d88d46e503605bae7
1 /******************************************************************************
2 *
3 * Copyright(c) 2009-2012 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25 #include "wifi.h"
26 #include "efuse.h"
27 #include "pci.h"
28 #include <linux/export.h>
29
30 static const u8 MAX_PGPKT_SIZE = 9;
31 static const u8 PGPKT_DATA_SIZE = 8;
32 static const int EFUSE_MAX_SIZE = 512;
33
34 #define START_ADDRESS 0x1000
35 #define REG_MCUFWDL 0x0080
36
37 static const struct efuse_map RTL8712_SDIO_EFUSE_TABLE[] = {
38 {0, 0, 0, 2},
39 {0, 1, 0, 2},
40 {0, 2, 0, 2},
41 {1, 0, 0, 1},
42 {1, 0, 1, 1},
43 {1, 1, 0, 1},
44 {1, 1, 1, 3},
45 {1, 3, 0, 17},
46 {3, 3, 1, 48},
47 {10, 0, 0, 6},
48 {10, 3, 0, 1},
49 {10, 3, 1, 1},
50 {11, 0, 0, 28}
51 };
52
53 static void efuse_shadow_read_1byte(struct ieee80211_hw *hw, u16 offset,
54 u8 *value);
55 static void efuse_shadow_read_2byte(struct ieee80211_hw *hw, u16 offset,
56 u16 *value);
57 static void efuse_shadow_read_4byte(struct ieee80211_hw *hw, u16 offset,
58 u32 *value);
59 static void efuse_shadow_write_1byte(struct ieee80211_hw *hw, u16 offset,
60 u8 value);
61 static void efuse_shadow_write_2byte(struct ieee80211_hw *hw, u16 offset,
62 u16 value);
63 static void efuse_shadow_write_4byte(struct ieee80211_hw *hw, u16 offset,
64 u32 value);
65 static int efuse_one_byte_write(struct ieee80211_hw *hw, u16 addr,
66 u8 data);
67 static void efuse_read_all_map(struct ieee80211_hw *hw, u8 *efuse);
68 static int efuse_pg_packet_read(struct ieee80211_hw *hw, u8 offset,
69 u8 *data);
70 static int efuse_pg_packet_write(struct ieee80211_hw *hw, u8 offset,
71 u8 word_en, u8 *data);
72 static void efuse_word_enable_data_read(u8 word_en, u8 *sourdata,
73 u8 *targetdata);
74 static u8 enable_efuse_data_write(struct ieee80211_hw *hw,
75 u16 efuse_addr, u8 word_en, u8 *data);
76 static u16 efuse_get_current_size(struct ieee80211_hw *hw);
77 static u8 efuse_calculate_word_cnts(u8 word_en);
78
79 void efuse_initialize(struct ieee80211_hw *hw)
80 {
81 struct rtl_priv *rtlpriv = rtl_priv(hw);
82 u8 bytetemp;
83 u8 temp;
84
85 bytetemp = rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[SYS_FUNC_EN] + 1);
86 temp = bytetemp | 0x20;
87 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[SYS_FUNC_EN] + 1, temp);
88
89 bytetemp = rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[SYS_ISO_CTRL] + 1);
90 temp = bytetemp & 0xFE;
91 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[SYS_ISO_CTRL] + 1, temp);
92
93 bytetemp = rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_TEST] + 3);
94 temp = bytetemp | 0x80;
95 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_TEST] + 3, temp);
96
97 rtl_write_byte(rtlpriv, 0x2F8, 0x3);
98
99 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 3, 0x72);
100 }
101
102 u8 efuse_read_1byte(struct ieee80211_hw *hw, u16 address)
103 {
104 struct rtl_priv *rtlpriv = rtl_priv(hw);
105 u8 data;
106 u8 bytetemp;
107 u8 temp;
108 u32 k = 0;
109 const u32 efuse_len =
110 rtlpriv->cfg->maps[EFUSE_REAL_CONTENT_SIZE];
111
112 if (address < efuse_len) {
113 temp = address & 0xFF;
114 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 1,
115 temp);
116 bytetemp = rtl_read_byte(rtlpriv,
117 rtlpriv->cfg->maps[EFUSE_CTRL] + 2);
118 temp = ((address >> 8) & 0x03) | (bytetemp & 0xFC);
119 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 2,
120 temp);
121
122 bytetemp = rtl_read_byte(rtlpriv,
123 rtlpriv->cfg->maps[EFUSE_CTRL] + 3);
124 temp = bytetemp & 0x7F;
125 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 3,
126 temp);
127
128 bytetemp = rtl_read_byte(rtlpriv,
129 rtlpriv->cfg->maps[EFUSE_CTRL] + 3);
130 while (!(bytetemp & 0x80)) {
131 bytetemp =
132 rtl_read_byte(rtlpriv,
133 rtlpriv->cfg->maps[EFUSE_CTRL] + 3);
134 k++;
135 if (k == 1000) {
136 k = 0;
137 break;
138 }
139 }
140 data = rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL]);
141 return data;
142 }
143 return 0xFF;
144 }
145
146 void efuse_write_1byte(struct ieee80211_hw *hw, u16 address, u8 value)
147 {
148 struct rtl_priv *rtlpriv = rtl_priv(hw);
149 u8 bytetemp;
150 u8 temp;
151 u32 k = 0;
152 const u32 efuse_len =
153 rtlpriv->cfg->maps[EFUSE_REAL_CONTENT_SIZE];
154
155 RT_TRACE(rtlpriv, COMP_EFUSE, DBG_LOUD, "Addr=%x Data =%x\n",
156 address, value);
157
158 if (address < efuse_len) {
159 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL], value);
160
161 temp = address & 0xFF;
162 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 1,
163 temp);
164 bytetemp = rtl_read_byte(rtlpriv,
165 rtlpriv->cfg->maps[EFUSE_CTRL] + 2);
166
167 temp = ((address >> 8) & 0x03) | (bytetemp & 0xFC);
168 rtl_write_byte(rtlpriv,
169 rtlpriv->cfg->maps[EFUSE_CTRL] + 2, temp);
170
171 bytetemp = rtl_read_byte(rtlpriv,
172 rtlpriv->cfg->maps[EFUSE_CTRL] + 3);
173 temp = bytetemp | 0x80;
174 rtl_write_byte(rtlpriv,
175 rtlpriv->cfg->maps[EFUSE_CTRL] + 3, temp);
176
177 bytetemp = rtl_read_byte(rtlpriv,
178 rtlpriv->cfg->maps[EFUSE_CTRL] + 3);
179
180 while (bytetemp & 0x80) {
181 bytetemp =
182 rtl_read_byte(rtlpriv,
183 rtlpriv->cfg->maps[EFUSE_CTRL] + 3);
184 k++;
185 if (k == 100) {
186 k = 0;
187 break;
188 }
189 }
190 }
191 }
192
193 void read_efuse_byte(struct ieee80211_hw *hw, u16 _offset, u8 *pbuf)
194 {
195 struct rtl_priv *rtlpriv = rtl_priv(hw);
196 u32 value32;
197 u8 readbyte;
198 u16 retry;
199
200 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 1,
201 (_offset & 0xff));
202 readbyte = rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 2);
203 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 2,
204 ((_offset >> 8) & 0x03) | (readbyte & 0xfc));
205
206 readbyte = rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 3);
207 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 3,
208 (readbyte & 0x7f));
209
210 retry = 0;
211 value32 = rtl_read_dword(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL]);
212 while (!(((value32 >> 24) & 0xff) & 0x80) && (retry < 10000)) {
213 value32 = rtl_read_dword(rtlpriv,
214 rtlpriv->cfg->maps[EFUSE_CTRL]);
215 retry++;
216 }
217
218 udelay(50);
219 value32 = rtl_read_dword(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL]);
220
221 *pbuf = (u8)(value32 & 0xff);
222 }
223
224 void read_efuse(struct ieee80211_hw *hw, u16 _offset, u16 _size_byte, u8 *pbuf)
225 {
226 struct rtl_priv *rtlpriv = rtl_priv(hw);
227 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
228 u8 *efuse_tbl;
229 u8 rtemp8[1];
230 u16 efuse_addr = 0;
231 u8 offset, wren;
232 u8 u1temp = 0;
233 u16 i;
234 u16 j;
235 const u16 efuse_max_section =
236 rtlpriv->cfg->maps[EFUSE_MAX_SECTION_MAP];
237 const u32 efuse_len =
238 rtlpriv->cfg->maps[EFUSE_REAL_CONTENT_SIZE];
239 u16 **efuse_word;
240 u16 efuse_utilized = 0;
241 u8 efuse_usage;
242
243 if ((_offset + _size_byte) > rtlpriv->cfg->maps[EFUSE_HWSET_MAX_SIZE]) {
244 RT_TRACE(rtlpriv, COMP_EFUSE, DBG_LOUD,
245 "%s(): Invalid offset(%#x) with read bytes(%#x)!!\n",
246 __func__, _offset, _size_byte);
247 return;
248 }
249
250 /* allocate memory for efuse_tbl and efuse_word */
251 efuse_tbl = kzalloc(rtlpriv->cfg->maps[EFUSE_HWSET_MAX_SIZE] *
252 sizeof(u8), GFP_ATOMIC);
253 if (!efuse_tbl)
254 return;
255 efuse_word = kzalloc(EFUSE_MAX_WORD_UNIT * sizeof(u16 *), GFP_ATOMIC);
256 if (!efuse_word)
257 goto out;
258 for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) {
259 efuse_word[i] = kzalloc(efuse_max_section * sizeof(u16),
260 GFP_ATOMIC);
261 if (!efuse_word[i])
262 goto done;
263 }
264
265 for (i = 0; i < efuse_max_section; i++)
266 for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++)
267 efuse_word[j][i] = 0xFFFF;
268
269 read_efuse_byte(hw, efuse_addr, rtemp8);
270 if (*rtemp8 != 0xFF) {
271 efuse_utilized++;
272 RTPRINT(rtlpriv, FEEPROM, EFUSE_READ_ALL,
273 "Addr=%d\n", efuse_addr);
274 efuse_addr++;
275 }
276
277 while ((*rtemp8 != 0xFF) && (efuse_addr < efuse_len)) {
278 /* Check PG header for section num. */
279 if ((*rtemp8 & 0x1F) == 0x0F) {/* extended header */
280 u1temp = ((*rtemp8 & 0xE0) >> 5);
281 read_efuse_byte(hw, efuse_addr, rtemp8);
282
283 if ((*rtemp8 & 0x0F) == 0x0F) {
284 efuse_addr++;
285 read_efuse_byte(hw, efuse_addr, rtemp8);
286
287 if (*rtemp8 != 0xFF &&
288 (efuse_addr < efuse_len)) {
289 efuse_addr++;
290 }
291 continue;
292 } else {
293 offset = ((*rtemp8 & 0xF0) >> 1) | u1temp;
294 wren = (*rtemp8 & 0x0F);
295 efuse_addr++;
296 }
297 } else {
298 offset = ((*rtemp8 >> 4) & 0x0f);
299 wren = (*rtemp8 & 0x0f);
300 }
301
302 if (offset < efuse_max_section) {
303 RTPRINT(rtlpriv, FEEPROM, EFUSE_READ_ALL,
304 "offset-%d Worden=%x\n", offset, wren);
305
306 for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) {
307 if (!(wren & 0x01)) {
308 RTPRINT(rtlpriv, FEEPROM,
309 EFUSE_READ_ALL,
310 "Addr=%d\n", efuse_addr);
311
312 read_efuse_byte(hw, efuse_addr, rtemp8);
313 efuse_addr++;
314 efuse_utilized++;
315 efuse_word[i][offset] =
316 (*rtemp8 & 0xff);
317
318 if (efuse_addr >= efuse_len)
319 break;
320
321 RTPRINT(rtlpriv, FEEPROM,
322 EFUSE_READ_ALL,
323 "Addr=%d\n", efuse_addr);
324
325 read_efuse_byte(hw, efuse_addr, rtemp8);
326 efuse_addr++;
327 efuse_utilized++;
328 efuse_word[i][offset] |=
329 (((u16)*rtemp8 << 8) & 0xff00);
330
331 if (efuse_addr >= efuse_len)
332 break;
333 }
334
335 wren >>= 1;
336 }
337 }
338
339 RTPRINT(rtlpriv, FEEPROM, EFUSE_READ_ALL,
340 "Addr=%d\n", efuse_addr);
341 read_efuse_byte(hw, efuse_addr, rtemp8);
342 if (*rtemp8 != 0xFF && (efuse_addr < efuse_len)) {
343 efuse_utilized++;
344 efuse_addr++;
345 }
346 }
347
348 for (i = 0; i < efuse_max_section; i++) {
349 for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) {
350 efuse_tbl[(i * 8) + (j * 2)] =
351 (efuse_word[j][i] & 0xff);
352 efuse_tbl[(i * 8) + ((j * 2) + 1)] =
353 ((efuse_word[j][i] >> 8) & 0xff);
354 }
355 }
356
357 for (i = 0; i < _size_byte; i++)
358 pbuf[i] = efuse_tbl[_offset + i];
359
360 rtlefuse->efuse_usedbytes = efuse_utilized;
361 efuse_usage = (u8)((efuse_utilized * 100) / efuse_len);
362 rtlefuse->efuse_usedpercentage = efuse_usage;
363 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_EFUSE_BYTES,
364 (u8 *)&efuse_utilized);
365 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_EFUSE_USAGE,
366 &efuse_usage);
367 done:
368 for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++)
369 kfree(efuse_word[i]);
370 kfree(efuse_word);
371 out:
372 kfree(efuse_tbl);
373 }
374
375 bool efuse_shadow_update_chk(struct ieee80211_hw *hw)
376 {
377 struct rtl_priv *rtlpriv = rtl_priv(hw);
378 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
379 u8 section_idx, i, base;
380 u16 words_need = 0, hdr_num = 0, totalbytes, efuse_used;
381 bool wordchanged, result = true;
382
383 for (section_idx = 0; section_idx < 16; section_idx++) {
384 base = section_idx * 8;
385 wordchanged = false;
386
387 for (i = 0; i < 8; i = i + 2) {
388 if ((rtlefuse->efuse_map[EFUSE_INIT_MAP][base + i] !=
389 rtlefuse->efuse_map[EFUSE_MODIFY_MAP][base + i]) ||
390 (rtlefuse->efuse_map[EFUSE_INIT_MAP][base + i + 1] !=
391 rtlefuse->efuse_map[EFUSE_MODIFY_MAP][base + i +
392 1])) {
393 words_need++;
394 wordchanged = true;
395 }
396 }
397
398 if (wordchanged)
399 hdr_num++;
400 }
401
402 totalbytes = hdr_num + words_need * 2;
403 efuse_used = rtlefuse->efuse_usedbytes;
404
405 if ((totalbytes + efuse_used) >=
406 (EFUSE_MAX_SIZE - rtlpriv->cfg->maps[EFUSE_OOB_PROTECT_BYTES_LEN]))
407 result = false;
408
409 RT_TRACE(rtlpriv, COMP_EFUSE, DBG_LOUD,
410 "%s(): totalbytes(%#x), hdr_num(%#x), words_need(%#x), efuse_used(%d)\n",
411 __func__, totalbytes, hdr_num, words_need, efuse_used);
412
413 return result;
414 }
415
416 void efuse_shadow_read(struct ieee80211_hw *hw, u8 type,
417 u16 offset, u32 *value)
418 {
419 if (type == 1)
420 efuse_shadow_read_1byte(hw, offset, (u8 *)value);
421 else if (type == 2)
422 efuse_shadow_read_2byte(hw, offset, (u16 *)value);
423 else if (type == 4)
424 efuse_shadow_read_4byte(hw, offset, value);
425 }
426
427 void efuse_shadow_write(struct ieee80211_hw *hw, u8 type, u16 offset,
428 u32 value)
429 {
430 if (type == 1)
431 efuse_shadow_write_1byte(hw, offset, (u8)value);
432 else if (type == 2)
433 efuse_shadow_write_2byte(hw, offset, (u16)value);
434 else if (type == 4)
435 efuse_shadow_write_4byte(hw, offset, value);
436 }
437
438 bool efuse_shadow_update(struct ieee80211_hw *hw)
439 {
440 struct rtl_priv *rtlpriv = rtl_priv(hw);
441 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
442 u16 i, offset, base;
443 u8 word_en = 0x0F;
444 u8 first_pg = false;
445
446 RT_TRACE(rtlpriv, COMP_EFUSE, DBG_LOUD, "\n");
447
448 if (!efuse_shadow_update_chk(hw)) {
449 efuse_read_all_map(hw, &rtlefuse->efuse_map[EFUSE_INIT_MAP][0]);
450 memcpy(&rtlefuse->efuse_map[EFUSE_MODIFY_MAP][0],
451 &rtlefuse->efuse_map[EFUSE_INIT_MAP][0],
452 rtlpriv->cfg->maps[EFUSE_HWSET_MAX_SIZE]);
453
454 RT_TRACE(rtlpriv, COMP_EFUSE, DBG_LOUD,
455 "efuse out of capacity!!\n");
456 return false;
457 }
458 efuse_power_switch(hw, true, true);
459
460 for (offset = 0; offset < 16; offset++) {
461 word_en = 0x0F;
462 base = offset * 8;
463
464 for (i = 0; i < 8; i++) {
465 if (first_pg) {
466 word_en &= ~(BIT(i / 2));
467
468 rtlefuse->efuse_map[EFUSE_INIT_MAP][base + i] =
469 rtlefuse->efuse_map[EFUSE_MODIFY_MAP][base + i];
470 } else {
471 if (rtlefuse->efuse_map[EFUSE_INIT_MAP][base + i] !=
472 rtlefuse->efuse_map[EFUSE_MODIFY_MAP][base + i]) {
473 word_en &= ~(BIT(i / 2));
474
475 rtlefuse->efuse_map[EFUSE_INIT_MAP][base + i] =
476 rtlefuse->efuse_map[EFUSE_MODIFY_MAP][base + i];
477 }
478 }
479 }
480 if (word_en != 0x0F) {
481 u8 tmpdata[8];
482
483 memcpy(tmpdata,
484 &rtlefuse->efuse_map[EFUSE_MODIFY_MAP][base],
485 8);
486 RT_PRINT_DATA(rtlpriv, COMP_INIT, DBG_LOUD,
487 "U-efuse\n", tmpdata, 8);
488
489 if (!efuse_pg_packet_write(hw, (u8)offset, word_en,
490 tmpdata)) {
491 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
492 "PG section(%#x) fail!!\n", offset);
493 break;
494 }
495 }
496 }
497
498 efuse_power_switch(hw, true, false);
499 efuse_read_all_map(hw, &rtlefuse->efuse_map[EFUSE_INIT_MAP][0]);
500
501 memcpy(&rtlefuse->efuse_map[EFUSE_MODIFY_MAP][0],
502 &rtlefuse->efuse_map[EFUSE_INIT_MAP][0],
503 rtlpriv->cfg->maps[EFUSE_HWSET_MAX_SIZE]);
504
505 RT_TRACE(rtlpriv, COMP_EFUSE, DBG_LOUD, "\n");
506 return true;
507 }
508
509 void rtl_efuse_shadow_map_update(struct ieee80211_hw *hw)
510 {
511 struct rtl_priv *rtlpriv = rtl_priv(hw);
512 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
513
514 if (rtlefuse->autoload_failflag)
515 memset((&rtlefuse->efuse_map[EFUSE_INIT_MAP][0]),
516 0xFF, rtlpriv->cfg->maps[EFUSE_HWSET_MAX_SIZE]);
517 else
518 efuse_read_all_map(hw, &rtlefuse->efuse_map[EFUSE_INIT_MAP][0]);
519
520 memcpy(&rtlefuse->efuse_map[EFUSE_MODIFY_MAP][0],
521 &rtlefuse->efuse_map[EFUSE_INIT_MAP][0],
522 rtlpriv->cfg->maps[EFUSE_HWSET_MAX_SIZE]);
523 }
524
525 void efuse_force_write_vendor_id(struct ieee80211_hw *hw)
526 {
527 u8 tmpdata[8] = { 0xFF, 0xFF, 0xEC, 0x10, 0xFF, 0xFF, 0xFF, 0xFF };
528
529 efuse_power_switch(hw, true, true);
530
531 efuse_pg_packet_write(hw, 1, 0xD, tmpdata);
532
533 efuse_power_switch(hw, true, false);
534 }
535
536 void efuse_re_pg_section(struct ieee80211_hw *hw, u8 section_idx)
537 {
538 }
539
540 static void efuse_shadow_read_1byte(struct ieee80211_hw *hw,
541 u16 offset, u8 *value)
542 {
543 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
544 *value = rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset];
545 }
546
547 static void efuse_shadow_read_2byte(struct ieee80211_hw *hw,
548 u16 offset, u16 *value)
549 {
550 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
551
552 *value = rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset];
553 *value |= rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset + 1] << 8;
554 }
555
556 static void efuse_shadow_read_4byte(struct ieee80211_hw *hw,
557 u16 offset, u32 *value)
558 {
559 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
560
561 *value = rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset];
562 *value |= rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset + 1] << 8;
563 *value |= rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset + 2] << 16;
564 *value |= rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset + 3] << 24;
565 }
566
567 static void efuse_shadow_write_1byte(struct ieee80211_hw *hw,
568 u16 offset, u8 value)
569 {
570 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
571
572 rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset] = value;
573 }
574
575 static void efuse_shadow_write_2byte(struct ieee80211_hw *hw,
576 u16 offset, u16 value)
577 {
578 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
579
580 rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset] = value & 0x00FF;
581 rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset + 1] = value >> 8;
582 }
583
584 static void efuse_shadow_write_4byte(struct ieee80211_hw *hw,
585 u16 offset, u32 value)
586 {
587 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
588
589 rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset] =
590 (u8)(value & 0x000000FF);
591 rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset + 1] =
592 (u8)((value >> 8) & 0x0000FF);
593 rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset + 2] =
594 (u8)((value >> 16) & 0x00FF);
595 rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset + 3] =
596 (u8)((value >> 24) & 0xFF);
597 }
598
599 int efuse_one_byte_read(struct ieee80211_hw *hw, u16 addr, u8 *data)
600 {
601 struct rtl_priv *rtlpriv = rtl_priv(hw);
602 u8 tmpidx = 0;
603 int result;
604
605 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 1,
606 (u8)(addr & 0xff));
607 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 2,
608 ((u8)((addr >> 8) & 0x03)) |
609 (rtl_read_byte(rtlpriv,
610 rtlpriv->cfg->maps[EFUSE_CTRL] + 2) &
611 0xFC));
612
613 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 3, 0x72);
614
615 while (!(0x80 & rtl_read_byte(rtlpriv,
616 rtlpriv->cfg->maps[EFUSE_CTRL] + 3)) &&
617 (tmpidx < 100)) {
618 tmpidx++;
619 }
620
621 if (tmpidx < 100) {
622 *data = rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL]);
623 result = true;
624 } else {
625 *data = 0xff;
626 result = false;
627 }
628 return result;
629 }
630
631 static int efuse_one_byte_write(struct ieee80211_hw *hw, u16 addr, u8 data)
632 {
633 struct rtl_priv *rtlpriv = rtl_priv(hw);
634 u8 tmpidx = 0;
635
636 RT_TRACE(rtlpriv, COMP_EFUSE, DBG_LOUD,
637 "Addr = %x Data=%x\n", addr, data);
638
639 rtl_write_byte(rtlpriv,
640 rtlpriv->cfg->maps[EFUSE_CTRL] + 1, (u8)(addr & 0xff));
641 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 2,
642 (rtl_read_byte(rtlpriv,
643 rtlpriv->cfg->maps[EFUSE_CTRL] +
644 2) & 0xFC) | (u8)((addr >> 8) & 0x03));
645
646 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL], data);
647 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 3, 0xF2);
648
649 while ((0x80 &
650 rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 3)) &&
651 (tmpidx < 100)) {
652 tmpidx++;
653 }
654
655 if (tmpidx < 100)
656 return true;
657 return false;
658 }
659
660 static void efuse_read_all_map(struct ieee80211_hw *hw, u8 *efuse)
661 {
662 struct rtl_priv *rtlpriv = rtl_priv(hw);
663
664 efuse_power_switch(hw, false, true);
665 read_efuse(hw, 0, rtlpriv->cfg->maps[EFUSE_HWSET_MAX_SIZE], efuse);
666 efuse_power_switch(hw, false, false);
667 }
668
669 static void efuse_read_data_case1(struct ieee80211_hw *hw, u16 *efuse_addr,
670 u8 efuse_data, u8 offset, u8 *tmpdata,
671 u8 *readstate)
672 {
673 bool dataempty = true;
674 u8 hoffset;
675 u8 tmpidx;
676 u8 hworden;
677 u8 word_cnts;
678
679 hoffset = (efuse_data >> 4) & 0x0F;
680 hworden = efuse_data & 0x0F;
681 word_cnts = efuse_calculate_word_cnts(hworden);
682
683 if (hoffset == offset) {
684 for (tmpidx = 0; tmpidx < word_cnts * 2; tmpidx++) {
685 if (efuse_one_byte_read(hw, *efuse_addr + 1 + tmpidx,
686 &efuse_data)) {
687 tmpdata[tmpidx] = efuse_data;
688 if (efuse_data != 0xff)
689 dataempty = false;
690 }
691 }
692
693 if (!dataempty) {
694 *readstate = PG_STATE_DATA;
695 } else {
696 *efuse_addr = *efuse_addr + (word_cnts * 2) + 1;
697 *readstate = PG_STATE_HEADER;
698 }
699
700 } else {
701 *efuse_addr = *efuse_addr + (word_cnts * 2) + 1;
702 *readstate = PG_STATE_HEADER;
703 }
704 }
705
706 static int efuse_pg_packet_read(struct ieee80211_hw *hw, u8 offset, u8 *data)
707 {
708 u8 readstate = PG_STATE_HEADER;
709
710 bool continual = true;
711
712 u8 efuse_data, word_cnts = 0;
713 u16 efuse_addr = 0;
714 u8 tmpdata[8];
715
716 if (!data)
717 return false;
718 if (offset > 15)
719 return false;
720
721 memset(data, 0xff, PGPKT_DATA_SIZE * sizeof(u8));
722 memset(tmpdata, 0xff, PGPKT_DATA_SIZE * sizeof(u8));
723
724 while (continual && (efuse_addr < EFUSE_MAX_SIZE)) {
725 if (readstate & PG_STATE_HEADER) {
726 if (efuse_one_byte_read(hw, efuse_addr, &efuse_data) &&
727 (efuse_data != 0xFF))
728 efuse_read_data_case1(hw, &efuse_addr,
729 efuse_data, offset,
730 tmpdata, &readstate);
731 else
732 continual = false;
733 } else if (readstate & PG_STATE_DATA) {
734 efuse_word_enable_data_read(0, tmpdata, data);
735 efuse_addr = efuse_addr + (word_cnts * 2) + 1;
736 readstate = PG_STATE_HEADER;
737 }
738 }
739
740 if ((data[0] == 0xff) && (data[1] == 0xff) &&
741 (data[2] == 0xff) && (data[3] == 0xff) &&
742 (data[4] == 0xff) && (data[5] == 0xff) &&
743 (data[6] == 0xff) && (data[7] == 0xff))
744 return false;
745 return true;
746 }
747
748 static void efuse_write_data_case1(struct ieee80211_hw *hw, u16 *efuse_addr,
749 u8 efuse_data, u8 offset,
750 int *continual, u8 *write_state,
751 struct pgpkt_struct *target_pkt,
752 int *repeat_times, int *result, u8 word_en)
753 {
754 struct rtl_priv *rtlpriv = rtl_priv(hw);
755 struct pgpkt_struct tmp_pkt;
756 int dataempty = true;
757 u8 originaldata[8 * sizeof(u8)];
758 u8 badworden = 0x0F;
759 u8 match_word_en, tmp_word_en;
760 u8 tmpindex;
761 u8 tmp_header = efuse_data;
762 u8 tmp_word_cnts;
763
764 tmp_pkt.offset = (tmp_header >> 4) & 0x0F;
765 tmp_pkt.word_en = tmp_header & 0x0F;
766 tmp_word_cnts = efuse_calculate_word_cnts(tmp_pkt.word_en);
767
768 if (tmp_pkt.offset != target_pkt->offset) {
769 *efuse_addr = *efuse_addr + (tmp_word_cnts * 2) + 1;
770 *write_state = PG_STATE_HEADER;
771 } else {
772 for (tmpindex = 0; tmpindex < (tmp_word_cnts * 2); tmpindex++) {
773 if (efuse_one_byte_read(hw,
774 (*efuse_addr + 1 + tmpindex),
775 &efuse_data) &&
776 (efuse_data != 0xFF))
777 dataempty = false;
778 }
779
780 if (!dataempty) {
781 *efuse_addr = *efuse_addr + (tmp_word_cnts * 2) + 1;
782 *write_state = PG_STATE_HEADER;
783 } else {
784 match_word_en = 0x0F;
785 if (!((target_pkt->word_en & BIT(0)) |
786 (tmp_pkt.word_en & BIT(0))))
787 match_word_en &= (~BIT(0));
788
789 if (!((target_pkt->word_en & BIT(1)) |
790 (tmp_pkt.word_en & BIT(1))))
791 match_word_en &= (~BIT(1));
792
793 if (!((target_pkt->word_en & BIT(2)) |
794 (tmp_pkt.word_en & BIT(2))))
795 match_word_en &= (~BIT(2));
796
797 if (!((target_pkt->word_en & BIT(3)) |
798 (tmp_pkt.word_en & BIT(3))))
799 match_word_en &= (~BIT(3));
800
801 if ((match_word_en & 0x0F) != 0x0F) {
802 badworden =
803 enable_efuse_data_write(hw,
804 *efuse_addr + 1,
805 tmp_pkt.word_en,
806 target_pkt->data);
807
808 if (0x0F != (badworden & 0x0F)) {
809 u8 reorg_offset = offset;
810 u8 reorg_worden = badworden;
811
812 efuse_pg_packet_write(hw, reorg_offset,
813 reorg_worden,
814 originaldata);
815 }
816
817 tmp_word_en = 0x0F;
818 if ((target_pkt->word_en & BIT(0)) ^
819 (match_word_en & BIT(0)))
820 tmp_word_en &= (~BIT(0));
821
822 if ((target_pkt->word_en & BIT(1)) ^
823 (match_word_en & BIT(1)))
824 tmp_word_en &= (~BIT(1));
825
826 if ((target_pkt->word_en & BIT(2)) ^
827 (match_word_en & BIT(2)))
828 tmp_word_en &= (~BIT(2));
829
830 if ((target_pkt->word_en & BIT(3)) ^
831 (match_word_en & BIT(3)))
832 tmp_word_en &= (~BIT(3));
833
834 if ((tmp_word_en & 0x0F) != 0x0F) {
835 *efuse_addr =
836 efuse_get_current_size(hw);
837 target_pkt->offset = offset;
838 target_pkt->word_en = tmp_word_en;
839 } else {
840 *continual = false;
841 }
842 *write_state = PG_STATE_HEADER;
843 *repeat_times += 1;
844 if (*repeat_times > EFUSE_REPEAT_THRESHOLD_) {
845 *continual = false;
846 *result = false;
847 }
848 } else {
849 *efuse_addr += (2 * tmp_word_cnts) + 1;
850 target_pkt->offset = offset;
851 target_pkt->word_en = word_en;
852 *write_state = PG_STATE_HEADER;
853 }
854 }
855 }
856 RTPRINT(rtlpriv, FEEPROM, EFUSE_PG, "efuse PG_STATE_HEADER-1\n");
857 }
858
859 static void efuse_write_data_case2(struct ieee80211_hw *hw, u16 *efuse_addr,
860 int *continual, u8 *write_state,
861 struct pgpkt_struct target_pkt,
862 int *repeat_times, int *result)
863 {
864 struct rtl_priv *rtlpriv = rtl_priv(hw);
865 struct pgpkt_struct tmp_pkt;
866 u8 pg_header;
867 u8 tmp_header;
868 u8 originaldata[8 * sizeof(u8)];
869 u8 tmp_word_cnts;
870 u8 badworden = 0x0F;
871
872 pg_header = ((target_pkt.offset << 4) & 0xf0) | target_pkt.word_en;
873 efuse_one_byte_write(hw, *efuse_addr, pg_header);
874 efuse_one_byte_read(hw, *efuse_addr, &tmp_header);
875
876 if (tmp_header == pg_header) {
877 *write_state = PG_STATE_DATA;
878 } else if (tmp_header == 0xFF) {
879 *write_state = PG_STATE_HEADER;
880 *repeat_times += 1;
881 if (*repeat_times > EFUSE_REPEAT_THRESHOLD_) {
882 *continual = false;
883 *result = false;
884 }
885 } else {
886 tmp_pkt.offset = (tmp_header >> 4) & 0x0F;
887 tmp_pkt.word_en = tmp_header & 0x0F;
888
889 tmp_word_cnts = efuse_calculate_word_cnts(tmp_pkt.word_en);
890
891 memset(originaldata, 0xff, 8 * sizeof(u8));
892
893 if (efuse_pg_packet_read(hw, tmp_pkt.offset, originaldata)) {
894 badworden = enable_efuse_data_write(hw,
895 *efuse_addr + 1,
896 tmp_pkt.word_en,
897 originaldata);
898
899 if (0x0F != (badworden & 0x0F)) {
900 u8 reorg_offset = tmp_pkt.offset;
901 u8 reorg_worden = badworden;
902
903 efuse_pg_packet_write(hw, reorg_offset,
904 reorg_worden,
905 originaldata);
906 *efuse_addr = efuse_get_current_size(hw);
907 } else {
908 *efuse_addr = *efuse_addr +
909 (tmp_word_cnts * 2) + 1;
910 }
911 } else {
912 *efuse_addr = *efuse_addr + (tmp_word_cnts * 2) + 1;
913 }
914
915 *write_state = PG_STATE_HEADER;
916 *repeat_times += 1;
917 if (*repeat_times > EFUSE_REPEAT_THRESHOLD_) {
918 *continual = false;
919 *result = false;
920 }
921
922 RTPRINT(rtlpriv, FEEPROM, EFUSE_PG,
923 "efuse PG_STATE_HEADER-2\n");
924 }
925 }
926
927 static int efuse_pg_packet_write(struct ieee80211_hw *hw,
928 u8 offset, u8 word_en, u8 *data)
929 {
930 struct rtl_priv *rtlpriv = rtl_priv(hw);
931 struct pgpkt_struct target_pkt;
932 u8 write_state = PG_STATE_HEADER;
933 int continual = true, dataempty = true, result = true;
934 u16 efuse_addr = 0;
935 u8 efuse_data;
936 u8 target_word_cnts = 0;
937 u8 badworden = 0x0F;
938 static int repeat_times;
939
940 if (efuse_get_current_size(hw) >= (EFUSE_MAX_SIZE -
941 rtlpriv->cfg->maps[EFUSE_OOB_PROTECT_BYTES_LEN])) {
942 RTPRINT(rtlpriv, FEEPROM, EFUSE_PG,
943 "%s error\n", __func__);
944 return false;
945 }
946
947 target_pkt.offset = offset;
948 target_pkt.word_en = word_en;
949
950 memset(target_pkt.data, 0xFF, 8 * sizeof(u8));
951
952 efuse_word_enable_data_read(word_en, data, target_pkt.data);
953 target_word_cnts = efuse_calculate_word_cnts(target_pkt.word_en);
954
955 RTPRINT(rtlpriv, FEEPROM, EFUSE_PG, "efuse Power ON\n");
956
957 while (continual && (efuse_addr < (EFUSE_MAX_SIZE -
958 rtlpriv->cfg->maps[EFUSE_OOB_PROTECT_BYTES_LEN]))) {
959 if (write_state == PG_STATE_HEADER) {
960 dataempty = true;
961 badworden = 0x0F;
962 RTPRINT(rtlpriv, FEEPROM, EFUSE_PG,
963 "efuse PG_STATE_HEADER\n");
964
965 if (efuse_one_byte_read(hw, efuse_addr, &efuse_data) &&
966 (efuse_data != 0xFF))
967 efuse_write_data_case1(hw, &efuse_addr,
968 efuse_data, offset,
969 &continual,
970 &write_state,
971 &target_pkt,
972 &repeat_times, &result,
973 word_en);
974 else
975 efuse_write_data_case2(hw, &efuse_addr,
976 &continual,
977 &write_state,
978 target_pkt,
979 &repeat_times,
980 &result);
981
982 } else if (write_state == PG_STATE_DATA) {
983 RTPRINT(rtlpriv, FEEPROM, EFUSE_PG,
984 "efuse PG_STATE_DATA\n");
985 badworden = 0x0f;
986 badworden =
987 enable_efuse_data_write(hw, efuse_addr + 1,
988 target_pkt.word_en,
989 target_pkt.data);
990
991 if ((badworden & 0x0F) == 0x0F) {
992 continual = false;
993 } else {
994 efuse_addr =
995 efuse_addr + (2 * target_word_cnts) + 1;
996
997 target_pkt.offset = offset;
998 target_pkt.word_en = badworden;
999 target_word_cnts =
1000 efuse_calculate_word_cnts(target_pkt.word_en);
1001 write_state = PG_STATE_HEADER;
1002 repeat_times++;
1003 if (repeat_times > EFUSE_REPEAT_THRESHOLD_) {
1004 continual = false;
1005 result = false;
1006 }
1007 RTPRINT(rtlpriv, FEEPROM, EFUSE_PG,
1008 "efuse PG_STATE_HEADER-3\n");
1009 }
1010 }
1011 }
1012
1013 if (efuse_addr >= (EFUSE_MAX_SIZE -
1014 rtlpriv->cfg->maps[EFUSE_OOB_PROTECT_BYTES_LEN])) {
1015 RT_TRACE(rtlpriv, COMP_EFUSE, DBG_LOUD,
1016 "efuse_addr(%#x) Out of size!!\n", efuse_addr);
1017 }
1018
1019 return true;
1020 }
1021
1022 static void efuse_word_enable_data_read(u8 word_en, u8 *sourdata,
1023 u8 *targetdata)
1024 {
1025 if (!(word_en & BIT(0))) {
1026 targetdata[0] = sourdata[0];
1027 targetdata[1] = sourdata[1];
1028 }
1029
1030 if (!(word_en & BIT(1))) {
1031 targetdata[2] = sourdata[2];
1032 targetdata[3] = sourdata[3];
1033 }
1034
1035 if (!(word_en & BIT(2))) {
1036 targetdata[4] = sourdata[4];
1037 targetdata[5] = sourdata[5];
1038 }
1039
1040 if (!(word_en & BIT(3))) {
1041 targetdata[6] = sourdata[6];
1042 targetdata[7] = sourdata[7];
1043 }
1044 }
1045
1046 static u8 enable_efuse_data_write(struct ieee80211_hw *hw,
1047 u16 efuse_addr, u8 word_en, u8 *data)
1048 {
1049 struct rtl_priv *rtlpriv = rtl_priv(hw);
1050 u16 tmpaddr;
1051 u16 start_addr = efuse_addr;
1052 u8 badworden = 0x0F;
1053 u8 tmpdata[8];
1054
1055 memset(tmpdata, 0xff, PGPKT_DATA_SIZE);
1056 RT_TRACE(rtlpriv, COMP_EFUSE, DBG_LOUD,
1057 "word_en = %x efuse_addr=%x\n", word_en, efuse_addr);
1058
1059 if (!(word_en & BIT(0))) {
1060 tmpaddr = start_addr;
1061 efuse_one_byte_write(hw, start_addr++, data[0]);
1062 efuse_one_byte_write(hw, start_addr++, data[1]);
1063
1064 efuse_one_byte_read(hw, tmpaddr, &tmpdata[0]);
1065 efuse_one_byte_read(hw, tmpaddr + 1, &tmpdata[1]);
1066 if ((data[0] != tmpdata[0]) || (data[1] != tmpdata[1]))
1067 badworden &= (~BIT(0));
1068 }
1069
1070 if (!(word_en & BIT(1))) {
1071 tmpaddr = start_addr;
1072 efuse_one_byte_write(hw, start_addr++, data[2]);
1073 efuse_one_byte_write(hw, start_addr++, data[3]);
1074
1075 efuse_one_byte_read(hw, tmpaddr, &tmpdata[2]);
1076 efuse_one_byte_read(hw, tmpaddr + 1, &tmpdata[3]);
1077 if ((data[2] != tmpdata[2]) || (data[3] != tmpdata[3]))
1078 badworden &= (~BIT(1));
1079 }
1080
1081 if (!(word_en & BIT(2))) {
1082 tmpaddr = start_addr;
1083 efuse_one_byte_write(hw, start_addr++, data[4]);
1084 efuse_one_byte_write(hw, start_addr++, data[5]);
1085
1086 efuse_one_byte_read(hw, tmpaddr, &tmpdata[4]);
1087 efuse_one_byte_read(hw, tmpaddr + 1, &tmpdata[5]);
1088 if ((data[4] != tmpdata[4]) || (data[5] != tmpdata[5]))
1089 badworden &= (~BIT(2));
1090 }
1091
1092 if (!(word_en & BIT(3))) {
1093 tmpaddr = start_addr;
1094 efuse_one_byte_write(hw, start_addr++, data[6]);
1095 efuse_one_byte_write(hw, start_addr++, data[7]);
1096
1097 efuse_one_byte_read(hw, tmpaddr, &tmpdata[6]);
1098 efuse_one_byte_read(hw, tmpaddr + 1, &tmpdata[7]);
1099 if ((data[6] != tmpdata[6]) || (data[7] != tmpdata[7]))
1100 badworden &= (~BIT(3));
1101 }
1102
1103 return badworden;
1104 }
1105
1106 void efuse_power_switch(struct ieee80211_hw *hw, u8 write, u8 pwrstate)
1107 {
1108 struct rtl_priv *rtlpriv = rtl_priv(hw);
1109 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1110 u8 tempval;
1111 u16 tmpv16;
1112
1113 if (pwrstate && (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)) {
1114 if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192CE &&
1115 rtlhal->hw_type != HARDWARE_TYPE_RTL8192DE) {
1116 rtl_write_byte(rtlpriv,
1117 rtlpriv->cfg->maps[EFUSE_ACCESS], 0x69);
1118 } else {
1119 tmpv16 =
1120 rtl_read_word(rtlpriv,
1121 rtlpriv->cfg->maps[SYS_ISO_CTRL]);
1122 if (!(tmpv16 & rtlpriv->cfg->maps[EFUSE_PWC_EV12V])) {
1123 tmpv16 |= rtlpriv->cfg->maps[EFUSE_PWC_EV12V];
1124 rtl_write_word(rtlpriv,
1125 rtlpriv->cfg->maps[SYS_ISO_CTRL],
1126 tmpv16);
1127 }
1128 }
1129 tmpv16 = rtl_read_word(rtlpriv,
1130 rtlpriv->cfg->maps[SYS_FUNC_EN]);
1131 if (!(tmpv16 & rtlpriv->cfg->maps[EFUSE_FEN_ELDR])) {
1132 tmpv16 |= rtlpriv->cfg->maps[EFUSE_FEN_ELDR];
1133 rtl_write_word(rtlpriv,
1134 rtlpriv->cfg->maps[SYS_FUNC_EN], tmpv16);
1135 }
1136
1137 tmpv16 = rtl_read_word(rtlpriv, rtlpriv->cfg->maps[SYS_CLK]);
1138 if ((!(tmpv16 & rtlpriv->cfg->maps[EFUSE_LOADER_CLK_EN])) ||
1139 (!(tmpv16 & rtlpriv->cfg->maps[EFUSE_ANA8M]))) {
1140 tmpv16 |= (rtlpriv->cfg->maps[EFUSE_LOADER_CLK_EN] |
1141 rtlpriv->cfg->maps[EFUSE_ANA8M]);
1142 rtl_write_word(rtlpriv,
1143 rtlpriv->cfg->maps[SYS_CLK], tmpv16);
1144 }
1145 }
1146
1147 if (pwrstate) {
1148 if (write) {
1149 tempval = rtl_read_byte(rtlpriv,
1150 rtlpriv->cfg->maps[EFUSE_TEST] +
1151 3);
1152
1153 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8812AE) {
1154 tempval &= ~(BIT(3) | BIT(4) | BIT(5) | BIT(6));
1155 tempval |= (VOLTAGE_V25 << 3);
1156 } else if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE) {
1157 tempval &= 0x0F;
1158 tempval |= (VOLTAGE_V25 << 4);
1159 }
1160
1161 rtl_write_byte(rtlpriv,
1162 rtlpriv->cfg->maps[EFUSE_TEST] + 3,
1163 (tempval | 0x80));
1164 }
1165
1166 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
1167 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CLK],
1168 0x03);
1169 }
1170 } else {
1171 if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192CE &&
1172 rtlhal->hw_type != HARDWARE_TYPE_RTL8192DE)
1173 rtl_write_byte(rtlpriv,
1174 rtlpriv->cfg->maps[EFUSE_ACCESS], 0);
1175
1176 if (write) {
1177 tempval = rtl_read_byte(rtlpriv,
1178 rtlpriv->cfg->maps[EFUSE_TEST] +
1179 3);
1180 rtl_write_byte(rtlpriv,
1181 rtlpriv->cfg->maps[EFUSE_TEST] + 3,
1182 (tempval & 0x7F));
1183 }
1184
1185 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
1186 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CLK],
1187 0x02);
1188 }
1189 }
1190 }
1191
1192 static u16 efuse_get_current_size(struct ieee80211_hw *hw)
1193 {
1194 int continual = true;
1195 u16 efuse_addr = 0;
1196 u8 hoffset, hworden;
1197 u8 efuse_data, word_cnts;
1198
1199 while (continual && efuse_one_byte_read(hw, efuse_addr, &efuse_data) &&
1200 (efuse_addr < EFUSE_MAX_SIZE)) {
1201 if (efuse_data != 0xFF) {
1202 hoffset = (efuse_data >> 4) & 0x0F;
1203 hworden = efuse_data & 0x0F;
1204 word_cnts = efuse_calculate_word_cnts(hworden);
1205 efuse_addr = efuse_addr + (word_cnts * 2) + 1;
1206 } else {
1207 continual = false;
1208 }
1209 }
1210
1211 return efuse_addr;
1212 }
1213
1214 static u8 efuse_calculate_word_cnts(u8 word_en)
1215 {
1216 u8 word_cnts = 0;
1217
1218 if (!(word_en & BIT(0)))
1219 word_cnts++;
1220 if (!(word_en & BIT(1)))
1221 word_cnts++;
1222 if (!(word_en & BIT(2)))
1223 word_cnts++;
1224 if (!(word_en & BIT(3)))
1225 word_cnts++;
1226 return word_cnts;
1227 }
1228
1229 int rtl_get_hwinfo(struct ieee80211_hw *hw, struct rtl_priv *rtlpriv,
1230 int max_size, u8 *hwinfo, int *params)
1231 {
1232 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
1233 struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
1234 struct device *dev = &rtlpcipriv->dev.pdev->dev;
1235 u16 eeprom_id;
1236 u16 i, usvalue;
1237
1238 switch (rtlefuse->epromtype) {
1239 case EEPROM_BOOT_EFUSE:
1240 rtl_efuse_shadow_map_update(hw);
1241 break;
1242
1243 case EEPROM_93C46:
1244 pr_err("RTL8XXX did not boot from eeprom, check it !!\n");
1245 return 1;
1246
1247 default:
1248 dev_warn(dev, "no efuse data\n");
1249 return 1;
1250 }
1251
1252 memcpy(hwinfo, &rtlefuse->efuse_map[EFUSE_INIT_MAP][0], max_size);
1253
1254 RT_PRINT_DATA(rtlpriv, COMP_INIT, DBG_DMESG, "MAP",
1255 hwinfo, max_size);
1256
1257 eeprom_id = *((u16 *)&hwinfo[0]);
1258 if (eeprom_id != params[0]) {
1259 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1260 "EEPROM ID(%#x) is invalid!!\n", eeprom_id);
1261 rtlefuse->autoload_failflag = true;
1262 } else {
1263 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n");
1264 rtlefuse->autoload_failflag = false;
1265 }
1266
1267 if (rtlefuse->autoload_failflag)
1268 return 1;
1269
1270 rtlefuse->eeprom_vid = *(u16 *)&hwinfo[params[1]];
1271 rtlefuse->eeprom_did = *(u16 *)&hwinfo[params[2]];
1272 rtlefuse->eeprom_svid = *(u16 *)&hwinfo[params[3]];
1273 rtlefuse->eeprom_smid = *(u16 *)&hwinfo[params[4]];
1274 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1275 "EEPROMId = 0x%4x\n", eeprom_id);
1276 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1277 "EEPROM VID = 0x%4x\n", rtlefuse->eeprom_vid);
1278 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1279 "EEPROM DID = 0x%4x\n", rtlefuse->eeprom_did);
1280 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1281 "EEPROM SVID = 0x%4x\n", rtlefuse->eeprom_svid);
1282 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1283 "EEPROM SMID = 0x%4x\n", rtlefuse->eeprom_smid);
1284
1285 for (i = 0; i < 6; i += 2) {
1286 usvalue = *(u16 *)&hwinfo[params[5] + i];
1287 *((u16 *)(&rtlefuse->dev_addr[i])) = usvalue;
1288 }
1289 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "%pM\n", rtlefuse->dev_addr);
1290
1291 rtlefuse->eeprom_channelplan = *&hwinfo[params[6]];
1292 rtlefuse->eeprom_version = *(u16 *)&hwinfo[params[7]];
1293 rtlefuse->txpwr_fromeprom = true;
1294 rtlefuse->eeprom_oemid = *&hwinfo[params[8]];
1295
1296 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1297 "EEPROM Customer ID: 0x%2x\n", rtlefuse->eeprom_oemid);
1298
1299 /* set channel plan to world wide 13 */
1300 rtlefuse->channel_plan = params[9];
1301
1302 return 0;
1303 }
1304
1305 void rtl_fw_block_write(struct ieee80211_hw *hw, const u8 *buffer, u32 size)
1306 {
1307 struct rtl_priv *rtlpriv = rtl_priv(hw);
1308 u8 *pu4byteptr = (u8 *)buffer;
1309 u32 i;
1310
1311 for (i = 0; i < size; i++)
1312 rtl_write_byte(rtlpriv, (START_ADDRESS + i), *(pu4byteptr + i));
1313 }
1314
1315 void rtl_fw_page_write(struct ieee80211_hw *hw, u32 page, const u8 *buffer,
1316 u32 size)
1317 {
1318 struct rtl_priv *rtlpriv = rtl_priv(hw);
1319 u8 value8;
1320 u8 u8page = (u8)(page & 0x07);
1321
1322 value8 = (rtl_read_byte(rtlpriv, REG_MCUFWDL + 2) & 0xF8) | u8page;
1323
1324 rtl_write_byte(rtlpriv, (REG_MCUFWDL + 2), value8);
1325 rtl_fw_block_write(hw, buffer, size);
1326 }
1327
1328 void rtl_fill_dummy(u8 *pfwbuf, u32 *pfwlen)
1329 {
1330 u32 fwlen = *pfwlen;
1331 u8 remain = (u8)(fwlen % 4);
1332
1333 remain = (remain == 0) ? 0 : (4 - remain);
1334
1335 while (remain > 0) {
1336 pfwbuf[fwlen] = 0;
1337 fwlen++;
1338 remain--;
1339 }
1340
1341 *pfwlen = fwlen;
1342 }
Linux with added FPC-III support