1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <linux/regmap.h>
6 #include <linux/platform_data/adau17x1.h>
21 enum adau17x1_pll_src
{
22 ADAU17X1_PLL_SRC_MCLK
,
25 enum adau17x1_clk_src
{
26 /* Automatically configure PLL based on the sample rate */
27 ADAU17X1_CLK_SRC_PLL_AUTO
,
28 ADAU17X1_CLK_SRC_MCLK
,
36 unsigned int pll_freq
;
39 enum adau17x1_clk_src clk_src
;
40 enum adau17x1_type type
;
41 void (*switch_mode
)(struct device
*dev
);
49 unsigned int tdm_slot
[2];
52 struct regmap
*regmap
;
53 struct sigmadsp
*sigmadsp
;
56 int adau17x1_add_widgets(struct snd_soc_codec
*codec
);
57 int adau17x1_add_routes(struct snd_soc_codec
*codec
);
58 int adau17x1_probe(struct device
*dev
, struct regmap
*regmap
,
59 enum adau17x1_type type
, void (*switch_mode
)(struct device
*dev
),
60 const char *firmware_name
);
61 void adau17x1_remove(struct device
*dev
);
62 int adau17x1_set_micbias_voltage(struct snd_soc_codec
*codec
,
63 enum adau17x1_micbias_voltage micbias
);
64 bool adau17x1_readable_register(struct device
*dev
, unsigned int reg
);
65 bool adau17x1_volatile_register(struct device
*dev
, unsigned int reg
);
66 bool adau17x1_precious_register(struct device
*dev
, unsigned int reg
);
67 int adau17x1_resume(struct snd_soc_codec
*codec
);
69 extern const struct snd_soc_dai_ops adau17x1_dai_ops
;
71 int adau17x1_setup_firmware(struct adau
*adau
, unsigned int rate
);
72 bool adau17x1_has_dsp(struct adau
*adau
);
74 #define ADAU17X1_CLOCK_CONTROL 0x4000
75 #define ADAU17X1_PLL_CONTROL 0x4002
76 #define ADAU17X1_REC_POWER_MGMT 0x4009
77 #define ADAU17X1_MICBIAS 0x4010
78 #define ADAU17X1_SERIAL_PORT0 0x4015
79 #define ADAU17X1_SERIAL_PORT1 0x4016
80 #define ADAU17X1_CONVERTER0 0x4017
81 #define ADAU17X1_CONVERTER1 0x4018
82 #define ADAU17X1_LEFT_INPUT_DIGITAL_VOL 0x401a
83 #define ADAU17X1_RIGHT_INPUT_DIGITAL_VOL 0x401b
84 #define ADAU17X1_ADC_CONTROL 0x4019
85 #define ADAU17X1_PLAY_POWER_MGMT 0x4029
86 #define ADAU17X1_DAC_CONTROL0 0x402a
87 #define ADAU17X1_DAC_CONTROL1 0x402b
88 #define ADAU17X1_DAC_CONTROL2 0x402c
89 #define ADAU17X1_SERIAL_PORT_PAD 0x402d
90 #define ADAU17X1_CONTROL_PORT_PAD0 0x402f
91 #define ADAU17X1_CONTROL_PORT_PAD1 0x4030
92 #define ADAU17X1_DSP_SAMPLING_RATE 0x40eb
93 #define ADAU17X1_SERIAL_INPUT_ROUTE 0x40f2
94 #define ADAU17X1_SERIAL_OUTPUT_ROUTE 0x40f3
95 #define ADAU17X1_DSP_ENABLE 0x40f5
96 #define ADAU17X1_DSP_RUN 0x40f6
97 #define ADAU17X1_SERIAL_SAMPLING_RATE 0x40f8
99 #define ADAU17X1_SERIAL_PORT0_BCLK_POL BIT(4)
100 #define ADAU17X1_SERIAL_PORT0_LRCLK_POL BIT(3)
101 #define ADAU17X1_SERIAL_PORT0_MASTER BIT(0)
103 #define ADAU17X1_SERIAL_PORT1_DELAY1 0x00
104 #define ADAU17X1_SERIAL_PORT1_DELAY0 0x01
105 #define ADAU17X1_SERIAL_PORT1_DELAY8 0x02
106 #define ADAU17X1_SERIAL_PORT1_DELAY16 0x03
107 #define ADAU17X1_SERIAL_PORT1_DELAY_MASK 0x03
109 #define ADAU17X1_CLOCK_CONTROL_INFREQ_MASK 0x6
110 #define ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL BIT(3)
111 #define ADAU17X1_CLOCK_CONTROL_SYSCLK_EN BIT(0)
113 #define ADAU17X1_SERIAL_PORT1_BCLK64 (0x0 << 5)
114 #define ADAU17X1_SERIAL_PORT1_BCLK32 (0x1 << 5)
115 #define ADAU17X1_SERIAL_PORT1_BCLK48 (0x2 << 5)
116 #define ADAU17X1_SERIAL_PORT1_BCLK128 (0x3 << 5)
117 #define ADAU17X1_SERIAL_PORT1_BCLK256 (0x4 << 5)
118 #define ADAU17X1_SERIAL_PORT1_BCLK_MASK (0x7 << 5)
120 #define ADAU17X1_SERIAL_PORT0_STEREO (0x0 << 1)
121 #define ADAU17X1_SERIAL_PORT0_TDM4 (0x1 << 1)
122 #define ADAU17X1_SERIAL_PORT0_TDM8 (0x2 << 1)
123 #define ADAU17X1_SERIAL_PORT0_TDM_MASK (0x3 << 1)
124 #define ADAU17X1_SERIAL_PORT0_PULSE_MODE BIT(5)
126 #define ADAU17X1_CONVERTER0_DAC_PAIR(x) (((x) - 1) << 5)
127 #define ADAU17X1_CONVERTER0_DAC_PAIR_MASK (0x3 << 5)
128 #define ADAU17X1_CONVERTER1_ADC_PAIR(x) ((x) - 1)
129 #define ADAU17X1_CONVERTER1_ADC_PAIR_MASK 0x3
131 #define ADAU17X1_CONVERTER0_CONVSR_MASK 0x7
133 #define ADAU17X1_CONVERTER0_ADOSR BIT(3)