2 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
3 * Copyright 2009 Sascha Hauer, s.hauer@pengutronix.de
4 * Copyright 2012 Philippe Retornaz, philippe.retornaz@epfl.ch
6 * Initial development of this code was funded by
7 * Phytec Messtechnik GmbH, http://www.phytec.de
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
23 #include <linux/module.h>
24 #include <linux/device.h>
26 #include <linux/mfd/mc13xxx.h>
27 #include <linux/slab.h>
28 #include <sound/core.h>
29 #include <sound/control.h>
30 #include <sound/pcm.h>
31 #include <sound/soc.h>
32 #include <sound/initval.h>
33 #include <sound/soc-dapm.h>
34 #include <linux/regmap.h>
38 #define AUDIO_RX0_ALSPEN (1 << 5)
39 #define AUDIO_RX0_ALSPSEL (1 << 7)
40 #define AUDIO_RX0_ADDCDC (1 << 21)
41 #define AUDIO_RX0_ADDSTDC (1 << 22)
42 #define AUDIO_RX0_ADDRXIN (1 << 23)
44 #define AUDIO_RX1_PGARXEN (1 << 0);
45 #define AUDIO_RX1_PGASTEN (1 << 5)
46 #define AUDIO_RX1_ARXINEN (1 << 10)
48 #define AUDIO_TX_AMC1REN (1 << 5)
49 #define AUDIO_TX_AMC1LEN (1 << 7)
50 #define AUDIO_TX_AMC2EN (1 << 9)
51 #define AUDIO_TX_ATXINEN (1 << 11)
52 #define AUDIO_TX_RXINREC (1 << 13)
54 #define SSI_NETWORK_CDCTXRXSLOT(x) (((x) & 0x3) << 2)
55 #define SSI_NETWORK_CDCTXSECSLOT(x) (((x) & 0x3) << 4)
56 #define SSI_NETWORK_CDCRXSECSLOT(x) (((x) & 0x3) << 6)
57 #define SSI_NETWORK_CDCRXSECGAIN(x) (((x) & 0x3) << 8)
58 #define SSI_NETWORK_CDCSUMGAIN(x) (1 << 10)
59 #define SSI_NETWORK_CDCFSDLY(x) (1 << 11)
60 #define SSI_NETWORK_DAC_SLOTS_8 (1 << 12)
61 #define SSI_NETWORK_DAC_SLOTS_4 (2 << 12)
62 #define SSI_NETWORK_DAC_SLOTS_2 (3 << 12)
63 #define SSI_NETWORK_DAC_SLOT_MASK (3 << 12)
64 #define SSI_NETWORK_DAC_RXSLOT_0_1 (0 << 14)
65 #define SSI_NETWORK_DAC_RXSLOT_2_3 (1 << 14)
66 #define SSI_NETWORK_DAC_RXSLOT_4_5 (2 << 14)
67 #define SSI_NETWORK_DAC_RXSLOT_6_7 (3 << 14)
68 #define SSI_NETWORK_DAC_RXSLOT_MASK (3 << 14)
69 #define SSI_NETWORK_STDCRXSECSLOT(x) (((x) & 0x3) << 16)
70 #define SSI_NETWORK_STDCRXSECGAIN(x) (((x) & 0x3) << 18)
71 #define SSI_NETWORK_STDCSUMGAIN (1 << 20)
74 * MC13783_AUDIO_CODEC and MC13783_AUDIO_DAC mostly share the same
77 #define AUDIO_SSI_SEL (1 << 0)
78 #define AUDIO_CLK_SEL (1 << 1)
79 #define AUDIO_CSM (1 << 2)
80 #define AUDIO_BCL_INV (1 << 3)
81 #define AUDIO_CFS_INV (1 << 4)
82 #define AUDIO_CFS(x) (((x) & 0x3) << 5)
83 #define AUDIO_CLK(x) (((x) & 0x7) << 7)
84 #define AUDIO_C_EN (1 << 11)
85 #define AUDIO_C_CLK_EN (1 << 12)
86 #define AUDIO_C_RESET (1 << 15)
88 #define AUDIO_CODEC_CDCFS8K16K (1 << 10)
89 #define AUDIO_DAC_CFS_DLY_B (1 << 10)
92 struct mc13xxx
*mc13xxx
;
93 struct regmap
*regmap
;
95 enum mc13783_ssi_port adc_ssi_port
;
96 enum mc13783_ssi_port dac_ssi_port
;
99 /* Mapping between sample rates and register value */
100 static unsigned int mc13783_rates
[] = {
101 8000, 11025, 12000, 16000,
102 22050, 24000, 32000, 44100,
106 static int mc13783_pcm_hw_params_dac(struct snd_pcm_substream
*substream
,
107 struct snd_pcm_hw_params
*params
,
108 struct snd_soc_dai
*dai
)
110 struct snd_soc_codec
*codec
= dai
->codec
;
111 unsigned int rate
= params_rate(params
);
114 for (i
= 0; i
< ARRAY_SIZE(mc13783_rates
); i
++) {
115 if (rate
== mc13783_rates
[i
]) {
116 snd_soc_update_bits(codec
, MC13783_AUDIO_DAC
,
125 static int mc13783_pcm_hw_params_codec(struct snd_pcm_substream
*substream
,
126 struct snd_pcm_hw_params
*params
,
127 struct snd_soc_dai
*dai
)
129 struct snd_soc_codec
*codec
= dai
->codec
;
130 unsigned int rate
= params_rate(params
);
138 val
= AUDIO_CODEC_CDCFS8K16K
;
144 snd_soc_update_bits(codec
, MC13783_AUDIO_CODEC
, AUDIO_CODEC_CDCFS8K16K
,
150 static int mc13783_pcm_hw_params_sync(struct snd_pcm_substream
*substream
,
151 struct snd_pcm_hw_params
*params
,
152 struct snd_soc_dai
*dai
)
154 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
155 return mc13783_pcm_hw_params_dac(substream
, params
, dai
);
157 return mc13783_pcm_hw_params_codec(substream
, params
, dai
);
160 static int mc13783_set_fmt(struct snd_soc_dai
*dai
, unsigned int fmt
,
163 struct snd_soc_codec
*codec
= dai
->codec
;
164 unsigned int val
= 0;
165 unsigned int mask
= AUDIO_CFS(3) | AUDIO_BCL_INV
| AUDIO_CFS_INV
|
166 AUDIO_CSM
| AUDIO_C_CLK_EN
| AUDIO_C_RESET
;
170 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
171 case SND_SOC_DAIFMT_I2S
:
174 case SND_SOC_DAIFMT_DSP_A
:
181 /* DAI clock inversion */
182 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
183 case SND_SOC_DAIFMT_NB_NF
:
184 val
|= AUDIO_BCL_INV
;
186 case SND_SOC_DAIFMT_NB_IF
:
187 val
|= AUDIO_BCL_INV
| AUDIO_CFS_INV
;
189 case SND_SOC_DAIFMT_IB_NF
:
191 case SND_SOC_DAIFMT_IB_IF
:
192 val
|= AUDIO_CFS_INV
;
196 /* DAI clock master masks */
197 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
198 case SND_SOC_DAIFMT_CBM_CFM
:
199 val
|= AUDIO_C_CLK_EN
;
201 case SND_SOC_DAIFMT_CBS_CFS
:
204 case SND_SOC_DAIFMT_CBM_CFS
:
205 case SND_SOC_DAIFMT_CBS_CFM
:
209 val
|= AUDIO_C_RESET
;
211 snd_soc_update_bits(codec
, reg
, mask
, val
);
216 static int mc13783_set_fmt_async(struct snd_soc_dai
*dai
, unsigned int fmt
)
218 if (dai
->id
== MC13783_ID_STEREO_DAC
)
219 return mc13783_set_fmt(dai
, fmt
, MC13783_AUDIO_DAC
);
221 return mc13783_set_fmt(dai
, fmt
, MC13783_AUDIO_CODEC
);
224 static int mc13783_set_fmt_sync(struct snd_soc_dai
*dai
, unsigned int fmt
)
228 ret
= mc13783_set_fmt(dai
, fmt
, MC13783_AUDIO_DAC
);
233 * In synchronous mode force the voice codec into slave mode
234 * so that the clock / framesync from the stereo DAC is used
236 fmt
&= ~SND_SOC_DAIFMT_MASTER_MASK
;
237 fmt
|= SND_SOC_DAIFMT_CBS_CFS
;
238 ret
= mc13783_set_fmt(dai
, fmt
, MC13783_AUDIO_CODEC
);
243 static int mc13783_sysclk
[] = {
249 -1, /* 12000000, invalid for voice codec */
250 -1, /* 3686400, invalid for voice codec */
254 static int mc13783_set_sysclk(struct snd_soc_dai
*dai
,
255 int clk_id
, unsigned int freq
, int dir
,
258 struct snd_soc_codec
*codec
= dai
->codec
;
260 unsigned int val
= 0;
261 unsigned int mask
= AUDIO_CLK(0x7) | AUDIO_CLK_SEL
;
263 for (clk
= 0; clk
< ARRAY_SIZE(mc13783_sysclk
); clk
++) {
264 if (mc13783_sysclk
[clk
] < 0)
266 if (mc13783_sysclk
[clk
] == freq
)
270 if (clk
== ARRAY_SIZE(mc13783_sysclk
))
273 if (clk_id
== MC13783_CLK_CLIB
)
274 val
|= AUDIO_CLK_SEL
;
276 val
|= AUDIO_CLK(clk
);
278 snd_soc_update_bits(codec
, reg
, mask
, val
);
283 static int mc13783_set_sysclk_dac(struct snd_soc_dai
*dai
,
284 int clk_id
, unsigned int freq
, int dir
)
286 return mc13783_set_sysclk(dai
, clk_id
, freq
, dir
, MC13783_AUDIO_DAC
);
289 static int mc13783_set_sysclk_codec(struct snd_soc_dai
*dai
,
290 int clk_id
, unsigned int freq
, int dir
)
292 return mc13783_set_sysclk(dai
, clk_id
, freq
, dir
, MC13783_AUDIO_CODEC
);
295 static int mc13783_set_sysclk_sync(struct snd_soc_dai
*dai
,
296 int clk_id
, unsigned int freq
, int dir
)
300 ret
= mc13783_set_sysclk(dai
, clk_id
, freq
, dir
, MC13783_AUDIO_DAC
);
304 return mc13783_set_sysclk(dai
, clk_id
, freq
, dir
, MC13783_AUDIO_CODEC
);
307 static int mc13783_set_tdm_slot_dac(struct snd_soc_dai
*dai
,
308 unsigned int tx_mask
, unsigned int rx_mask
, int slots
,
311 struct snd_soc_codec
*codec
= dai
->codec
;
312 unsigned int val
= 0;
313 unsigned int mask
= SSI_NETWORK_DAC_SLOT_MASK
|
314 SSI_NETWORK_DAC_RXSLOT_MASK
;
318 val
|= SSI_NETWORK_DAC_SLOTS_2
;
321 val
|= SSI_NETWORK_DAC_SLOTS_4
;
324 val
|= SSI_NETWORK_DAC_SLOTS_8
;
332 val
|= SSI_NETWORK_DAC_RXSLOT_0_1
;
335 val
|= SSI_NETWORK_DAC_RXSLOT_2_3
;
338 val
|= SSI_NETWORK_DAC_RXSLOT_4_5
;
341 val
|= SSI_NETWORK_DAC_RXSLOT_6_7
;
347 snd_soc_update_bits(codec
, MC13783_SSI_NETWORK
, mask
, val
);
352 static int mc13783_set_tdm_slot_codec(struct snd_soc_dai
*dai
,
353 unsigned int tx_mask
, unsigned int rx_mask
, int slots
,
356 struct snd_soc_codec
*codec
= dai
->codec
;
357 unsigned int val
= 0;
358 unsigned int mask
= 0x3f;
366 val
|= (0x00 << 2); /* primary timeslot RX/TX(?) is 0 */
367 val
|= (0x01 << 4); /* secondary timeslot TX is 1 */
369 snd_soc_update_bits(codec
, MC13783_SSI_NETWORK
, mask
, val
);
374 static int mc13783_set_tdm_slot_sync(struct snd_soc_dai
*dai
,
375 unsigned int tx_mask
, unsigned int rx_mask
, int slots
,
380 ret
= mc13783_set_tdm_slot_dac(dai
, tx_mask
, rx_mask
, slots
,
385 ret
= mc13783_set_tdm_slot_codec(dai
, tx_mask
, rx_mask
, slots
,
391 static const struct snd_kcontrol_new mc1l_amp_ctl
=
392 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX
, 7, 1, 0);
394 static const struct snd_kcontrol_new mc1r_amp_ctl
=
395 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX
, 5, 1, 0);
397 static const struct snd_kcontrol_new mc2_amp_ctl
=
398 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX
, 9, 1, 0);
400 static const struct snd_kcontrol_new atx_amp_ctl
=
401 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX
, 11, 1, 0);
404 /* Virtual mux. The chip does the input selection automatically
405 * as soon as we enable one input. */
406 static const char * const adcl_enum_text
[] = {
410 static SOC_ENUM_SINGLE_VIRT_DECL(adcl_enum
, adcl_enum_text
);
412 static const struct snd_kcontrol_new left_input_mux
=
413 SOC_DAPM_ENUM("Route", adcl_enum
);
415 static const char * const adcr_enum_text
[] = {
416 "MC1R", "MC2", "RXINR", "TXIN",
419 static SOC_ENUM_SINGLE_VIRT_DECL(adcr_enum
, adcr_enum_text
);
421 static const struct snd_kcontrol_new right_input_mux
=
422 SOC_DAPM_ENUM("Route", adcr_enum
);
424 static const struct snd_kcontrol_new samp_ctl
=
425 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0
, 3, 1, 0);
427 static const char * const speaker_amp_source_text
[] = {
430 static SOC_ENUM_SINGLE_DECL(speaker_amp_source
, MC13783_AUDIO_RX0
, 4,
431 speaker_amp_source_text
);
432 static const struct snd_kcontrol_new speaker_amp_source_mux
=
433 SOC_DAPM_ENUM("Speaker Amp Source MUX", speaker_amp_source
);
435 static const char * const headset_amp_source_text
[] = {
439 static SOC_ENUM_SINGLE_DECL(headset_amp_source
, MC13783_AUDIO_RX0
, 11,
440 headset_amp_source_text
);
441 static const struct snd_kcontrol_new headset_amp_source_mux
=
442 SOC_DAPM_ENUM("Headset Amp Source MUX", headset_amp_source
);
444 static const struct snd_kcontrol_new cdcout_ctl
=
445 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0
, 18, 1, 0);
447 static const struct snd_kcontrol_new adc_bypass_ctl
=
448 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_CODEC
, 16, 1, 0);
450 static const struct snd_kcontrol_new lamp_ctl
=
451 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0
, 5, 1, 0);
453 static const struct snd_kcontrol_new hlamp_ctl
=
454 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0
, 10, 1, 0);
456 static const struct snd_kcontrol_new hramp_ctl
=
457 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0
, 9, 1, 0);
459 static const struct snd_kcontrol_new llamp_ctl
=
460 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0
, 16, 1, 0);
462 static const struct snd_kcontrol_new lramp_ctl
=
463 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0
, 15, 1, 0);
465 static const struct snd_soc_dapm_widget mc13783_dapm_widgets
[] = {
467 SND_SOC_DAPM_INPUT("MC1LIN"),
468 SND_SOC_DAPM_INPUT("MC1RIN"),
469 SND_SOC_DAPM_INPUT("MC2IN"),
470 SND_SOC_DAPM_INPUT("RXINR"),
471 SND_SOC_DAPM_INPUT("RXINL"),
472 SND_SOC_DAPM_INPUT("TXIN"),
474 SND_SOC_DAPM_SUPPLY("MC1 Bias", MC13783_AUDIO_TX
, 0, 0, NULL
, 0),
475 SND_SOC_DAPM_SUPPLY("MC2 Bias", MC13783_AUDIO_TX
, 1, 0, NULL
, 0),
477 SND_SOC_DAPM_SWITCH("MC1L Amp", MC13783_AUDIO_TX
, 7, 0, &mc1l_amp_ctl
),
478 SND_SOC_DAPM_SWITCH("MC1R Amp", MC13783_AUDIO_TX
, 5, 0, &mc1r_amp_ctl
),
479 SND_SOC_DAPM_SWITCH("MC2 Amp", MC13783_AUDIO_TX
, 9, 0, &mc2_amp_ctl
),
480 SND_SOC_DAPM_SWITCH("TXIN Amp", MC13783_AUDIO_TX
, 11, 0, &atx_amp_ctl
),
482 SND_SOC_DAPM_MUX("PGA Left Input Mux", SND_SOC_NOPM
, 0, 0,
484 SND_SOC_DAPM_MUX("PGA Right Input Mux", SND_SOC_NOPM
, 0, 0,
487 SND_SOC_DAPM_MUX("Speaker Amp Source MUX", SND_SOC_NOPM
, 0, 0,
488 &speaker_amp_source_mux
),
490 SND_SOC_DAPM_MUX("Headset Amp Source MUX", SND_SOC_NOPM
, 0, 0,
491 &headset_amp_source_mux
),
493 SND_SOC_DAPM_PGA("PGA Left Input", SND_SOC_NOPM
, 0, 0, NULL
, 0),
494 SND_SOC_DAPM_PGA("PGA Right Input", SND_SOC_NOPM
, 0, 0, NULL
, 0),
496 SND_SOC_DAPM_ADC("ADC", "Capture", MC13783_AUDIO_CODEC
, 11, 0),
497 SND_SOC_DAPM_SUPPLY("ADC_Reset", MC13783_AUDIO_CODEC
, 15, 0, NULL
, 0),
499 SND_SOC_DAPM_PGA("Voice CODEC PGA", MC13783_AUDIO_RX1
, 0, 0, NULL
, 0),
500 SND_SOC_DAPM_SWITCH("Voice CODEC Bypass", MC13783_AUDIO_CODEC
, 16, 0,
504 SND_SOC_DAPM_SUPPLY("DAC_E", MC13783_AUDIO_DAC
, 11, 0, NULL
, 0),
505 SND_SOC_DAPM_SUPPLY("DAC_Reset", MC13783_AUDIO_DAC
, 15, 0, NULL
, 0),
506 SND_SOC_DAPM_OUTPUT("RXOUTL"),
507 SND_SOC_DAPM_OUTPUT("RXOUTR"),
508 SND_SOC_DAPM_OUTPUT("HSL"),
509 SND_SOC_DAPM_OUTPUT("HSR"),
510 SND_SOC_DAPM_OUTPUT("LSPL"),
511 SND_SOC_DAPM_OUTPUT("LSP"),
512 SND_SOC_DAPM_OUTPUT("SP"),
513 SND_SOC_DAPM_OUTPUT("CDCOUT"),
515 SND_SOC_DAPM_SWITCH("CDCOUT Switch", MC13783_AUDIO_RX0
, 18, 0,
517 SND_SOC_DAPM_SWITCH("Speaker Amp Switch", MC13783_AUDIO_RX0
, 3, 0,
519 SND_SOC_DAPM_SWITCH("Loudspeaker Amp", SND_SOC_NOPM
, 0, 0, &lamp_ctl
),
520 SND_SOC_DAPM_SWITCH("Headset Amp Left", MC13783_AUDIO_RX0
, 10, 0,
522 SND_SOC_DAPM_SWITCH("Headset Amp Right", MC13783_AUDIO_RX0
, 9, 0,
524 SND_SOC_DAPM_SWITCH("Line out Amp Left", MC13783_AUDIO_RX0
, 16, 0,
526 SND_SOC_DAPM_SWITCH("Line out Amp Right", MC13783_AUDIO_RX0
, 15, 0,
528 SND_SOC_DAPM_DAC("DAC", "Playback", MC13783_AUDIO_RX0
, 22, 0),
529 SND_SOC_DAPM_PGA("DAC PGA", MC13783_AUDIO_RX1
, 5, 0, NULL
, 0),
532 static struct snd_soc_dapm_route mc13783_routes
[] = {
534 { "MC1L Amp", NULL
, "MC1LIN"},
535 { "MC1R Amp", NULL
, "MC1RIN" },
536 { "MC2 Amp", NULL
, "MC2IN" },
537 { "TXIN Amp", NULL
, "TXIN"},
539 { "PGA Left Input Mux", "MC1L", "MC1L Amp" },
540 { "PGA Left Input Mux", "RXINL", "RXINL"},
541 { "PGA Right Input Mux", "MC1R", "MC1R Amp" },
542 { "PGA Right Input Mux", "MC2", "MC2 Amp"},
543 { "PGA Right Input Mux", "TXIN", "TXIN Amp"},
544 { "PGA Right Input Mux", "RXINR", "RXINR"},
546 { "PGA Left Input", NULL
, "PGA Left Input Mux"},
547 { "PGA Right Input", NULL
, "PGA Right Input Mux"},
549 { "ADC", NULL
, "PGA Left Input"},
550 { "ADC", NULL
, "PGA Right Input"},
551 { "ADC", NULL
, "ADC_Reset"},
553 { "Voice CODEC PGA", "Voice CODEC Bypass", "ADC" },
555 { "Speaker Amp Source MUX", "CODEC", "Voice CODEC PGA"},
556 { "Speaker Amp Source MUX", "Right", "DAC PGA"},
558 { "Headset Amp Source MUX", "CODEC", "Voice CODEC PGA"},
559 { "Headset Amp Source MUX", "Mixer", "DAC PGA"},
562 { "HSL", NULL
, "Headset Amp Left" },
563 { "HSR", NULL
, "Headset Amp Right"},
564 { "RXOUTL", NULL
, "Line out Amp Left"},
565 { "RXOUTR", NULL
, "Line out Amp Right"},
566 { "SP", "Speaker Amp Switch", "Speaker Amp Source MUX"},
567 { "LSP", "Loudspeaker Amp", "Speaker Amp Source MUX"},
568 { "HSL", "Headset Amp Left", "Headset Amp Source MUX"},
569 { "HSR", "Headset Amp Right", "Headset Amp Source MUX"},
570 { "Line out Amp Left", NULL
, "DAC PGA"},
571 { "Line out Amp Right", NULL
, "DAC PGA"},
572 { "DAC PGA", NULL
, "DAC"},
573 { "DAC", NULL
, "DAC_E"},
574 { "CDCOUT", "CDCOUT Switch", "Voice CODEC PGA"},
577 static const char * const mc13783_3d_mixer
[] = {"Stereo", "Phase Mix",
580 static SOC_ENUM_SINGLE_DECL(mc13783_enum_3d_mixer
,
581 MC13783_AUDIO_RX1
, 16,
584 static struct snd_kcontrol_new mc13783_control_list
[] = {
585 SOC_SINGLE("Loudspeaker enable", MC13783_AUDIO_RX0
, 5, 1, 0),
586 SOC_SINGLE("PCM Playback Volume", MC13783_AUDIO_RX1
, 6, 15, 0),
587 SOC_SINGLE("PCM Playback Switch", MC13783_AUDIO_RX1
, 5, 1, 0),
588 SOC_DOUBLE("PCM Capture Volume", MC13783_AUDIO_TX
, 19, 14, 31, 0),
589 SOC_ENUM("3D Control", mc13783_enum_3d_mixer
),
591 SOC_SINGLE("CDCOUT Switch", MC13783_AUDIO_RX0
, 18, 1, 0),
592 SOC_SINGLE("Earpiece Amp Switch", MC13783_AUDIO_RX0
, 3, 1, 0),
593 SOC_DOUBLE("Headset Amp Switch", MC13783_AUDIO_RX0
, 10, 9, 1, 0),
594 SOC_DOUBLE("Line out Amp Switch", MC13783_AUDIO_RX0
, 16, 15, 1, 0),
596 SOC_SINGLE("PCM Capture Mixin Switch", MC13783_AUDIO_RX0
, 22, 1, 0),
597 SOC_SINGLE("Line in Capture Mixin Switch", MC13783_AUDIO_RX0
, 23, 1, 0),
599 SOC_SINGLE("CODEC Capture Volume", MC13783_AUDIO_RX1
, 1, 15, 0),
600 SOC_SINGLE("CODEC Capture Mixin Switch", MC13783_AUDIO_RX0
, 21, 1, 0),
602 SOC_SINGLE("Line in Capture Volume", MC13783_AUDIO_RX1
, 12, 15, 0),
603 SOC_SINGLE("Line in Capture Switch", MC13783_AUDIO_RX1
, 10, 1, 0),
605 SOC_SINGLE("MC1 Capture Bias Switch", MC13783_AUDIO_TX
, 0, 1, 0),
606 SOC_SINGLE("MC2 Capture Bias Switch", MC13783_AUDIO_TX
, 1, 1, 0),
609 static int mc13783_probe(struct snd_soc_codec
*codec
)
611 struct mc13783_priv
*priv
= snd_soc_codec_get_drvdata(codec
);
613 /* these are the reset values */
614 mc13xxx_reg_write(priv
->mc13xxx
, MC13783_AUDIO_RX0
, 0x25893);
615 mc13xxx_reg_write(priv
->mc13xxx
, MC13783_AUDIO_RX1
, 0x00d35A);
616 mc13xxx_reg_write(priv
->mc13xxx
, MC13783_AUDIO_TX
, 0x420000);
617 mc13xxx_reg_write(priv
->mc13xxx
, MC13783_SSI_NETWORK
, 0x013060);
618 mc13xxx_reg_write(priv
->mc13xxx
, MC13783_AUDIO_CODEC
, 0x180027);
619 mc13xxx_reg_write(priv
->mc13xxx
, MC13783_AUDIO_DAC
, 0x0e0004);
621 if (priv
->adc_ssi_port
== MC13783_SSI1_PORT
)
622 mc13xxx_reg_rmw(priv
->mc13xxx
, MC13783_AUDIO_CODEC
,
625 mc13xxx_reg_rmw(priv
->mc13xxx
, MC13783_AUDIO_CODEC
,
626 AUDIO_SSI_SEL
, AUDIO_SSI_SEL
);
628 if (priv
->dac_ssi_port
== MC13783_SSI1_PORT
)
629 mc13xxx_reg_rmw(priv
->mc13xxx
, MC13783_AUDIO_DAC
,
632 mc13xxx_reg_rmw(priv
->mc13xxx
, MC13783_AUDIO_DAC
,
633 AUDIO_SSI_SEL
, AUDIO_SSI_SEL
);
638 static int mc13783_remove(struct snd_soc_codec
*codec
)
640 struct mc13783_priv
*priv
= snd_soc_codec_get_drvdata(codec
);
642 /* Make sure VAUDIOON is off */
643 mc13xxx_reg_rmw(priv
->mc13xxx
, MC13783_AUDIO_RX0
, 0x3, 0);
648 #define MC13783_RATES_RECORD (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000)
650 #define MC13783_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
651 SNDRV_PCM_FMTBIT_S24_LE)
653 static const struct snd_soc_dai_ops mc13783_ops_dac
= {
654 .hw_params
= mc13783_pcm_hw_params_dac
,
655 .set_fmt
= mc13783_set_fmt_async
,
656 .set_sysclk
= mc13783_set_sysclk_dac
,
657 .set_tdm_slot
= mc13783_set_tdm_slot_dac
,
660 static const struct snd_soc_dai_ops mc13783_ops_codec
= {
661 .hw_params
= mc13783_pcm_hw_params_codec
,
662 .set_fmt
= mc13783_set_fmt_async
,
663 .set_sysclk
= mc13783_set_sysclk_codec
,
664 .set_tdm_slot
= mc13783_set_tdm_slot_codec
,
668 * The mc13783 has two SSI ports, both of them can be routed either
669 * to the voice codec or the stereo DAC. When two different SSI ports
670 * are used for the voice codec and the stereo DAC we can do different
671 * formats and sysclock settings for playback and capture
672 * (mc13783-hifi-playback and mc13783-hifi-capture). Using the same port
673 * forces us to use symmetric rates (mc13783-hifi).
675 static struct snd_soc_dai_driver mc13783_dai_async
[] = {
677 .name
= "mc13783-hifi-playback",
678 .id
= MC13783_ID_STEREO_DAC
,
680 .stream_name
= "Playback",
683 .rates
= SNDRV_PCM_RATE_8000_96000
,
684 .formats
= MC13783_FORMATS
,
686 .ops
= &mc13783_ops_dac
,
688 .name
= "mc13783-hifi-capture",
689 .id
= MC13783_ID_STEREO_CODEC
,
691 .stream_name
= "Capture",
694 .rates
= MC13783_RATES_RECORD
,
695 .formats
= MC13783_FORMATS
,
697 .ops
= &mc13783_ops_codec
,
701 static const struct snd_soc_dai_ops mc13783_ops_sync
= {
702 .hw_params
= mc13783_pcm_hw_params_sync
,
703 .set_fmt
= mc13783_set_fmt_sync
,
704 .set_sysclk
= mc13783_set_sysclk_sync
,
705 .set_tdm_slot
= mc13783_set_tdm_slot_sync
,
708 static struct snd_soc_dai_driver mc13783_dai_sync
[] = {
710 .name
= "mc13783-hifi",
711 .id
= MC13783_ID_SYNC
,
713 .stream_name
= "Playback",
716 .rates
= SNDRV_PCM_RATE_8000_96000
,
717 .formats
= MC13783_FORMATS
,
720 .stream_name
= "Capture",
723 .rates
= MC13783_RATES_RECORD
,
724 .formats
= MC13783_FORMATS
,
726 .ops
= &mc13783_ops_sync
,
727 .symmetric_rates
= 1,
731 static struct regmap
*mc13783_get_regmap(struct device
*dev
)
733 return dev_get_regmap(dev
->parent
, NULL
);
736 static const struct snd_soc_codec_driver soc_codec_dev_mc13783
= {
737 .probe
= mc13783_probe
,
738 .remove
= mc13783_remove
,
739 .get_regmap
= mc13783_get_regmap
,
740 .component_driver
= {
741 .controls
= mc13783_control_list
,
742 .num_controls
= ARRAY_SIZE(mc13783_control_list
),
743 .dapm_widgets
= mc13783_dapm_widgets
,
744 .num_dapm_widgets
= ARRAY_SIZE(mc13783_dapm_widgets
),
745 .dapm_routes
= mc13783_routes
,
746 .num_dapm_routes
= ARRAY_SIZE(mc13783_routes
),
750 static int __init
mc13783_codec_probe(struct platform_device
*pdev
)
752 struct mc13783_priv
*priv
;
753 struct mc13xxx_codec_platform_data
*pdata
= pdev
->dev
.platform_data
;
754 struct device_node
*np
;
757 priv
= devm_kzalloc(&pdev
->dev
, sizeof(*priv
), GFP_KERNEL
);
762 priv
->adc_ssi_port
= pdata
->adc_ssi_port
;
763 priv
->dac_ssi_port
= pdata
->dac_ssi_port
;
765 np
= of_get_child_by_name(pdev
->dev
.parent
->of_node
, "codec");
769 ret
= of_property_read_u32(np
, "adc-port", &priv
->adc_ssi_port
);
775 ret
= of_property_read_u32(np
, "dac-port", &priv
->dac_ssi_port
);
784 dev_set_drvdata(&pdev
->dev
, priv
);
785 priv
->mc13xxx
= dev_get_drvdata(pdev
->dev
.parent
);
787 if (priv
->adc_ssi_port
== priv
->dac_ssi_port
)
788 ret
= snd_soc_register_codec(&pdev
->dev
, &soc_codec_dev_mc13783
,
789 mc13783_dai_sync
, ARRAY_SIZE(mc13783_dai_sync
));
791 ret
= snd_soc_register_codec(&pdev
->dev
, &soc_codec_dev_mc13783
,
792 mc13783_dai_async
, ARRAY_SIZE(mc13783_dai_async
));
797 static int mc13783_codec_remove(struct platform_device
*pdev
)
799 snd_soc_unregister_codec(&pdev
->dev
);
804 static struct platform_driver mc13783_codec_driver
= {
806 .name
= "mc13783-codec",
808 .remove
= mc13783_codec_remove
,
810 module_platform_driver_probe(mc13783_codec_driver
, mc13783_codec_probe
);
812 MODULE_DESCRIPTION("ASoC MC13783 driver");
813 MODULE_AUTHOR("Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>");
814 MODULE_AUTHOR("Philippe Retornaz <philippe.retornaz@epfl.ch>");
815 MODULE_LICENSE("GPL");