x86/speculation/mds: Fix documentation typo
[linux/fpc-iii.git] / sound / soc / codecs / rt274.h
blob4fd1bcb73dba92c7ecaf06aedac05547b1cfa2e3
1 /*
2 * rt274.h -- RT274 ALSA SoC audio driver
4 * Copyright 2016 Realtek Microelectronics
5 * Author: Bard Liao <bardliao@realtek.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #ifndef __RT274_H__
13 #define __RT274_H__
15 #define VERB_CMD(V, N, D) ((N << 20) | (V << 8) | D)
17 #define RT274_AUDIO_FUNCTION_GROUP 0x01
18 #define RT274_DAC_OUT0 0x02
19 #define RT274_DAC_OUT1 0x03
20 #define RT274_ADC_IN2 0x08
21 #define RT274_ADC_IN1 0x09
22 #define RT274_DIG_CVT 0x0a
23 #define RT274_DMIC1 0x12
24 #define RT274_DMIC2 0x13
25 #define RT274_MIC 0x19
26 #define RT274_LINE1 0x1a
27 #define RT274_LINE2 0x1b
28 #define RT274_LINE3 0x16
29 #define RT274_SPDIF 0x1e
30 #define RT274_VENDOR_REGISTERS 0x20
31 #define RT274_HP_OUT 0x21
32 #define RT274_MIXER_IN1 0x22
33 #define RT274_MIXER_IN2 0x23
34 #define RT274_INLINE_CMD 0x55
36 #define RT274_SET_PIN_SFT 6
37 #define RT274_SET_PIN_ENABLE 0x40
38 #define RT274_SET_PIN_DISABLE 0
39 #define RT274_SET_EAPD_HIGH 0x2
40 #define RT274_SET_EAPD_LOW 0
42 #define RT274_MUTE_SFT 7
44 /* Verb commands */
45 #define RT274_RESET\
46 VERB_CMD(AC_VERB_SET_CODEC_RESET, RT274_AUDIO_FUNCTION_GROUP, 0)
47 #define RT274_GET_PARAM(NID, PARAM) VERB_CMD(AC_VERB_PARAMETERS, NID, PARAM)
48 #define RT274_SET_POWER(NID) VERB_CMD(AC_VERB_SET_POWER_STATE, NID, 0)
49 #define RT274_SET_AUDIO_POWER RT274_SET_POWER(RT274_AUDIO_FUNCTION_GROUP)
50 #define RT274_SET_HPO_POWER RT274_SET_POWER(RT274_HP_OUT)
51 #define RT274_SET_DMIC1_POWER RT274_SET_POWER(RT274_DMIC1)
52 #define RT274_LOUT_MUX\
53 VERB_CMD(AC_VERB_SET_CONNECT_SEL, RT274_LINE3, 0)
54 #define RT274_HPO_MUX\
55 VERB_CMD(AC_VERB_SET_CONNECT_SEL, RT274_HP_OUT, 0)
56 #define RT274_ADC0_MUX\
57 VERB_CMD(AC_VERB_SET_CONNECT_SEL, RT274_MIXER_IN1, 0)
58 #define RT274_ADC1_MUX\
59 VERB_CMD(AC_VERB_SET_CONNECT_SEL, RT274_MIXER_IN2, 0)
60 #define RT274_SET_MIC\
61 VERB_CMD(AC_VERB_SET_PIN_WIDGET_CONTROL, RT274_MIC, 0)
62 #define RT274_SET_PIN_LOUT3\
63 VERB_CMD(AC_VERB_SET_PIN_WIDGET_CONTROL, RT274_LINE3, 0)
64 #define RT274_SET_PIN_HPO\
65 VERB_CMD(AC_VERB_SET_PIN_WIDGET_CONTROL, RT274_HP_OUT, 0)
66 #define RT274_SET_PIN_DMIC1\
67 VERB_CMD(AC_VERB_SET_PIN_WIDGET_CONTROL, RT274_DMIC1, 0)
68 #define RT274_SET_PIN_SPDIF\
69 VERB_CMD(AC_VERB_SET_PIN_WIDGET_CONTROL, RT274_SPDIF, 0)
70 #define RT274_SET_PIN_DIG_CVT\
71 VERB_CMD(AC_VERB_SET_DIGI_CONVERT_1, RT274_DIG_CVT, 0)
72 #define RT274_SET_AMP_GAIN_HPO\
73 VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_HP_OUT, 0)
74 #define RT274_SET_AMP_GAIN_ADC_IN1\
75 VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_ADC_IN1, 0)
76 #define RT274_SET_AMP_GAIN_ADC_IN2\
77 VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_ADC_IN2, 0)
78 #define RT274_GET_HP_SENSE\
79 VERB_CMD(AC_VERB_GET_PIN_SENSE, RT274_HP_OUT, 0)
80 #define RT274_GET_MIC_SENSE\
81 VERB_CMD(AC_VERB_GET_PIN_SENSE, RT274_MIC, 0)
82 #define RT274_SET_DMIC2_DEFAULT\
83 VERB_CMD(AC_VERB_SET_CONFIG_DEFAULT_BYTES_3, RT274_DMIC2, 0)
84 #define RT274_SET_SPDIF_DEFAULT\
85 VERB_CMD(AC_VERB_SET_CONFIG_DEFAULT_BYTES_3, RT274_SPDIF, 0)
86 #define RT274_DAC0L_GAIN\
87 VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_DAC_OUT0, 0xa000)
88 #define RT274_DAC0R_GAIN\
89 VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_DAC_OUT0, 0x9000)
90 #define RT274_DAC1L_GAIN\
91 VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_DAC_OUT1, 0xa000)
92 #define RT274_DAC1R_GAIN\
93 VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_DAC_OUT1, 0x9000)
94 #define RT274_ADCL_GAIN\
95 VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_ADC_IN1, 0x6000)
96 #define RT274_ADCR_GAIN\
97 VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_ADC_IN1, 0x5000)
98 #define RT274_MIC_GAIN\
99 VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_MIC, 0x7000)
100 #define RT274_LOUTL_GAIN\
101 VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_LINE3, 0xa000)
102 #define RT274_LOUTR_GAIN\
103 VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_LINE3, 0x9000)
104 #define RT274_HPOL_GAIN\
105 VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_HP_OUT, 0xa000)
106 #define RT274_HPOR_GAIN\
107 VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_HP_OUT, 0x9000)
108 #define RT274_DAC_FORMAT\
109 VERB_CMD(AC_VERB_SET_STREAM_FORMAT, RT274_DAC_OUT0, 0)
110 #define RT274_ADC_FORMAT\
111 VERB_CMD(AC_VERB_SET_STREAM_FORMAT, RT274_ADC_IN1, 0)
112 #define RT274_COEF_INDEX\
113 VERB_CMD(AC_VERB_SET_COEF_INDEX, RT274_VENDOR_REGISTERS, 0)
114 #define RT274_PROC_COEF\
115 VERB_CMD(AC_VERB_SET_PROC_COEF, RT274_VENDOR_REGISTERS, 0)
116 #define RT274_UNSOLICITED_INLINE_CMD\
117 VERB_CMD(AC_VERB_SET_UNSOLICITED_ENABLE, RT274_INLINE_CMD, 0)
118 #define RT274_UNSOLICITED_HP_OUT\
119 VERB_CMD(AC_VERB_SET_UNSOLICITED_ENABLE, RT274_HP_OUT, 0)
120 #define RT274_UNSOLICITED_MIC\
121 VERB_CMD(AC_VERB_SET_UNSOLICITED_ENABLE, RT274_MIC, 0)
122 #define RT274_COEF58_INDEX\
123 VERB_CMD(AC_VERB_SET_COEF_INDEX, 0x58, 0)
124 #define RT274_COEF58_COEF\
125 VERB_CMD(AC_VERB_SET_PROC_COEF, 0x58, 0)
126 #define RT274_COEF5b_INDEX\
127 VERB_CMD(AC_VERB_SET_COEF_INDEX, 0x5b, 0)
128 #define RT274_COEF5b_COEF\
129 VERB_CMD(AC_VERB_SET_PROC_COEF, 0x5b, 0)
130 #define RT274_SET_STREAMID_DAC0\
131 VERB_CMD(AC_VERB_SET_CHANNEL_STREAMID, RT274_DAC_OUT0, 0)
132 #define RT274_SET_STREAMID_DAC1\
133 VERB_CMD(AC_VERB_SET_CHANNEL_STREAMID, RT274_DAC_OUT1, 0)
134 #define RT274_SET_STREAMID_ADC1\
135 VERB_CMD(AC_VERB_SET_CHANNEL_STREAMID, RT274_ADC_IN1, 0)
136 #define RT274_SET_STREAMID_ADC2\
137 VERB_CMD(AC_VERB_SET_CHANNEL_STREAMID, RT274_ADC_IN2, 0)
139 /* Index registers */
140 #define RT274_EAPD_GPIO_IRQ_CTRL 0x10
141 #define RT274_PAD_CTRL12 0x35
142 #define RT274_I2S_CTRL1 0x63
143 #define RT274_I2S_CTRL2 0x64
144 #define RT274_MCLK_CTRL 0x71
145 #define RT274_CLK_CTRL 0x72
146 #define RT274_PLL2_CTRL 0x7b
149 /* EAPD GPIO IRQ control (Index 0x10) */
150 #define RT274_IRQ_DIS (0x0 << 13)
151 #define RT274_IRQ_EN (0x1 << 13)
152 #define RT274_IRQ_CLR (0x1 << 12)
153 #define RT274_GPI2_SEL_MASK (0x3 << 7)
154 #define RT274_GPI2_SEL_GPIO2 (0x0 << 7)
155 #define RT274_GPI2_SEL_I2S (0x1 << 7)
156 #define RT274_GPI2_SEL_DMIC_CLK (0x2 << 7)
157 #define RT274_GPI2_SEL_CBJ (0x3 << 7)
159 /* Front I2S_Interface control 1 (Index 0x63) */
160 #define RT274_I2S_MODE_MASK (0x1 << 11)
161 #define RT274_I2S_MODE_S (0x0 << 11)
162 #define RT274_I2S_MODE_M (0x1 << 11)
163 #define RT274_TDM_DIS (0x0 << 10)
164 #define RT274_TDM_EN (0x1 << 10)
165 #define RT274_TDM_CH_NUM (0x1 << 7)
166 #define RT274_TDM_2CH (0x0 << 7)
167 #define RT274_TDM_4CH (0x1 << 7)
168 #define RT274_I2S_FMT_MASK (0x3 << 8)
169 #define RT274_I2S_FMT_I2S (0x0 << 8)
170 #define RT274_I2S_FMT_LJ (0x1 << 8)
171 #define RT274_I2S_FMT_PCMA (0x2 << 8)
172 #define RT274_I2S_FMT_PCMB (0x3 << 8)
174 /* MCLK clock domain control (Index 0x71) */
175 #define RT274_MCLK_MODE_MASK (0x1 << 14)
176 #define RT274_MCLK_MODE_DIS (0x0 << 14)
177 #define RT274_MCLK_MODE_EN (0x1 << 14)
179 /* Clock control (Index 0x72) */
180 #define RT274_CLK_SRC_MASK (0x7 << 3)
181 #define RT274_CLK_SRC_MCLK (0x0 << 3)
182 #define RT274_CLK_SRC_PLL2 (0x3 << 3)
184 /* PLL2 control (Index 0x7b) */
185 #define RT274_PLL2_SRC_MASK (0x1 << 13)
186 #define RT274_PLL2_SRC_MCLK (0x0 << 13)
187 #define RT274_PLL2_SRC_BCLK (0x1 << 13)
189 /* HP-OUT (0x21) */
190 #define RT274_M_HP_MUX_SFT 14
191 #define RT274_HP_SEL_MASK 0x1
192 #define RT274_HP_SEL_SFT 0
193 #define RT274_HP_SEL_F 0
194 #define RT274_HP_SEL_S 1
196 /* ADC (0x22) (0x23) */
197 #define RT274_ADC_SEL_MASK 0x7
198 #define RT274_ADC_SEL_SFT 0
199 #define RT274_ADC_SEL_MIC 0
200 #define RT274_ADC_SEL_LINE1 1
201 #define RT274_ADC_SEL_LINE2 2
202 #define RT274_ADC_SEL_DMIC 3
204 #define RT274_SCLK_S_MCLK 0
205 #define RT274_SCLK_S_PLL1 1
206 #define RT274_SCLK_S_PLL2 2
208 #define RT274_PLL2_S_MCLK 0
209 #define RT274_PLL2_S_BCLK 1
211 enum {
212 RT274_AIF1,
213 RT274_AIFS,
216 #endif /* __RT274_H__ */