2 * rt5645.c -- RT5645 ALSA SoC audio codec driver
4 * Copyright 2013 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
17 #include <linux/i2c.h>
18 #include <linux/platform_device.h>
19 #include <linux/spi/spi.h>
20 #include <linux/gpio.h>
21 #include <linux/gpio/consumer.h>
22 #include <linux/acpi.h>
23 #include <linux/dmi.h>
24 #include <linux/regulator/consumer.h>
25 #include <sound/core.h>
26 #include <sound/pcm.h>
27 #include <sound/pcm_params.h>
28 #include <sound/jack.h>
29 #include <sound/soc.h>
30 #include <sound/soc-dapm.h>
31 #include <sound/initval.h>
32 #include <sound/tlv.h>
37 #define QUIRK_INV_JD1_1(q) ((q) & 1)
38 #define QUIRK_LEVEL_IRQ(q) (((q) >> 1) & 1)
39 #define QUIRK_IN2_DIFF(q) (((q) >> 2) & 1)
40 #define QUIRK_JD_MODE(q) (((q) >> 4) & 7)
41 #define QUIRK_DMIC1_DATA_PIN(q) (((q) >> 8) & 3)
42 #define QUIRK_DMIC2_DATA_PIN(q) (((q) >> 12) & 3)
44 static unsigned int quirk
= -1;
45 module_param(quirk
, uint
, 0444);
46 MODULE_PARM_DESC(quirk
, "RT5645 pdata quirk override");
48 #define RT5645_DEVICE_ID 0x6308
49 #define RT5650_DEVICE_ID 0x6419
51 #define RT5645_PR_RANGE_BASE (0xff + 1)
52 #define RT5645_PR_SPACING 0x100
54 #define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
56 #define RT5645_HWEQ_NUM 57
58 static const struct regmap_range_cfg rt5645_ranges
[] = {
61 .range_min
= RT5645_PR_BASE
,
62 .range_max
= RT5645_PR_BASE
+ 0xf8,
63 .selector_reg
= RT5645_PRIV_INDEX
,
64 .selector_mask
= 0xff,
65 .selector_shift
= 0x0,
66 .window_start
= RT5645_PRIV_DATA
,
71 static const struct reg_sequence init_list
[] = {
72 {RT5645_PR_BASE
+ 0x3d, 0x3600},
73 {RT5645_PR_BASE
+ 0x1c, 0xfd70},
74 {RT5645_PR_BASE
+ 0x20, 0x611f},
75 {RT5645_PR_BASE
+ 0x21, 0x4040},
76 {RT5645_PR_BASE
+ 0x23, 0x0004},
77 {RT5645_ASRC_4
, 0x0120},
80 static const struct reg_sequence rt5650_init_list
[] = {
84 static const struct reg_default rt5645_reg
[] = {
240 static const struct reg_default rt5650_reg
[] = {
397 struct rt5645_eq_param_s
{
402 static const char *const rt5645_supply_names
[] = {
408 struct snd_soc_codec
*codec
;
409 struct rt5645_platform_data pdata
;
410 struct regmap
*regmap
;
411 struct i2c_client
*i2c
;
412 struct gpio_desc
*gpiod_hp_det
;
413 struct snd_soc_jack
*hp_jack
;
414 struct snd_soc_jack
*mic_jack
;
415 struct snd_soc_jack
*btn_jack
;
416 struct delayed_work jack_detect_work
, rcclock_work
;
417 struct regulator_bulk_data supplies
[ARRAY_SIZE(rt5645_supply_names
)];
418 struct rt5645_eq_param_s
*eq_param
;
419 struct timer_list btn_check_timer
;
424 int lrck
[RT5645_AIFS
];
425 int bclk
[RT5645_AIFS
];
426 int master
[RT5645_AIFS
];
437 static int rt5645_reset(struct snd_soc_codec
*codec
)
439 return snd_soc_write(codec
, RT5645_RESET
, 0);
442 static bool rt5645_volatile_register(struct device
*dev
, unsigned int reg
)
446 for (i
= 0; i
< ARRAY_SIZE(rt5645_ranges
); i
++) {
447 if (reg
>= rt5645_ranges
[i
].range_min
&&
448 reg
<= rt5645_ranges
[i
].range_max
) {
455 case RT5645_PRIV_INDEX
:
456 case RT5645_PRIV_DATA
:
457 case RT5645_IN1_CTRL1
:
458 case RT5645_IN1_CTRL2
:
459 case RT5645_IN1_CTRL3
:
460 case RT5645_A_JD_CTRL1
:
461 case RT5645_ADC_EQ_CTRL1
:
462 case RT5645_EQ_CTRL1
:
463 case RT5645_ALC_CTRL_1
:
464 case RT5645_IRQ_CTRL2
:
465 case RT5645_IRQ_CTRL3
:
466 case RT5645_INT_IRQ_ST
:
468 case RT5650_4BTN_IL_CMD1
:
469 case RT5645_VENDOR_ID
:
470 case RT5645_VENDOR_ID1
:
471 case RT5645_VENDOR_ID2
:
478 static bool rt5645_readable_register(struct device
*dev
, unsigned int reg
)
482 for (i
= 0; i
< ARRAY_SIZE(rt5645_ranges
); i
++) {
483 if (reg
>= rt5645_ranges
[i
].range_min
&&
484 reg
<= rt5645_ranges
[i
].range_max
) {
494 case RT5645_IN1_CTRL1
:
495 case RT5645_IN1_CTRL2
:
496 case RT5645_IN1_CTRL3
:
497 case RT5645_IN2_CTRL
:
498 case RT5645_INL1_INR1_VOL
:
499 case RT5645_SPK_FUNC_LIM
:
500 case RT5645_ADJ_HPF_CTRL
:
501 case RT5645_DAC1_DIG_VOL
:
502 case RT5645_DAC2_DIG_VOL
:
503 case RT5645_DAC_CTRL
:
504 case RT5645_STO1_ADC_DIG_VOL
:
505 case RT5645_MONO_ADC_DIG_VOL
:
506 case RT5645_ADC_BST_VOL1
:
507 case RT5645_ADC_BST_VOL2
:
508 case RT5645_STO1_ADC_MIXER
:
509 case RT5645_MONO_ADC_MIXER
:
510 case RT5645_AD_DA_MIXER
:
511 case RT5645_STO_DAC_MIXER
:
512 case RT5645_MONO_DAC_MIXER
:
513 case RT5645_DIG_MIXER
:
514 case RT5650_A_DAC_SOUR
:
515 case RT5645_DIG_INF1_DATA
:
516 case RT5645_PDM_OUT_CTRL
:
517 case RT5645_REC_L1_MIXER
:
518 case RT5645_REC_L2_MIXER
:
519 case RT5645_REC_R1_MIXER
:
520 case RT5645_REC_R2_MIXER
:
521 case RT5645_HPMIXL_CTRL
:
522 case RT5645_HPOMIXL_CTRL
:
523 case RT5645_HPMIXR_CTRL
:
524 case RT5645_HPOMIXR_CTRL
:
525 case RT5645_HPO_MIXER
:
526 case RT5645_SPK_L_MIXER
:
527 case RT5645_SPK_R_MIXER
:
528 case RT5645_SPO_MIXER
:
529 case RT5645_SPO_CLSD_RATIO
:
530 case RT5645_OUT_L1_MIXER
:
531 case RT5645_OUT_R1_MIXER
:
532 case RT5645_OUT_L_GAIN1
:
533 case RT5645_OUT_L_GAIN2
:
534 case RT5645_OUT_R_GAIN1
:
535 case RT5645_OUT_R_GAIN2
:
536 case RT5645_LOUT_MIXER
:
537 case RT5645_HAPTIC_CTRL1
:
538 case RT5645_HAPTIC_CTRL2
:
539 case RT5645_HAPTIC_CTRL3
:
540 case RT5645_HAPTIC_CTRL4
:
541 case RT5645_HAPTIC_CTRL5
:
542 case RT5645_HAPTIC_CTRL6
:
543 case RT5645_HAPTIC_CTRL7
:
544 case RT5645_HAPTIC_CTRL8
:
545 case RT5645_HAPTIC_CTRL9
:
546 case RT5645_HAPTIC_CTRL10
:
547 case RT5645_PWR_DIG1
:
548 case RT5645_PWR_DIG2
:
549 case RT5645_PWR_ANLG1
:
550 case RT5645_PWR_ANLG2
:
551 case RT5645_PWR_MIXER
:
553 case RT5645_PRIV_INDEX
:
554 case RT5645_PRIV_DATA
:
555 case RT5645_I2S1_SDP
:
556 case RT5645_I2S2_SDP
:
557 case RT5645_ADDA_CLK1
:
558 case RT5645_ADDA_CLK2
:
559 case RT5645_DMIC_CTRL1
:
560 case RT5645_DMIC_CTRL2
:
561 case RT5645_TDM_CTRL_1
:
562 case RT5645_TDM_CTRL_2
:
563 case RT5645_TDM_CTRL_3
:
564 case RT5650_TDM_CTRL_4
:
566 case RT5645_PLL_CTRL1
:
567 case RT5645_PLL_CTRL2
:
572 case RT5645_DEPOP_M1
:
573 case RT5645_DEPOP_M2
:
574 case RT5645_DEPOP_M3
:
575 case RT5645_CHARGE_PUMP
:
577 case RT5645_A_JD_CTRL1
:
578 case RT5645_VAD_CTRL4
:
579 case RT5645_CLSD_OUT_CTRL
:
580 case RT5645_ADC_EQ_CTRL1
:
581 case RT5645_ADC_EQ_CTRL2
:
582 case RT5645_EQ_CTRL1
:
583 case RT5645_EQ_CTRL2
:
584 case RT5645_ALC_CTRL_1
:
585 case RT5645_ALC_CTRL_2
:
586 case RT5645_ALC_CTRL_3
:
587 case RT5645_ALC_CTRL_4
:
588 case RT5645_ALC_CTRL_5
:
590 case RT5645_IRQ_CTRL1
:
591 case RT5645_IRQ_CTRL2
:
592 case RT5645_IRQ_CTRL3
:
593 case RT5645_INT_IRQ_ST
:
594 case RT5645_GPIO_CTRL1
:
595 case RT5645_GPIO_CTRL2
:
596 case RT5645_GPIO_CTRL3
:
597 case RT5645_BASS_BACK
:
598 case RT5645_MP3_PLUS1
:
599 case RT5645_MP3_PLUS2
:
600 case RT5645_ADJ_HPF1
:
601 case RT5645_ADJ_HPF2
:
602 case RT5645_HP_CALIB_AMP_DET
:
608 case RT5650_4BTN_IL_CMD1
:
609 case RT5650_4BTN_IL_CMD2
:
610 case RT5645_DRC1_HL_CTRL1
:
611 case RT5645_DRC2_HL_CTRL1
:
612 case RT5645_ADC_MONO_HP_CTRL1
:
613 case RT5645_ADC_MONO_HP_CTRL2
:
614 case RT5645_DRC2_CTRL1
:
615 case RT5645_DRC2_CTRL2
:
616 case RT5645_DRC2_CTRL3
:
617 case RT5645_DRC2_CTRL4
:
618 case RT5645_DRC2_CTRL5
:
619 case RT5645_JD_CTRL3
:
620 case RT5645_JD_CTRL4
:
621 case RT5645_GEN_CTRL1
:
622 case RT5645_GEN_CTRL2
:
623 case RT5645_GEN_CTRL3
:
624 case RT5645_VENDOR_ID
:
625 case RT5645_VENDOR_ID1
:
626 case RT5645_VENDOR_ID2
:
633 static const DECLARE_TLV_DB_SCALE(out_vol_tlv
, -4650, 150, 0);
634 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv
, -6525, 75, 0);
635 static const DECLARE_TLV_DB_SCALE(in_vol_tlv
, -3450, 150, 0);
636 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv
, -1725, 75, 0);
637 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv
, 0, 1200, 0);
639 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
640 static const DECLARE_TLV_DB_RANGE(bst_tlv
,
641 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
642 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
643 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
644 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
645 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
646 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
647 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
650 /* {-6, -4.5, -3, -1.5, 0, 0.82, 1.58, 2.28} dB */
651 static const DECLARE_TLV_DB_RANGE(spk_clsd_tlv
,
652 0, 4, TLV_DB_SCALE_ITEM(-600, 150, 0),
653 5, 5, TLV_DB_SCALE_ITEM(82, 0, 0),
654 6, 6, TLV_DB_SCALE_ITEM(158, 0, 0),
655 7, 7, TLV_DB_SCALE_ITEM(228, 0, 0)
658 static int rt5645_hweq_info(struct snd_kcontrol
*kcontrol
,
659 struct snd_ctl_elem_info
*uinfo
)
661 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BYTES
;
662 uinfo
->count
= RT5645_HWEQ_NUM
* sizeof(struct rt5645_eq_param_s
);
667 static int rt5645_hweq_get(struct snd_kcontrol
*kcontrol
,
668 struct snd_ctl_elem_value
*ucontrol
)
670 struct snd_soc_component
*component
= snd_kcontrol_chip(kcontrol
);
671 struct rt5645_priv
*rt5645
= snd_soc_component_get_drvdata(component
);
672 struct rt5645_eq_param_s
*eq_param
=
673 (struct rt5645_eq_param_s
*)ucontrol
->value
.bytes
.data
;
676 for (i
= 0; i
< RT5645_HWEQ_NUM
; i
++) {
677 eq_param
[i
].reg
= cpu_to_be16(rt5645
->eq_param
[i
].reg
);
678 eq_param
[i
].val
= cpu_to_be16(rt5645
->eq_param
[i
].val
);
684 static bool rt5645_validate_hweq(unsigned short reg
)
686 if ((reg
>= 0x1a4 && reg
<= 0x1cd) | (reg
>= 0x1e5 && reg
<= 0x1f8) |
687 (reg
== RT5645_EQ_CTRL2
))
693 static int rt5645_hweq_put(struct snd_kcontrol
*kcontrol
,
694 struct snd_ctl_elem_value
*ucontrol
)
696 struct snd_soc_component
*component
= snd_kcontrol_chip(kcontrol
);
697 struct rt5645_priv
*rt5645
= snd_soc_component_get_drvdata(component
);
698 struct rt5645_eq_param_s
*eq_param
=
699 (struct rt5645_eq_param_s
*)ucontrol
->value
.bytes
.data
;
702 for (i
= 0; i
< RT5645_HWEQ_NUM
; i
++) {
703 eq_param
[i
].reg
= be16_to_cpu(eq_param
[i
].reg
);
704 eq_param
[i
].val
= be16_to_cpu(eq_param
[i
].val
);
707 /* The final setting of the table should be RT5645_EQ_CTRL2 */
708 for (i
= RT5645_HWEQ_NUM
- 1; i
>= 0; i
--) {
709 if (eq_param
[i
].reg
== 0)
711 else if (eq_param
[i
].reg
!= RT5645_EQ_CTRL2
)
717 for (i
= 0; i
< RT5645_HWEQ_NUM
; i
++) {
718 if (!rt5645_validate_hweq(eq_param
[i
].reg
) &&
719 eq_param
[i
].reg
!= 0)
721 else if (eq_param
[i
].reg
== 0)
725 memcpy(rt5645
->eq_param
, eq_param
,
726 RT5645_HWEQ_NUM
* sizeof(struct rt5645_eq_param_s
));
731 #define RT5645_HWEQ(xname) \
732 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
733 .info = rt5645_hweq_info, \
734 .get = rt5645_hweq_get, \
735 .put = rt5645_hweq_put \
738 static int rt5645_spk_put_volsw(struct snd_kcontrol
*kcontrol
,
739 struct snd_ctl_elem_value
*ucontrol
)
741 struct snd_soc_component
*component
= snd_kcontrol_chip(kcontrol
);
742 struct rt5645_priv
*rt5645
= snd_soc_component_get_drvdata(component
);
745 regmap_update_bits(rt5645
->regmap
, RT5645_MICBIAS
,
746 RT5645_PWR_CLK25M_MASK
, RT5645_PWR_CLK25M_PU
);
748 ret
= snd_soc_put_volsw(kcontrol
, ucontrol
);
750 mod_delayed_work(system_power_efficient_wq
, &rt5645
->rcclock_work
,
751 msecs_to_jiffies(200));
756 static const char * const rt5645_dac1_vol_ctrl_mode_text
[] = {
757 "immediately", "zero crossing", "soft ramp"
760 static SOC_ENUM_SINGLE_DECL(
761 rt5645_dac1_vol_ctrl_mode
, RT5645_PR_BASE
,
762 RT5645_DA1_ZDET_SFT
, rt5645_dac1_vol_ctrl_mode_text
);
764 static const struct snd_kcontrol_new rt5645_snd_controls
[] = {
765 /* Speaker Output Volume */
766 SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL
,
767 RT5645_VOL_L_SFT
, RT5645_VOL_R_SFT
, 1, 1),
768 SOC_DOUBLE_EXT_TLV("Speaker Playback Volume", RT5645_SPK_VOL
,
769 RT5645_L_VOL_SFT
, RT5645_R_VOL_SFT
, 39, 1, snd_soc_get_volsw
,
770 rt5645_spk_put_volsw
, out_vol_tlv
),
772 /* ClassD modulator Speaker Gain Ratio */
773 SOC_SINGLE_TLV("Speaker ClassD Playback Volume", RT5645_SPO_CLSD_RATIO
,
774 RT5645_SPK_G_CLSD_SFT
, 7, 0, spk_clsd_tlv
),
776 /* Headphone Output Volume */
777 SOC_DOUBLE("Headphone Channel Switch", RT5645_HP_VOL
,
778 RT5645_VOL_L_SFT
, RT5645_VOL_R_SFT
, 1, 1),
779 SOC_DOUBLE_TLV("Headphone Playback Volume", RT5645_HP_VOL
,
780 RT5645_L_VOL_SFT
, RT5645_R_VOL_SFT
, 39, 1, out_vol_tlv
),
783 SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1
,
784 RT5645_L_MUTE_SFT
, RT5645_R_MUTE_SFT
, 1, 1),
785 SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1
,
786 RT5645_VOL_L_SFT
, RT5645_VOL_R_SFT
, 1, 1),
787 SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1
,
788 RT5645_L_VOL_SFT
, RT5645_R_VOL_SFT
, 39, 1, out_vol_tlv
),
790 /* DAC Digital Volume */
791 SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL
,
792 RT5645_M_DAC_L2_VOL_SFT
, RT5645_M_DAC_R2_VOL_SFT
, 1, 1),
793 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL
,
794 RT5645_L_VOL_SFT
+ 1, RT5645_R_VOL_SFT
+ 1, 87, 0, dac_vol_tlv
),
795 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL
,
796 RT5645_L_VOL_SFT
+ 1, RT5645_R_VOL_SFT
+ 1, 87, 0, dac_vol_tlv
),
798 /* IN1/IN2 Control */
799 SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1
,
800 RT5645_BST_SFT1
, 12, 0, bst_tlv
),
801 SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL
,
802 RT5645_BST_SFT2
, 8, 0, bst_tlv
),
804 /* INL/INR Volume Control */
805 SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL
,
806 RT5645_INL_VOL_SFT
, RT5645_INR_VOL_SFT
, 31, 1, in_vol_tlv
),
808 /* ADC Digital Volume Control */
809 SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL
,
810 RT5645_L_MUTE_SFT
, RT5645_R_MUTE_SFT
, 1, 1),
811 SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL
,
812 RT5645_L_VOL_SFT
+ 1, RT5645_R_VOL_SFT
+ 1, 63, 0, adc_vol_tlv
),
813 SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL
,
814 RT5645_L_MUTE_SFT
, RT5645_R_MUTE_SFT
, 1, 1),
815 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL
,
816 RT5645_L_VOL_SFT
+ 1, RT5645_R_VOL_SFT
+ 1, 63, 0, adc_vol_tlv
),
818 /* ADC Boost Volume Control */
819 SOC_DOUBLE_TLV("ADC Boost Capture Volume", RT5645_ADC_BST_VOL1
,
820 RT5645_STO1_ADC_L_BST_SFT
, RT5645_STO1_ADC_R_BST_SFT
, 3, 0,
822 SOC_DOUBLE_TLV("Mono ADC Boost Capture Volume", RT5645_ADC_BST_VOL2
,
823 RT5645_MONO_ADC_L_BST_SFT
, RT5645_MONO_ADC_R_BST_SFT
, 3, 0,
826 /* I2S2 function select */
827 SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1
, RT5645_I2S2_SEL_SFT
,
829 RT5645_HWEQ("Speaker HWEQ"),
831 /* Digital Soft Volume Control */
832 SOC_ENUM("DAC1 Digital Volume Control Func", rt5645_dac1_vol_ctrl_mode
),
836 * set_dmic_clk - Set parameter of dmic.
839 * @kcontrol: The kcontrol of this widget.
843 static int set_dmic_clk(struct snd_soc_dapm_widget
*w
,
844 struct snd_kcontrol
*kcontrol
, int event
)
846 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
847 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
850 rate
= rt5645
->sysclk
/ rl6231_get_pre_div(rt5645
->regmap
,
851 RT5645_ADDA_CLK1
, RT5645_I2S_PD1_SFT
);
852 idx
= rl6231_calc_dmic_clk(rate
);
854 dev_err(codec
->dev
, "Failed to set DMIC clock\n");
856 snd_soc_update_bits(codec
, RT5645_DMIC_CTRL1
,
857 RT5645_DMIC_CLK_MASK
, idx
<< RT5645_DMIC_CLK_SFT
);
861 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget
*source
,
862 struct snd_soc_dapm_widget
*sink
)
864 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(source
->dapm
);
867 val
= snd_soc_read(codec
, RT5645_GLB_CLK
);
868 val
&= RT5645_SCLK_SRC_MASK
;
869 if (val
== RT5645_SCLK_SRC_PLL1
)
875 static int is_using_asrc(struct snd_soc_dapm_widget
*source
,
876 struct snd_soc_dapm_widget
*sink
)
878 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(source
->dapm
);
879 unsigned int reg
, shift
, val
;
881 switch (source
->shift
) {
910 val
= (snd_soc_read(codec
, reg
) >> shift
) & 0xf;
923 static int rt5645_enable_hweq(struct snd_soc_codec
*codec
)
925 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
928 for (i
= 0; i
< RT5645_HWEQ_NUM
; i
++) {
929 if (rt5645_validate_hweq(rt5645
->eq_param
[i
].reg
))
930 regmap_write(rt5645
->regmap
, rt5645
->eq_param
[i
].reg
,
931 rt5645
->eq_param
[i
].val
);
940 * rt5645_sel_asrc_clk_src - select ASRC clock source for a set of filters
941 * @codec: SoC audio codec device.
942 * @filter_mask: mask of filters.
943 * @clk_src: clock source
945 * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5645 can
946 * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
947 * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
948 * ASRC function will track i2s clock and generate a corresponding system clock
949 * for codec. This function provides an API to select the clock source for a
950 * set of filters specified by the mask. And the codec driver will turn on ASRC
951 * for these filters if ASRC is selected as their clock source.
953 int rt5645_sel_asrc_clk_src(struct snd_soc_codec
*codec
,
954 unsigned int filter_mask
, unsigned int clk_src
)
956 unsigned int asrc2_mask
= 0;
957 unsigned int asrc2_value
= 0;
958 unsigned int asrc3_mask
= 0;
959 unsigned int asrc3_value
= 0;
962 case RT5645_CLK_SEL_SYS
:
963 case RT5645_CLK_SEL_I2S1_ASRC
:
964 case RT5645_CLK_SEL_I2S2_ASRC
:
965 case RT5645_CLK_SEL_SYS2
:
972 if (filter_mask
& RT5645_DA_STEREO_FILTER
) {
973 asrc2_mask
|= RT5645_DA_STO_CLK_SEL_MASK
;
974 asrc2_value
= (asrc2_value
& ~RT5645_DA_STO_CLK_SEL_MASK
)
975 | (clk_src
<< RT5645_DA_STO_CLK_SEL_SFT
);
978 if (filter_mask
& RT5645_DA_MONO_L_FILTER
) {
979 asrc2_mask
|= RT5645_DA_MONOL_CLK_SEL_MASK
;
980 asrc2_value
= (asrc2_value
& ~RT5645_DA_MONOL_CLK_SEL_MASK
)
981 | (clk_src
<< RT5645_DA_MONOL_CLK_SEL_SFT
);
984 if (filter_mask
& RT5645_DA_MONO_R_FILTER
) {
985 asrc2_mask
|= RT5645_DA_MONOR_CLK_SEL_MASK
;
986 asrc2_value
= (asrc2_value
& ~RT5645_DA_MONOR_CLK_SEL_MASK
)
987 | (clk_src
<< RT5645_DA_MONOR_CLK_SEL_SFT
);
990 if (filter_mask
& RT5645_AD_STEREO_FILTER
) {
991 asrc2_mask
|= RT5645_AD_STO1_CLK_SEL_MASK
;
992 asrc2_value
= (asrc2_value
& ~RT5645_AD_STO1_CLK_SEL_MASK
)
993 | (clk_src
<< RT5645_AD_STO1_CLK_SEL_SFT
);
996 if (filter_mask
& RT5645_AD_MONO_L_FILTER
) {
997 asrc3_mask
|= RT5645_AD_MONOL_CLK_SEL_MASK
;
998 asrc3_value
= (asrc3_value
& ~RT5645_AD_MONOL_CLK_SEL_MASK
)
999 | (clk_src
<< RT5645_AD_MONOL_CLK_SEL_SFT
);
1002 if (filter_mask
& RT5645_AD_MONO_R_FILTER
) {
1003 asrc3_mask
|= RT5645_AD_MONOR_CLK_SEL_MASK
;
1004 asrc3_value
= (asrc3_value
& ~RT5645_AD_MONOR_CLK_SEL_MASK
)
1005 | (clk_src
<< RT5645_AD_MONOR_CLK_SEL_SFT
);
1009 snd_soc_update_bits(codec
, RT5645_ASRC_2
,
1010 asrc2_mask
, asrc2_value
);
1013 snd_soc_update_bits(codec
, RT5645_ASRC_3
,
1014 asrc3_mask
, asrc3_value
);
1018 EXPORT_SYMBOL_GPL(rt5645_sel_asrc_clk_src
);
1021 static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix
[] = {
1022 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER
,
1023 RT5645_M_ADC_L1_SFT
, 1, 1),
1024 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER
,
1025 RT5645_M_ADC_L2_SFT
, 1, 1),
1028 static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix
[] = {
1029 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER
,
1030 RT5645_M_ADC_R1_SFT
, 1, 1),
1031 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER
,
1032 RT5645_M_ADC_R2_SFT
, 1, 1),
1035 static const struct snd_kcontrol_new rt5645_mono_adc_l_mix
[] = {
1036 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER
,
1037 RT5645_M_MONO_ADC_L1_SFT
, 1, 1),
1038 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER
,
1039 RT5645_M_MONO_ADC_L2_SFT
, 1, 1),
1042 static const struct snd_kcontrol_new rt5645_mono_adc_r_mix
[] = {
1043 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER
,
1044 RT5645_M_MONO_ADC_R1_SFT
, 1, 1),
1045 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER
,
1046 RT5645_M_MONO_ADC_R2_SFT
, 1, 1),
1049 static const struct snd_kcontrol_new rt5645_dac_l_mix
[] = {
1050 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER
,
1051 RT5645_M_ADCMIX_L_SFT
, 1, 1),
1052 SOC_DAPM_SINGLE_AUTODISABLE("DAC1 Switch", RT5645_AD_DA_MIXER
,
1053 RT5645_M_DAC1_L_SFT
, 1, 1),
1056 static const struct snd_kcontrol_new rt5645_dac_r_mix
[] = {
1057 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER
,
1058 RT5645_M_ADCMIX_R_SFT
, 1, 1),
1059 SOC_DAPM_SINGLE_AUTODISABLE("DAC1 Switch", RT5645_AD_DA_MIXER
,
1060 RT5645_M_DAC1_R_SFT
, 1, 1),
1063 static const struct snd_kcontrol_new rt5645_sto_dac_l_mix
[] = {
1064 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER
,
1065 RT5645_M_DAC_L1_SFT
, 1, 1),
1066 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER
,
1067 RT5645_M_DAC_L2_SFT
, 1, 1),
1068 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER
,
1069 RT5645_M_DAC_R1_STO_L_SFT
, 1, 1),
1072 static const struct snd_kcontrol_new rt5645_sto_dac_r_mix
[] = {
1073 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER
,
1074 RT5645_M_DAC_R1_SFT
, 1, 1),
1075 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER
,
1076 RT5645_M_DAC_R2_SFT
, 1, 1),
1077 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER
,
1078 RT5645_M_DAC_L1_STO_R_SFT
, 1, 1),
1081 static const struct snd_kcontrol_new rt5645_mono_dac_l_mix
[] = {
1082 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER
,
1083 RT5645_M_DAC_L1_MONO_L_SFT
, 1, 1),
1084 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER
,
1085 RT5645_M_DAC_L2_MONO_L_SFT
, 1, 1),
1086 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER
,
1087 RT5645_M_DAC_R2_MONO_L_SFT
, 1, 1),
1090 static const struct snd_kcontrol_new rt5645_mono_dac_r_mix
[] = {
1091 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER
,
1092 RT5645_M_DAC_R1_MONO_R_SFT
, 1, 1),
1093 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER
,
1094 RT5645_M_DAC_R2_MONO_R_SFT
, 1, 1),
1095 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER
,
1096 RT5645_M_DAC_L2_MONO_R_SFT
, 1, 1),
1099 static const struct snd_kcontrol_new rt5645_dig_l_mix
[] = {
1100 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER
,
1101 RT5645_M_STO_L_DAC_L_SFT
, 1, 1),
1102 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER
,
1103 RT5645_M_DAC_L2_DAC_L_SFT
, 1, 1),
1104 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER
,
1105 RT5645_M_DAC_R2_DAC_L_SFT
, 1, 1),
1108 static const struct snd_kcontrol_new rt5645_dig_r_mix
[] = {
1109 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER
,
1110 RT5645_M_STO_R_DAC_R_SFT
, 1, 1),
1111 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER
,
1112 RT5645_M_DAC_R2_DAC_R_SFT
, 1, 1),
1113 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER
,
1114 RT5645_M_DAC_L2_DAC_R_SFT
, 1, 1),
1117 /* Analog Input Mixer */
1118 static const struct snd_kcontrol_new rt5645_rec_l_mix
[] = {
1119 SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER
,
1120 RT5645_M_HP_L_RM_L_SFT
, 1, 1),
1121 SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER
,
1122 RT5645_M_IN_L_RM_L_SFT
, 1, 1),
1123 SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER
,
1124 RT5645_M_BST2_RM_L_SFT
, 1, 1),
1125 SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER
,
1126 RT5645_M_BST1_RM_L_SFT
, 1, 1),
1127 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER
,
1128 RT5645_M_OM_L_RM_L_SFT
, 1, 1),
1131 static const struct snd_kcontrol_new rt5645_rec_r_mix
[] = {
1132 SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER
,
1133 RT5645_M_HP_R_RM_R_SFT
, 1, 1),
1134 SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER
,
1135 RT5645_M_IN_R_RM_R_SFT
, 1, 1),
1136 SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER
,
1137 RT5645_M_BST2_RM_R_SFT
, 1, 1),
1138 SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER
,
1139 RT5645_M_BST1_RM_R_SFT
, 1, 1),
1140 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER
,
1141 RT5645_M_OM_R_RM_R_SFT
, 1, 1),
1144 static const struct snd_kcontrol_new rt5645_spk_l_mix
[] = {
1145 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER
,
1146 RT5645_M_DAC_L1_SM_L_SFT
, 1, 1),
1147 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER
,
1148 RT5645_M_DAC_L2_SM_L_SFT
, 1, 1),
1149 SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER
,
1150 RT5645_M_IN_L_SM_L_SFT
, 1, 1),
1151 SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER
,
1152 RT5645_M_BST1_L_SM_L_SFT
, 1, 1),
1155 static const struct snd_kcontrol_new rt5645_spk_r_mix
[] = {
1156 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER
,
1157 RT5645_M_DAC_R1_SM_R_SFT
, 1, 1),
1158 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER
,
1159 RT5645_M_DAC_R2_SM_R_SFT
, 1, 1),
1160 SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER
,
1161 RT5645_M_IN_R_SM_R_SFT
, 1, 1),
1162 SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER
,
1163 RT5645_M_BST2_R_SM_R_SFT
, 1, 1),
1166 static const struct snd_kcontrol_new rt5645_out_l_mix
[] = {
1167 SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER
,
1168 RT5645_M_BST1_OM_L_SFT
, 1, 1),
1169 SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER
,
1170 RT5645_M_IN_L_OM_L_SFT
, 1, 1),
1171 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER
,
1172 RT5645_M_DAC_L2_OM_L_SFT
, 1, 1),
1173 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER
,
1174 RT5645_M_DAC_L1_OM_L_SFT
, 1, 1),
1177 static const struct snd_kcontrol_new rt5645_out_r_mix
[] = {
1178 SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER
,
1179 RT5645_M_BST2_OM_R_SFT
, 1, 1),
1180 SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER
,
1181 RT5645_M_IN_R_OM_R_SFT
, 1, 1),
1182 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER
,
1183 RT5645_M_DAC_R2_OM_R_SFT
, 1, 1),
1184 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER
,
1185 RT5645_M_DAC_R1_OM_R_SFT
, 1, 1),
1188 static const struct snd_kcontrol_new rt5645_spo_l_mix
[] = {
1189 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER
,
1190 RT5645_M_DAC_R1_SPM_L_SFT
, 1, 1),
1191 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER
,
1192 RT5645_M_DAC_L1_SPM_L_SFT
, 1, 1),
1193 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER
,
1194 RT5645_M_SV_R_SPM_L_SFT
, 1, 1),
1195 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER
,
1196 RT5645_M_SV_L_SPM_L_SFT
, 1, 1),
1199 static const struct snd_kcontrol_new rt5645_spo_r_mix
[] = {
1200 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER
,
1201 RT5645_M_DAC_R1_SPM_R_SFT
, 1, 1),
1202 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER
,
1203 RT5645_M_SV_R_SPM_R_SFT
, 1, 1),
1206 static const struct snd_kcontrol_new rt5645_hpo_mix
[] = {
1207 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER
,
1208 RT5645_M_DAC1_HM_SFT
, 1, 1),
1209 SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER
,
1210 RT5645_M_HPVOL_HM_SFT
, 1, 1),
1213 static const struct snd_kcontrol_new rt5645_hpvoll_mix
[] = {
1214 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL
,
1215 RT5645_M_DAC1_HV_SFT
, 1, 1),
1216 SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL
,
1217 RT5645_M_DAC2_HV_SFT
, 1, 1),
1218 SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL
,
1219 RT5645_M_IN_HV_SFT
, 1, 1),
1220 SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL
,
1221 RT5645_M_BST1_HV_SFT
, 1, 1),
1224 static const struct snd_kcontrol_new rt5645_hpvolr_mix
[] = {
1225 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL
,
1226 RT5645_M_DAC1_HV_SFT
, 1, 1),
1227 SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL
,
1228 RT5645_M_DAC2_HV_SFT
, 1, 1),
1229 SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL
,
1230 RT5645_M_IN_HV_SFT
, 1, 1),
1231 SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL
,
1232 RT5645_M_BST2_HV_SFT
, 1, 1),
1235 static const struct snd_kcontrol_new rt5645_lout_mix
[] = {
1236 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER
,
1237 RT5645_M_DAC_L1_LM_SFT
, 1, 1),
1238 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER
,
1239 RT5645_M_DAC_R1_LM_SFT
, 1, 1),
1240 SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER
,
1241 RT5645_M_OV_L_LM_SFT
, 1, 1),
1242 SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER
,
1243 RT5645_M_OV_R_LM_SFT
, 1, 1),
1246 /*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
1247 static const char * const rt5645_dac1_src
[] = {
1248 "IF1 DAC", "IF2 DAC", "IF3 DAC"
1251 static SOC_ENUM_SINGLE_DECL(
1252 rt5645_dac1l_enum
, RT5645_AD_DA_MIXER
,
1253 RT5645_DAC1_L_SEL_SFT
, rt5645_dac1_src
);
1255 static const struct snd_kcontrol_new rt5645_dac1l_mux
=
1256 SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum
);
1258 static SOC_ENUM_SINGLE_DECL(
1259 rt5645_dac1r_enum
, RT5645_AD_DA_MIXER
,
1260 RT5645_DAC1_R_SEL_SFT
, rt5645_dac1_src
);
1262 static const struct snd_kcontrol_new rt5645_dac1r_mux
=
1263 SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum
);
1265 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
1266 static const char * const rt5645_dac12_src
[] = {
1267 "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
1270 static SOC_ENUM_SINGLE_DECL(
1271 rt5645_dac2l_enum
, RT5645_DAC_CTRL
,
1272 RT5645_DAC2_L_SEL_SFT
, rt5645_dac12_src
);
1274 static const struct snd_kcontrol_new rt5645_dac_l2_mux
=
1275 SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum
);
1277 static const char * const rt5645_dacr2_src
[] = {
1278 "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
1281 static SOC_ENUM_SINGLE_DECL(
1282 rt5645_dac2r_enum
, RT5645_DAC_CTRL
,
1283 RT5645_DAC2_R_SEL_SFT
, rt5645_dacr2_src
);
1285 static const struct snd_kcontrol_new rt5645_dac_r2_mux
=
1286 SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum
);
1290 static const char * const rt5645_inl_src
[] = {
1294 static SOC_ENUM_SINGLE_DECL(
1295 rt5645_inl_enum
, RT5645_INL1_INR1_VOL
,
1296 RT5645_INL_SEL_SFT
, rt5645_inl_src
);
1298 static const struct snd_kcontrol_new rt5645_inl_mux
=
1299 SOC_DAPM_ENUM("INL source", rt5645_inl_enum
);
1301 static const char * const rt5645_inr_src
[] = {
1305 static SOC_ENUM_SINGLE_DECL(
1306 rt5645_inr_enum
, RT5645_INL1_INR1_VOL
,
1307 RT5645_INR_SEL_SFT
, rt5645_inr_src
);
1309 static const struct snd_kcontrol_new rt5645_inr_mux
=
1310 SOC_DAPM_ENUM("INR source", rt5645_inr_enum
);
1312 /* Stereo1 ADC source */
1314 static const char * const rt5645_stereo_adc1_src
[] = {
1318 static SOC_ENUM_SINGLE_DECL(
1319 rt5645_stereo1_adc1_enum
, RT5645_STO1_ADC_MIXER
,
1320 RT5645_ADC_1_SRC_SFT
, rt5645_stereo_adc1_src
);
1322 static const struct snd_kcontrol_new rt5645_sto_adc1_mux
=
1323 SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum
);
1326 static const char * const rt5645_stereo_adc2_src
[] = {
1330 static SOC_ENUM_SINGLE_DECL(
1331 rt5645_stereo1_adc2_enum
, RT5645_STO1_ADC_MIXER
,
1332 RT5645_ADC_2_SRC_SFT
, rt5645_stereo_adc2_src
);
1334 static const struct snd_kcontrol_new rt5645_sto_adc2_mux
=
1335 SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum
);
1338 static const char * const rt5645_stereo_dmic_src
[] = {
1342 static SOC_ENUM_SINGLE_DECL(
1343 rt5645_stereo1_dmic_enum
, RT5645_STO1_ADC_MIXER
,
1344 RT5645_DMIC_SRC_SFT
, rt5645_stereo_dmic_src
);
1346 static const struct snd_kcontrol_new rt5645_sto1_dmic_mux
=
1347 SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum
);
1349 /* Mono ADC source */
1351 static const char * const rt5645_mono_adc_l1_src
[] = {
1352 "Mono DAC MIXL", "ADC"
1355 static SOC_ENUM_SINGLE_DECL(
1356 rt5645_mono_adc_l1_enum
, RT5645_MONO_ADC_MIXER
,
1357 RT5645_MONO_ADC_L1_SRC_SFT
, rt5645_mono_adc_l1_src
);
1359 static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux
=
1360 SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum
);
1362 static const char * const rt5645_mono_adc_l2_src
[] = {
1363 "Mono DAC MIXL", "DMIC"
1366 static SOC_ENUM_SINGLE_DECL(
1367 rt5645_mono_adc_l2_enum
, RT5645_MONO_ADC_MIXER
,
1368 RT5645_MONO_ADC_L2_SRC_SFT
, rt5645_mono_adc_l2_src
);
1370 static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux
=
1371 SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum
);
1374 static const char * const rt5645_mono_dmic_src
[] = {
1378 static SOC_ENUM_SINGLE_DECL(
1379 rt5645_mono_dmic_l_enum
, RT5645_MONO_ADC_MIXER
,
1380 RT5645_MONO_DMIC_L_SRC_SFT
, rt5645_mono_dmic_src
);
1382 static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux
=
1383 SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum
);
1385 static SOC_ENUM_SINGLE_DECL(
1386 rt5645_mono_dmic_r_enum
, RT5645_MONO_ADC_MIXER
,
1387 RT5645_MONO_DMIC_R_SRC_SFT
, rt5645_mono_dmic_src
);
1389 static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux
=
1390 SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum
);
1392 static const char * const rt5645_mono_adc_r1_src
[] = {
1393 "Mono DAC MIXR", "ADC"
1396 static SOC_ENUM_SINGLE_DECL(
1397 rt5645_mono_adc_r1_enum
, RT5645_MONO_ADC_MIXER
,
1398 RT5645_MONO_ADC_R1_SRC_SFT
, rt5645_mono_adc_r1_src
);
1400 static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux
=
1401 SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum
);
1403 static const char * const rt5645_mono_adc_r2_src
[] = {
1404 "Mono DAC MIXR", "DMIC"
1407 static SOC_ENUM_SINGLE_DECL(
1408 rt5645_mono_adc_r2_enum
, RT5645_MONO_ADC_MIXER
,
1409 RT5645_MONO_ADC_R2_SRC_SFT
, rt5645_mono_adc_r2_src
);
1411 static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux
=
1412 SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum
);
1415 static const char * const rt5645_if1_adc_in_src
[] = {
1416 "IF_ADC1/IF_ADC2/VAD_ADC", "IF_ADC2/IF_ADC1/VAD_ADC",
1417 "VAD_ADC/IF_ADC1/IF_ADC2", "VAD_ADC/IF_ADC2/IF_ADC1"
1420 static SOC_ENUM_SINGLE_DECL(
1421 rt5645_if1_adc_in_enum
, RT5645_TDM_CTRL_1
,
1422 RT5645_IF1_ADC_IN_SFT
, rt5645_if1_adc_in_src
);
1424 static const struct snd_kcontrol_new rt5645_if1_adc_in_mux
=
1425 SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum
);
1428 static const char * const rt5650_if1_adc_in_src
[] = {
1429 "IF_ADC1/IF_ADC2/DAC_REF/Null",
1430 "IF_ADC1/IF_ADC2/Null/DAC_REF",
1431 "IF_ADC1/DAC_REF/IF_ADC2/Null",
1432 "IF_ADC1/DAC_REF/Null/IF_ADC2",
1433 "IF_ADC1/Null/DAC_REF/IF_ADC2",
1434 "IF_ADC1/Null/IF_ADC2/DAC_REF",
1436 "IF_ADC2/IF_ADC1/DAC_REF/Null",
1437 "IF_ADC2/IF_ADC1/Null/DAC_REF",
1438 "IF_ADC2/DAC_REF/IF_ADC1/Null",
1439 "IF_ADC2/DAC_REF/Null/IF_ADC1",
1440 "IF_ADC2/Null/DAC_REF/IF_ADC1",
1441 "IF_ADC2/Null/IF_ADC1/DAC_REF",
1443 "DAC_REF/IF_ADC1/IF_ADC2/Null",
1444 "DAC_REF/IF_ADC1/Null/IF_ADC2",
1445 "DAC_REF/IF_ADC2/IF_ADC1/Null",
1446 "DAC_REF/IF_ADC2/Null/IF_ADC1",
1447 "DAC_REF/Null/IF_ADC1/IF_ADC2",
1448 "DAC_REF/Null/IF_ADC2/IF_ADC1",
1450 "Null/IF_ADC1/IF_ADC2/DAC_REF",
1451 "Null/IF_ADC1/DAC_REF/IF_ADC2",
1452 "Null/IF_ADC2/IF_ADC1/DAC_REF",
1453 "Null/IF_ADC2/DAC_REF/IF_ADC1",
1454 "Null/DAC_REF/IF_ADC1/IF_ADC2",
1455 "Null/DAC_REF/IF_ADC2/IF_ADC1",
1458 static SOC_ENUM_SINGLE_DECL(
1459 rt5650_if1_adc_in_enum
, RT5645_TDM_CTRL_2
,
1460 0, rt5650_if1_adc_in_src
);
1462 static const struct snd_kcontrol_new rt5650_if1_adc_in_mux
=
1463 SOC_DAPM_ENUM("IF1 ADC IN source", rt5650_if1_adc_in_enum
);
1465 /* MX-78 [15:14][13:12][11:10] */
1466 static const char * const rt5645_tdm_adc_swap_select
[] = {
1467 "L/R", "R/L", "L/L", "R/R"
1470 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot0_1_enum
,
1471 RT5645_TDM_CTRL_2
, 14, rt5645_tdm_adc_swap_select
);
1473 static const struct snd_kcontrol_new rt5650_if1_adc1_in_mux
=
1474 SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5650_tdm_adc_slot0_1_enum
);
1476 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot2_3_enum
,
1477 RT5645_TDM_CTRL_2
, 12, rt5645_tdm_adc_swap_select
);
1479 static const struct snd_kcontrol_new rt5650_if1_adc2_in_mux
=
1480 SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5650_tdm_adc_slot2_3_enum
);
1482 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot4_5_enum
,
1483 RT5645_TDM_CTRL_2
, 10, rt5645_tdm_adc_swap_select
);
1485 static const struct snd_kcontrol_new rt5650_if1_adc3_in_mux
=
1486 SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5650_tdm_adc_slot4_5_enum
);
1488 /* MX-77 [7:6][5:4][3:2] */
1489 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum
,
1490 RT5645_TDM_CTRL_1
, 6, rt5645_tdm_adc_swap_select
);
1492 static const struct snd_kcontrol_new rt5645_if1_adc1_in_mux
=
1493 SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5645_tdm_adc_slot0_1_enum
);
1495 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum
,
1496 RT5645_TDM_CTRL_1
, 4, rt5645_tdm_adc_swap_select
);
1498 static const struct snd_kcontrol_new rt5645_if1_adc2_in_mux
=
1499 SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5645_tdm_adc_slot2_3_enum
);
1501 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum
,
1502 RT5645_TDM_CTRL_1
, 2, rt5645_tdm_adc_swap_select
);
1504 static const struct snd_kcontrol_new rt5645_if1_adc3_in_mux
=
1505 SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5645_tdm_adc_slot4_5_enum
);
1507 /* MX-79 [14:12][10:8][6:4][2:0] */
1508 static const char * const rt5645_tdm_dac_swap_select
[] = {
1509 "Slot0", "Slot1", "Slot2", "Slot3"
1512 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac0_enum
,
1513 RT5645_TDM_CTRL_3
, 12, rt5645_tdm_dac_swap_select
);
1515 static const struct snd_kcontrol_new rt5645_if1_dac0_tdm_sel_mux
=
1516 SOC_DAPM_ENUM("IF1 DAC0 source", rt5645_tdm_dac0_enum
);
1518 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac1_enum
,
1519 RT5645_TDM_CTRL_3
, 8, rt5645_tdm_dac_swap_select
);
1521 static const struct snd_kcontrol_new rt5645_if1_dac1_tdm_sel_mux
=
1522 SOC_DAPM_ENUM("IF1 DAC1 source", rt5645_tdm_dac1_enum
);
1524 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac2_enum
,
1525 RT5645_TDM_CTRL_3
, 4, rt5645_tdm_dac_swap_select
);
1527 static const struct snd_kcontrol_new rt5645_if1_dac2_tdm_sel_mux
=
1528 SOC_DAPM_ENUM("IF1 DAC2 source", rt5645_tdm_dac2_enum
);
1530 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac3_enum
,
1531 RT5645_TDM_CTRL_3
, 0, rt5645_tdm_dac_swap_select
);
1533 static const struct snd_kcontrol_new rt5645_if1_dac3_tdm_sel_mux
=
1534 SOC_DAPM_ENUM("IF1 DAC3 source", rt5645_tdm_dac3_enum
);
1536 /* MX-7a [14:12][10:8][6:4][2:0] */
1537 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac0_enum
,
1538 RT5650_TDM_CTRL_4
, 12, rt5645_tdm_dac_swap_select
);
1540 static const struct snd_kcontrol_new rt5650_if1_dac0_tdm_sel_mux
=
1541 SOC_DAPM_ENUM("IF1 DAC0 source", rt5650_tdm_dac0_enum
);
1543 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac1_enum
,
1544 RT5650_TDM_CTRL_4
, 8, rt5645_tdm_dac_swap_select
);
1546 static const struct snd_kcontrol_new rt5650_if1_dac1_tdm_sel_mux
=
1547 SOC_DAPM_ENUM("IF1 DAC1 source", rt5650_tdm_dac1_enum
);
1549 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac2_enum
,
1550 RT5650_TDM_CTRL_4
, 4, rt5645_tdm_dac_swap_select
);
1552 static const struct snd_kcontrol_new rt5650_if1_dac2_tdm_sel_mux
=
1553 SOC_DAPM_ENUM("IF1 DAC2 source", rt5650_tdm_dac2_enum
);
1555 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac3_enum
,
1556 RT5650_TDM_CTRL_4
, 0, rt5645_tdm_dac_swap_select
);
1558 static const struct snd_kcontrol_new rt5650_if1_dac3_tdm_sel_mux
=
1559 SOC_DAPM_ENUM("IF1 DAC3 source", rt5650_tdm_dac3_enum
);
1562 static const char * const rt5650_a_dac1_src
[] = {
1563 "DAC1", "Stereo DAC Mixer"
1566 static SOC_ENUM_SINGLE_DECL(
1567 rt5650_a_dac1_l_enum
, RT5650_A_DAC_SOUR
,
1568 RT5650_A_DAC1_L_IN_SFT
, rt5650_a_dac1_src
);
1570 static const struct snd_kcontrol_new rt5650_a_dac1_l_mux
=
1571 SOC_DAPM_ENUM("A DAC1 L source", rt5650_a_dac1_l_enum
);
1573 static SOC_ENUM_SINGLE_DECL(
1574 rt5650_a_dac1_r_enum
, RT5650_A_DAC_SOUR
,
1575 RT5650_A_DAC1_R_IN_SFT
, rt5650_a_dac1_src
);
1577 static const struct snd_kcontrol_new rt5650_a_dac1_r_mux
=
1578 SOC_DAPM_ENUM("A DAC1 R source", rt5650_a_dac1_r_enum
);
1581 static const char * const rt5650_a_dac2_src
[] = {
1582 "Stereo DAC Mixer", "Mono DAC Mixer"
1585 static SOC_ENUM_SINGLE_DECL(
1586 rt5650_a_dac2_l_enum
, RT5650_A_DAC_SOUR
,
1587 RT5650_A_DAC2_L_IN_SFT
, rt5650_a_dac2_src
);
1589 static const struct snd_kcontrol_new rt5650_a_dac2_l_mux
=
1590 SOC_DAPM_ENUM("A DAC2 L source", rt5650_a_dac2_l_enum
);
1592 static SOC_ENUM_SINGLE_DECL(
1593 rt5650_a_dac2_r_enum
, RT5650_A_DAC_SOUR
,
1594 RT5650_A_DAC2_R_IN_SFT
, rt5650_a_dac2_src
);
1596 static const struct snd_kcontrol_new rt5650_a_dac2_r_mux
=
1597 SOC_DAPM_ENUM("A DAC2 R source", rt5650_a_dac2_r_enum
);
1600 static const char * const rt5645_if2_adc_in_src
[] = {
1601 "IF_ADC1", "IF_ADC2", "VAD_ADC"
1604 static SOC_ENUM_SINGLE_DECL(
1605 rt5645_if2_adc_in_enum
, RT5645_DIG_INF1_DATA
,
1606 RT5645_IF2_ADC_IN_SFT
, rt5645_if2_adc_in_src
);
1608 static const struct snd_kcontrol_new rt5645_if2_adc_in_mux
=
1609 SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum
);
1612 static const char * const rt5645_if3_adc_in_src
[] = {
1613 "IF_ADC1", "IF_ADC2", "VAD_ADC"
1616 static SOC_ENUM_SINGLE_DECL(
1617 rt5645_if3_adc_in_enum
, RT5645_DIG_INF1_DATA
,
1618 RT5645_IF3_ADC_IN_SFT
, rt5645_if3_adc_in_src
);
1620 static const struct snd_kcontrol_new rt5645_if3_adc_in_mux
=
1621 SOC_DAPM_ENUM("IF3 ADC IN source", rt5645_if3_adc_in_enum
);
1623 /* MX-31 [15] [13] [11] [9] */
1624 static const char * const rt5645_pdm_src
[] = {
1625 "Mono DAC", "Stereo DAC"
1628 static SOC_ENUM_SINGLE_DECL(
1629 rt5645_pdm1_l_enum
, RT5645_PDM_OUT_CTRL
,
1630 RT5645_PDM1_L_SFT
, rt5645_pdm_src
);
1632 static const struct snd_kcontrol_new rt5645_pdm1_l_mux
=
1633 SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum
);
1635 static SOC_ENUM_SINGLE_DECL(
1636 rt5645_pdm1_r_enum
, RT5645_PDM_OUT_CTRL
,
1637 RT5645_PDM1_R_SFT
, rt5645_pdm_src
);
1639 static const struct snd_kcontrol_new rt5645_pdm1_r_mux
=
1640 SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum
);
1643 static const char * const rt5645_vad_adc_src
[] = {
1644 "Sto1 ADC L", "Mono ADC L", "Mono ADC R"
1647 static SOC_ENUM_SINGLE_DECL(
1648 rt5645_vad_adc_enum
, RT5645_VAD_CTRL4
,
1649 RT5645_VAD_SEL_SFT
, rt5645_vad_adc_src
);
1651 static const struct snd_kcontrol_new rt5645_vad_adc_mux
=
1652 SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum
);
1654 static const struct snd_kcontrol_new spk_l_vol_control
=
1655 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL
,
1656 RT5645_L_MUTE_SFT
, 1, 1);
1658 static const struct snd_kcontrol_new spk_r_vol_control
=
1659 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL
,
1660 RT5645_R_MUTE_SFT
, 1, 1);
1662 static const struct snd_kcontrol_new hp_l_vol_control
=
1663 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL
,
1664 RT5645_L_MUTE_SFT
, 1, 1);
1666 static const struct snd_kcontrol_new hp_r_vol_control
=
1667 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL
,
1668 RT5645_R_MUTE_SFT
, 1, 1);
1670 static const struct snd_kcontrol_new pdm1_l_vol_control
=
1671 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL
,
1672 RT5645_M_PDM1_L
, 1, 1);
1674 static const struct snd_kcontrol_new pdm1_r_vol_control
=
1675 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL
,
1676 RT5645_M_PDM1_R
, 1, 1);
1678 static void hp_amp_power(struct snd_soc_codec
*codec
, int on
)
1680 static int hp_amp_power_count
;
1681 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
1684 if (hp_amp_power_count
<= 0) {
1685 if (rt5645
->codec_type
== CODEC_TYPE_RT5650
) {
1686 snd_soc_write(codec
, RT5645_DEPOP_M2
, 0x3100);
1687 snd_soc_write(codec
, RT5645_CHARGE_PUMP
,
1689 snd_soc_write(codec
, RT5645_DEPOP_M1
, 0x000d);
1690 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1691 RT5645_HP_DCC_INT1
, 0x9f01);
1693 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1694 RT5645_HP_CO_MASK
, RT5645_HP_CO_EN
);
1695 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1697 snd_soc_write(codec
, RT5645_DEPOP_M3
, 0x0737);
1698 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1699 RT5645_MAMP_INT_REG2
, 0xfc00);
1700 snd_soc_write(codec
, RT5645_DEPOP_M2
, 0x1140);
1702 rt5645
->hp_on
= true;
1704 /* depop parameters */
1705 snd_soc_update_bits(codec
, RT5645_DEPOP_M2
,
1706 RT5645_DEPOP_MASK
, RT5645_DEPOP_MAN
);
1707 snd_soc_write(codec
, RT5645_DEPOP_M1
, 0x000d);
1708 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1709 RT5645_HP_DCC_INT1
, 0x9f01);
1711 /* headphone amp power on */
1712 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
1713 RT5645_PWR_FV1
| RT5645_PWR_FV2
, 0);
1714 snd_soc_update_bits(codec
, RT5645_PWR_VOL
,
1715 RT5645_PWR_HV_L
| RT5645_PWR_HV_R
,
1716 RT5645_PWR_HV_L
| RT5645_PWR_HV_R
);
1717 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
1718 RT5645_PWR_HP_L
| RT5645_PWR_HP_R
|
1720 RT5645_PWR_HP_L
| RT5645_PWR_HP_R
|
1723 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
1724 RT5645_PWR_FV1
| RT5645_PWR_FV2
,
1725 RT5645_PWR_FV1
| RT5645_PWR_FV2
);
1727 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1728 RT5645_HP_CO_MASK
| RT5645_HP_SG_MASK
,
1729 RT5645_HP_CO_EN
| RT5645_HP_SG_EN
);
1730 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1732 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1736 hp_amp_power_count
++;
1738 hp_amp_power_count
--;
1739 if (hp_amp_power_count
<= 0) {
1740 if (rt5645
->codec_type
== CODEC_TYPE_RT5650
) {
1741 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1743 snd_soc_write(codec
, RT5645_DEPOP_M3
, 0x0737);
1744 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1745 RT5645_MAMP_INT_REG2
, 0xfc00);
1746 snd_soc_write(codec
, RT5645_DEPOP_M2
, 0x1140);
1748 snd_soc_write(codec
, RT5645_DEPOP_M1
, 0x0001);
1751 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1753 RT5645_HP_L_SMT_MASK
|
1754 RT5645_HP_R_SMT_MASK
,
1756 RT5645_HP_L_SMT_DIS
|
1757 RT5645_HP_R_SMT_DIS
);
1758 /* headphone amp power down */
1759 snd_soc_write(codec
, RT5645_DEPOP_M1
, 0x0000);
1760 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
1761 RT5645_PWR_HP_L
| RT5645_PWR_HP_R
|
1763 snd_soc_update_bits(codec
, RT5645_DEPOP_M2
,
1764 RT5645_DEPOP_MASK
, 0);
1770 static int rt5645_hp_event(struct snd_soc_dapm_widget
*w
,
1771 struct snd_kcontrol
*kcontrol
, int event
)
1773 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
1774 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
1777 case SND_SOC_DAPM_POST_PMU
:
1778 hp_amp_power(codec
, 1);
1779 /* headphone unmute sequence */
1780 if (rt5645
->codec_type
== CODEC_TYPE_RT5645
) {
1781 snd_soc_update_bits(codec
, RT5645_DEPOP_M3
,
1782 RT5645_CP_FQ1_MASK
| RT5645_CP_FQ2_MASK
|
1784 (RT5645_CP_FQ_192_KHZ
<< RT5645_CP_FQ1_SFT
) |
1785 (RT5645_CP_FQ_12_KHZ
<< RT5645_CP_FQ2_SFT
) |
1786 (RT5645_CP_FQ_192_KHZ
<< RT5645_CP_FQ3_SFT
));
1787 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1788 RT5645_MAMP_INT_REG2
, 0xfc00);
1789 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1790 RT5645_SMT_TRIG_MASK
, RT5645_SMT_TRIG_EN
);
1791 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1792 RT5645_RSTN_MASK
, RT5645_RSTN_EN
);
1793 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1794 RT5645_RSTN_MASK
| RT5645_HP_L_SMT_MASK
|
1795 RT5645_HP_R_SMT_MASK
, RT5645_RSTN_DIS
|
1796 RT5645_HP_L_SMT_EN
| RT5645_HP_R_SMT_EN
);
1798 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1799 RT5645_HP_SG_MASK
| RT5645_HP_L_SMT_MASK
|
1800 RT5645_HP_R_SMT_MASK
, RT5645_HP_SG_DIS
|
1801 RT5645_HP_L_SMT_DIS
| RT5645_HP_R_SMT_DIS
);
1805 case SND_SOC_DAPM_PRE_PMD
:
1806 /* headphone mute sequence */
1807 if (rt5645
->codec_type
== CODEC_TYPE_RT5645
) {
1808 snd_soc_update_bits(codec
, RT5645_DEPOP_M3
,
1809 RT5645_CP_FQ1_MASK
| RT5645_CP_FQ2_MASK
|
1811 (RT5645_CP_FQ_96_KHZ
<< RT5645_CP_FQ1_SFT
) |
1812 (RT5645_CP_FQ_12_KHZ
<< RT5645_CP_FQ2_SFT
) |
1813 (RT5645_CP_FQ_96_KHZ
<< RT5645_CP_FQ3_SFT
));
1814 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1815 RT5645_MAMP_INT_REG2
, 0xfc00);
1816 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1817 RT5645_HP_SG_MASK
, RT5645_HP_SG_EN
);
1818 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1819 RT5645_RSTP_MASK
, RT5645_RSTP_EN
);
1820 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1821 RT5645_RSTP_MASK
| RT5645_HP_L_SMT_MASK
|
1822 RT5645_HP_R_SMT_MASK
, RT5645_RSTP_DIS
|
1823 RT5645_HP_L_SMT_EN
| RT5645_HP_R_SMT_EN
);
1826 hp_amp_power(codec
, 0);
1836 static int rt5645_spk_event(struct snd_soc_dapm_widget
*w
,
1837 struct snd_kcontrol
*kcontrol
, int event
)
1839 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
1842 case SND_SOC_DAPM_POST_PMU
:
1843 rt5645_enable_hweq(codec
);
1844 snd_soc_update_bits(codec
, RT5645_PWR_DIG1
,
1845 RT5645_PWR_CLS_D
| RT5645_PWR_CLS_D_R
|
1847 RT5645_PWR_CLS_D
| RT5645_PWR_CLS_D_R
|
1848 RT5645_PWR_CLS_D_L
);
1849 snd_soc_update_bits(codec
, RT5645_GEN_CTRL3
,
1850 RT5645_DET_CLK_MASK
, RT5645_DET_CLK_MODE1
);
1853 case SND_SOC_DAPM_PRE_PMD
:
1854 snd_soc_update_bits(codec
, RT5645_GEN_CTRL3
,
1855 RT5645_DET_CLK_MASK
, RT5645_DET_CLK_DIS
);
1856 snd_soc_write(codec
, RT5645_EQ_CTRL2
, 0);
1857 snd_soc_update_bits(codec
, RT5645_PWR_DIG1
,
1858 RT5645_PWR_CLS_D
| RT5645_PWR_CLS_D_R
|
1859 RT5645_PWR_CLS_D_L
, 0);
1869 static int rt5645_lout_event(struct snd_soc_dapm_widget
*w
,
1870 struct snd_kcontrol
*kcontrol
, int event
)
1872 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
1875 case SND_SOC_DAPM_POST_PMU
:
1876 hp_amp_power(codec
, 1);
1877 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
1878 RT5645_PWR_LM
, RT5645_PWR_LM
);
1879 snd_soc_update_bits(codec
, RT5645_LOUT1
,
1880 RT5645_L_MUTE
| RT5645_R_MUTE
, 0);
1883 case SND_SOC_DAPM_PRE_PMD
:
1884 snd_soc_update_bits(codec
, RT5645_LOUT1
,
1885 RT5645_L_MUTE
| RT5645_R_MUTE
,
1886 RT5645_L_MUTE
| RT5645_R_MUTE
);
1887 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
1889 hp_amp_power(codec
, 0);
1899 static int rt5645_bst2_event(struct snd_soc_dapm_widget
*w
,
1900 struct snd_kcontrol
*kcontrol
, int event
)
1902 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
1905 case SND_SOC_DAPM_POST_PMU
:
1906 snd_soc_update_bits(codec
, RT5645_PWR_ANLG2
,
1907 RT5645_PWR_BST2_P
, RT5645_PWR_BST2_P
);
1910 case SND_SOC_DAPM_PRE_PMD
:
1911 snd_soc_update_bits(codec
, RT5645_PWR_ANLG2
,
1912 RT5645_PWR_BST2_P
, 0);
1922 static int rt5650_hp_event(struct snd_soc_dapm_widget
*w
,
1923 struct snd_kcontrol
*k
, int event
)
1925 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
1926 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
1929 case SND_SOC_DAPM_POST_PMU
:
1930 if (rt5645
->hp_on
) {
1932 rt5645
->hp_on
= false;
1943 static const struct snd_soc_dapm_widget rt5645_dapm_widgets
[] = {
1944 SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER
,
1945 RT5645_PWR_LDO2_BIT
, 0, NULL
, 0),
1946 SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2
,
1947 RT5645_PWR_PLL_BIT
, 0, NULL
, 0),
1949 SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2
,
1950 RT5645_PWR_JD1_BIT
, 0, NULL
, 0),
1951 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL
,
1952 RT5645_PWR_MIC_DET_BIT
, 0, NULL
, 0),
1955 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5645_ASRC_1
,
1957 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5645_ASRC_1
,
1959 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5645_ASRC_1
,
1961 SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5645_ASRC_1
,
1963 SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5645_ASRC_1
,
1965 SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5645_ASRC_1
,
1967 SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5645_ASRC_1
,
1969 SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5645_ASRC_1
,
1971 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5645_ASRC_1
,
1973 SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5645_ASRC_1
,
1975 SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5645_ASRC_1
,
1980 SND_SOC_DAPM_MICBIAS("micbias1", RT5645_PWR_ANLG2
,
1981 RT5645_PWR_MB1_BIT
, 0),
1982 SND_SOC_DAPM_MICBIAS("micbias2", RT5645_PWR_ANLG2
,
1983 RT5645_PWR_MB2_BIT
, 0),
1985 SND_SOC_DAPM_INPUT("DMIC L1"),
1986 SND_SOC_DAPM_INPUT("DMIC R1"),
1987 SND_SOC_DAPM_INPUT("DMIC L2"),
1988 SND_SOC_DAPM_INPUT("DMIC R2"),
1990 SND_SOC_DAPM_INPUT("IN1P"),
1991 SND_SOC_DAPM_INPUT("IN1N"),
1992 SND_SOC_DAPM_INPUT("IN2P"),
1993 SND_SOC_DAPM_INPUT("IN2N"),
1995 SND_SOC_DAPM_INPUT("Haptic Generator"),
1997 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1998 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1999 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM
, 0, 0,
2000 set_dmic_clk
, SND_SOC_DAPM_PRE_PMU
),
2001 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1
,
2002 RT5645_DMIC_1_EN_SFT
, 0, NULL
, 0),
2003 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1
,
2004 RT5645_DMIC_2_EN_SFT
, 0, NULL
, 0),
2006 SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2
,
2007 RT5645_PWR_BST1_BIT
, 0, NULL
, 0),
2008 SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2
,
2009 RT5645_PWR_BST2_BIT
, 0, NULL
, 0, rt5645_bst2_event
,
2010 SND_SOC_DAPM_PRE_PMD
| SND_SOC_DAPM_POST_PMU
),
2012 SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL
,
2013 RT5645_PWR_IN_L_BIT
, 0, NULL
, 0),
2014 SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL
,
2015 RT5645_PWR_IN_R_BIT
, 0, NULL
, 0),
2017 SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER
, RT5645_PWR_RM_L_BIT
,
2018 0, rt5645_rec_l_mix
, ARRAY_SIZE(rt5645_rec_l_mix
)),
2019 SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER
, RT5645_PWR_RM_R_BIT
,
2020 0, rt5645_rec_r_mix
, ARRAY_SIZE(rt5645_rec_r_mix
)),
2022 SND_SOC_DAPM_ADC("ADC L", NULL
, SND_SOC_NOPM
, 0, 0),
2023 SND_SOC_DAPM_ADC("ADC R", NULL
, SND_SOC_NOPM
, 0, 0),
2025 SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1
,
2026 RT5645_PWR_ADC_L_BIT
, 0, NULL
, 0),
2027 SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1
,
2028 RT5645_PWR_ADC_R_BIT
, 0, NULL
, 0),
2031 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM
, 0, 0,
2032 &rt5645_sto1_dmic_mux
),
2033 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM
, 0, 0,
2034 &rt5645_sto_adc2_mux
),
2035 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM
, 0, 0,
2036 &rt5645_sto_adc2_mux
),
2037 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM
, 0, 0,
2038 &rt5645_sto_adc1_mux
),
2039 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM
, 0, 0,
2040 &rt5645_sto_adc1_mux
),
2041 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM
, 0, 0,
2042 &rt5645_mono_dmic_l_mux
),
2043 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM
, 0, 0,
2044 &rt5645_mono_dmic_r_mux
),
2045 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM
, 0, 0,
2046 &rt5645_mono_adc_l2_mux
),
2047 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM
, 0, 0,
2048 &rt5645_mono_adc_l1_mux
),
2049 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM
, 0, 0,
2050 &rt5645_mono_adc_r1_mux
),
2051 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM
, 0, 0,
2052 &rt5645_mono_adc_r2_mux
),
2055 SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2
,
2056 RT5645_PWR_ADC_S1F_BIT
, 0, NULL
, 0),
2057 SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM
, 0, 0,
2058 rt5645_sto1_adc_l_mix
, ARRAY_SIZE(rt5645_sto1_adc_l_mix
),
2060 SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM
, 0, 0,
2061 rt5645_sto1_adc_r_mix
, ARRAY_SIZE(rt5645_sto1_adc_r_mix
),
2063 SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2
,
2064 RT5645_PWR_ADC_MF_L_BIT
, 0, NULL
, 0),
2065 SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM
, 0, 0,
2066 rt5645_mono_adc_l_mix
, ARRAY_SIZE(rt5645_mono_adc_l_mix
),
2068 SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2
,
2069 RT5645_PWR_ADC_MF_R_BIT
, 0, NULL
, 0),
2070 SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM
, 0, 0,
2071 rt5645_mono_adc_r_mix
, ARRAY_SIZE(rt5645_mono_adc_r_mix
),
2075 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2076 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2077 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2078 SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2079 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2080 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2081 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2082 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2083 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2084 SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2087 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM
,
2088 0, 0, &rt5645_if2_adc_in_mux
),
2090 /* Digital Interface */
2091 SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1
,
2092 RT5645_PWR_I2S1_BIT
, 0, NULL
, 0),
2093 SND_SOC_DAPM_PGA("IF1 DAC0", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2094 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2095 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2096 SND_SOC_DAPM_PGA("IF1 DAC3", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2097 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2098 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2099 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2100 SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1
,
2101 RT5645_PWR_I2S2_BIT
, 0, NULL
, 0),
2102 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2103 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2104 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2105 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2107 /* Digital Interface Select */
2108 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM
,
2109 0, 0, &rt5645_vad_adc_mux
),
2111 /* Audio Interface */
2112 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM
, 0, 0),
2113 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM
, 0, 0),
2114 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM
, 0, 0),
2115 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM
, 0, 0),
2118 /* DAC mixer before sound effect */
2119 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM
, 0, 0,
2120 rt5645_dac_l_mix
, ARRAY_SIZE(rt5645_dac_l_mix
)),
2121 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM
, 0, 0,
2122 rt5645_dac_r_mix
, ARRAY_SIZE(rt5645_dac_r_mix
)),
2124 /* DAC2 channel Mux */
2125 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM
, 0, 0, &rt5645_dac_l2_mux
),
2126 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM
, 0, 0, &rt5645_dac_r2_mux
),
2127 SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1
,
2128 RT5645_PWR_DAC_L2_BIT
, 0, NULL
, 0),
2129 SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1
,
2130 RT5645_PWR_DAC_R2_BIT
, 0, NULL
, 0),
2132 SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM
, 0, 0, &rt5645_dac1l_mux
),
2133 SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM
, 0, 0, &rt5645_dac1r_mux
),
2136 SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2
,
2137 RT5645_PWR_DAC_S1F_BIT
, 0, NULL
, 0),
2138 SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2
,
2139 RT5645_PWR_DAC_MF_L_BIT
, 0, NULL
, 0),
2140 SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2
,
2141 RT5645_PWR_DAC_MF_R_BIT
, 0, NULL
, 0),
2142 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM
, 0, 0,
2143 rt5645_sto_dac_l_mix
, ARRAY_SIZE(rt5645_sto_dac_l_mix
)),
2144 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM
, 0, 0,
2145 rt5645_sto_dac_r_mix
, ARRAY_SIZE(rt5645_sto_dac_r_mix
)),
2146 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM
, 0, 0,
2147 rt5645_mono_dac_l_mix
, ARRAY_SIZE(rt5645_mono_dac_l_mix
)),
2148 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM
, 0, 0,
2149 rt5645_mono_dac_r_mix
, ARRAY_SIZE(rt5645_mono_dac_r_mix
)),
2150 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM
, 0, 0,
2151 rt5645_dig_l_mix
, ARRAY_SIZE(rt5645_dig_l_mix
)),
2152 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM
, 0, 0,
2153 rt5645_dig_r_mix
, ARRAY_SIZE(rt5645_dig_r_mix
)),
2156 SND_SOC_DAPM_DAC("DAC L1", NULL
, RT5645_PWR_DIG1
, RT5645_PWR_DAC_L1_BIT
,
2158 SND_SOC_DAPM_DAC("DAC L2", NULL
, RT5645_PWR_DIG1
, RT5645_PWR_DAC_L2_BIT
,
2160 SND_SOC_DAPM_DAC("DAC R1", NULL
, RT5645_PWR_DIG1
, RT5645_PWR_DAC_R1_BIT
,
2162 SND_SOC_DAPM_DAC("DAC R2", NULL
, RT5645_PWR_DIG1
, RT5645_PWR_DAC_R2_BIT
,
2165 SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER
, RT5645_PWR_SM_L_BIT
,
2166 0, rt5645_spk_l_mix
, ARRAY_SIZE(rt5645_spk_l_mix
)),
2167 SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER
, RT5645_PWR_SM_R_BIT
,
2168 0, rt5645_spk_r_mix
, ARRAY_SIZE(rt5645_spk_r_mix
)),
2169 SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER
, RT5645_PWR_OM_L_BIT
,
2170 0, rt5645_out_l_mix
, ARRAY_SIZE(rt5645_out_l_mix
)),
2171 SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER
, RT5645_PWR_OM_R_BIT
,
2172 0, rt5645_out_r_mix
, ARRAY_SIZE(rt5645_out_r_mix
)),
2174 SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL
, RT5645_PWR_SV_L_BIT
, 0,
2175 &spk_l_vol_control
),
2176 SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL
, RT5645_PWR_SV_R_BIT
, 0,
2177 &spk_r_vol_control
),
2178 SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL
, RT5645_PWR_HV_L_BIT
,
2179 0, rt5645_hpvoll_mix
, ARRAY_SIZE(rt5645_hpvoll_mix
)),
2180 SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL
, RT5645_PWR_HV_R_BIT
,
2181 0, rt5645_hpvolr_mix
, ARRAY_SIZE(rt5645_hpvolr_mix
)),
2182 SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER
,
2183 RT5645_PWR_HM_L_BIT
, 0, NULL
, 0),
2184 SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER
,
2185 RT5645_PWR_HM_R_BIT
, 0, NULL
, 0),
2186 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2187 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2188 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2189 SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM
, 0, 0, &hp_l_vol_control
),
2190 SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM
, 0, 0, &hp_r_vol_control
),
2192 /* HPO/LOUT/Mono Mixer */
2193 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM
, 0, 0, rt5645_spo_l_mix
,
2194 ARRAY_SIZE(rt5645_spo_l_mix
)),
2195 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM
, 0, 0, rt5645_spo_r_mix
,
2196 ARRAY_SIZE(rt5645_spo_r_mix
)),
2197 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM
, 0, 0, rt5645_hpo_mix
,
2198 ARRAY_SIZE(rt5645_hpo_mix
)),
2199 SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM
, 0, 0, rt5645_lout_mix
,
2200 ARRAY_SIZE(rt5645_lout_mix
)),
2202 SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM
, 0, 0, rt5645_hp_event
,
2203 SND_SOC_DAPM_PRE_PMD
| SND_SOC_DAPM_POST_PMU
),
2204 SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM
, 0, 0, rt5645_lout_event
,
2205 SND_SOC_DAPM_PRE_PMD
| SND_SOC_DAPM_POST_PMU
),
2206 SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM
, 0, 0, rt5645_spk_event
,
2207 SND_SOC_DAPM_PRE_PMD
| SND_SOC_DAPM_POST_PMU
),
2210 SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2
, RT5645_PWR_PDM1_BIT
,
2212 SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM
, 0, 0, &rt5645_pdm1_l_mux
),
2213 SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM
, 0, 0, &rt5645_pdm1_r_mux
),
2215 SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM
, 0, 0, &pdm1_l_vol_control
),
2216 SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM
, 0, 0, &pdm1_r_vol_control
),
2219 SND_SOC_DAPM_OUTPUT("HPOL"),
2220 SND_SOC_DAPM_OUTPUT("HPOR"),
2221 SND_SOC_DAPM_OUTPUT("LOUTL"),
2222 SND_SOC_DAPM_OUTPUT("LOUTR"),
2223 SND_SOC_DAPM_OUTPUT("PDM1L"),
2224 SND_SOC_DAPM_OUTPUT("PDM1R"),
2225 SND_SOC_DAPM_OUTPUT("SPOL"),
2226 SND_SOC_DAPM_OUTPUT("SPOR"),
2227 SND_SOC_DAPM_POST("DAPM_POST", rt5650_hp_event
),
2230 static const struct snd_soc_dapm_widget rt5645_specific_dapm_widgets
[] = {
2231 SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 L Mux", SND_SOC_NOPM
, 0, 0,
2232 &rt5645_if1_dac0_tdm_sel_mux
),
2233 SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 R Mux", SND_SOC_NOPM
, 0, 0,
2234 &rt5645_if1_dac1_tdm_sel_mux
),
2235 SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 L Mux", SND_SOC_NOPM
, 0, 0,
2236 &rt5645_if1_dac2_tdm_sel_mux
),
2237 SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 R Mux", SND_SOC_NOPM
, 0, 0,
2238 &rt5645_if1_dac3_tdm_sel_mux
),
2239 SND_SOC_DAPM_MUX("RT5645 IF1 ADC Mux", SND_SOC_NOPM
,
2240 0, 0, &rt5645_if1_adc_in_mux
),
2241 SND_SOC_DAPM_MUX("RT5645 IF1 ADC1 Swap Mux", SND_SOC_NOPM
,
2242 0, 0, &rt5645_if1_adc1_in_mux
),
2243 SND_SOC_DAPM_MUX("RT5645 IF1 ADC2 Swap Mux", SND_SOC_NOPM
,
2244 0, 0, &rt5645_if1_adc2_in_mux
),
2245 SND_SOC_DAPM_MUX("RT5645 IF1 ADC3 Swap Mux", SND_SOC_NOPM
,
2246 0, 0, &rt5645_if1_adc3_in_mux
),
2249 static const struct snd_soc_dapm_widget rt5650_specific_dapm_widgets
[] = {
2250 SND_SOC_DAPM_MUX("A DAC1 L Mux", SND_SOC_NOPM
,
2251 0, 0, &rt5650_a_dac1_l_mux
),
2252 SND_SOC_DAPM_MUX("A DAC1 R Mux", SND_SOC_NOPM
,
2253 0, 0, &rt5650_a_dac1_r_mux
),
2254 SND_SOC_DAPM_MUX("A DAC2 L Mux", SND_SOC_NOPM
,
2255 0, 0, &rt5650_a_dac2_l_mux
),
2256 SND_SOC_DAPM_MUX("A DAC2 R Mux", SND_SOC_NOPM
,
2257 0, 0, &rt5650_a_dac2_r_mux
),
2259 SND_SOC_DAPM_MUX("RT5650 IF1 ADC1 Swap Mux", SND_SOC_NOPM
,
2260 0, 0, &rt5650_if1_adc1_in_mux
),
2261 SND_SOC_DAPM_MUX("RT5650 IF1 ADC2 Swap Mux", SND_SOC_NOPM
,
2262 0, 0, &rt5650_if1_adc2_in_mux
),
2263 SND_SOC_DAPM_MUX("RT5650 IF1 ADC3 Swap Mux", SND_SOC_NOPM
,
2264 0, 0, &rt5650_if1_adc3_in_mux
),
2265 SND_SOC_DAPM_MUX("RT5650 IF1 ADC Mux", SND_SOC_NOPM
,
2266 0, 0, &rt5650_if1_adc_in_mux
),
2268 SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 L Mux", SND_SOC_NOPM
, 0, 0,
2269 &rt5650_if1_dac0_tdm_sel_mux
),
2270 SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 R Mux", SND_SOC_NOPM
, 0, 0,
2271 &rt5650_if1_dac1_tdm_sel_mux
),
2272 SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 L Mux", SND_SOC_NOPM
, 0, 0,
2273 &rt5650_if1_dac2_tdm_sel_mux
),
2274 SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 R Mux", SND_SOC_NOPM
, 0, 0,
2275 &rt5650_if1_dac3_tdm_sel_mux
),
2278 static const struct snd_soc_dapm_route rt5645_dapm_routes
[] = {
2279 { "adc stereo1 filter", NULL
, "ADC STO1 ASRC", is_using_asrc
},
2280 { "adc mono left filter", NULL
, "ADC MONO L ASRC", is_using_asrc
},
2281 { "adc mono right filter", NULL
, "ADC MONO R ASRC", is_using_asrc
},
2282 { "dac mono left filter", NULL
, "DAC MONO L ASRC", is_using_asrc
},
2283 { "dac mono right filter", NULL
, "DAC MONO R ASRC", is_using_asrc
},
2284 { "dac stereo1 filter", NULL
, "DAC STO ASRC", is_using_asrc
},
2286 { "I2S1", NULL
, "I2S1 ASRC" },
2287 { "I2S2", NULL
, "I2S2 ASRC" },
2289 { "IN1P", NULL
, "LDO2" },
2290 { "IN2P", NULL
, "LDO2" },
2292 { "DMIC1", NULL
, "DMIC L1" },
2293 { "DMIC1", NULL
, "DMIC R1" },
2294 { "DMIC2", NULL
, "DMIC L2" },
2295 { "DMIC2", NULL
, "DMIC R2" },
2297 { "BST1", NULL
, "IN1P" },
2298 { "BST1", NULL
, "IN1N" },
2299 { "BST1", NULL
, "JD Power" },
2300 { "BST1", NULL
, "Mic Det Power" },
2301 { "BST2", NULL
, "IN2P" },
2302 { "BST2", NULL
, "IN2N" },
2304 { "INL VOL", NULL
, "IN2P" },
2305 { "INR VOL", NULL
, "IN2N" },
2307 { "RECMIXL", "HPOL Switch", "HPOL" },
2308 { "RECMIXL", "INL Switch", "INL VOL" },
2309 { "RECMIXL", "BST2 Switch", "BST2" },
2310 { "RECMIXL", "BST1 Switch", "BST1" },
2311 { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
2313 { "RECMIXR", "HPOR Switch", "HPOR" },
2314 { "RECMIXR", "INR Switch", "INR VOL" },
2315 { "RECMIXR", "BST2 Switch", "BST2" },
2316 { "RECMIXR", "BST1 Switch", "BST1" },
2317 { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
2319 { "ADC L", NULL
, "RECMIXL" },
2320 { "ADC L", NULL
, "ADC L power" },
2321 { "ADC R", NULL
, "RECMIXR" },
2322 { "ADC R", NULL
, "ADC R power" },
2324 {"DMIC L1", NULL
, "DMIC CLK"},
2325 {"DMIC L1", NULL
, "DMIC1 Power"},
2326 {"DMIC R1", NULL
, "DMIC CLK"},
2327 {"DMIC R1", NULL
, "DMIC1 Power"},
2328 {"DMIC L2", NULL
, "DMIC CLK"},
2329 {"DMIC L2", NULL
, "DMIC2 Power"},
2330 {"DMIC R2", NULL
, "DMIC CLK"},
2331 {"DMIC R2", NULL
, "DMIC2 Power"},
2333 { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
2334 { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
2335 { "Stereo1 DMIC Mux", NULL
, "DMIC STO1 ASRC" },
2337 { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
2338 { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
2339 { "Mono DMIC L Mux", NULL
, "DMIC MONO L ASRC" },
2341 { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
2342 { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
2343 { "Mono DMIC R Mux", NULL
, "DMIC MONO R ASRC" },
2345 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2346 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2347 { "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
2348 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2350 { "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
2351 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2352 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2353 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2355 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
2356 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2357 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2358 { "Mono ADC L1 Mux", "ADC", "ADC L" },
2360 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2361 { "Mono ADC R1 Mux", "ADC", "ADC R" },
2362 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
2363 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2365 { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
2366 { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
2367 { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
2368 { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
2370 { "Stereo1 ADC MIXL", NULL
, "Sto1 ADC MIXL" },
2371 { "Stereo1 ADC MIXL", NULL
, "adc stereo1 filter" },
2372 { "adc stereo1 filter", NULL
, "PLL1", is_sys_clk_from_pll
},
2374 { "Stereo1 ADC MIXR", NULL
, "Sto1 ADC MIXR" },
2375 { "Stereo1 ADC MIXR", NULL
, "adc stereo1 filter" },
2376 { "adc stereo1 filter", NULL
, "PLL1", is_sys_clk_from_pll
},
2378 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
2379 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
2380 { "Mono ADC MIXL", NULL
, "adc mono left filter" },
2381 { "adc mono left filter", NULL
, "PLL1", is_sys_clk_from_pll
},
2383 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
2384 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
2385 { "Mono ADC MIXR", NULL
, "adc mono right filter" },
2386 { "adc mono right filter", NULL
, "PLL1", is_sys_clk_from_pll
},
2388 { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
2389 { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
2390 { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
2392 { "IF_ADC1", NULL
, "Stereo1 ADC MIXL" },
2393 { "IF_ADC1", NULL
, "Stereo1 ADC MIXR" },
2394 { "IF_ADC2", NULL
, "Mono ADC MIXL" },
2395 { "IF_ADC2", NULL
, "Mono ADC MIXR" },
2396 { "VAD_ADC", NULL
, "VAD ADC Mux" },
2398 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
2399 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
2400 { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
2402 { "IF1 ADC", NULL
, "I2S1" },
2403 { "IF2 ADC", NULL
, "I2S2" },
2404 { "IF2 ADC", NULL
, "IF2 ADC Mux" },
2406 { "AIF2TX", NULL
, "IF2 ADC" },
2408 { "IF1 DAC0", NULL
, "AIF1RX" },
2409 { "IF1 DAC1", NULL
, "AIF1RX" },
2410 { "IF1 DAC2", NULL
, "AIF1RX" },
2411 { "IF1 DAC3", NULL
, "AIF1RX" },
2412 { "IF2 DAC", NULL
, "AIF2RX" },
2414 { "IF1 DAC0", NULL
, "I2S1" },
2415 { "IF1 DAC1", NULL
, "I2S1" },
2416 { "IF1 DAC2", NULL
, "I2S1" },
2417 { "IF1 DAC3", NULL
, "I2S1" },
2418 { "IF2 DAC", NULL
, "I2S2" },
2420 { "IF2 DAC L", NULL
, "IF2 DAC" },
2421 { "IF2 DAC R", NULL
, "IF2 DAC" },
2423 { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
2424 { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
2426 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
2427 { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
2428 { "DAC1 MIXL", NULL
, "dac stereo1 filter" },
2429 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
2430 { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
2431 { "DAC1 MIXR", NULL
, "dac stereo1 filter" },
2433 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
2434 { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
2435 { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
2436 { "DAC L2 Volume", NULL
, "DAC L2 Mux" },
2437 { "DAC L2 Volume", NULL
, "dac mono left filter" },
2439 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
2440 { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
2441 { "DAC R2 Mux", "Haptic", "Haptic Generator" },
2442 { "DAC R2 Volume", NULL
, "DAC R2 Mux" },
2443 { "DAC R2 Volume", NULL
, "dac mono right filter" },
2445 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2446 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
2447 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2448 { "Stereo DAC MIXL", NULL
, "dac stereo1 filter" },
2449 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2450 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
2451 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2452 { "Stereo DAC MIXR", NULL
, "dac stereo1 filter" },
2454 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2455 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2456 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2457 { "Mono DAC MIXL", NULL
, "dac mono left filter" },
2458 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2459 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2460 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2461 { "Mono DAC MIXR", NULL
, "dac mono right filter" },
2463 { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
2464 { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2465 { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2466 { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
2467 { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2468 { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2470 { "DAC L1", NULL
, "PLL1", is_sys_clk_from_pll
},
2471 { "DAC R1", NULL
, "PLL1", is_sys_clk_from_pll
},
2472 { "DAC L2", NULL
, "PLL1", is_sys_clk_from_pll
},
2473 { "DAC R2", NULL
, "PLL1", is_sys_clk_from_pll
},
2475 { "SPK MIXL", "BST1 Switch", "BST1" },
2476 { "SPK MIXL", "INL Switch", "INL VOL" },
2477 { "SPK MIXL", "DAC L1 Switch", "DAC L1" },
2478 { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
2479 { "SPK MIXR", "BST2 Switch", "BST2" },
2480 { "SPK MIXR", "INR Switch", "INR VOL" },
2481 { "SPK MIXR", "DAC R1 Switch", "DAC R1" },
2482 { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
2484 { "OUT MIXL", "BST1 Switch", "BST1" },
2485 { "OUT MIXL", "INL Switch", "INL VOL" },
2486 { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
2487 { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
2489 { "OUT MIXR", "BST2 Switch", "BST2" },
2490 { "OUT MIXR", "INR Switch", "INR VOL" },
2491 { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
2492 { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
2494 { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
2495 { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
2496 { "HPOVOL MIXL", "INL Switch", "INL VOL" },
2497 { "HPOVOL MIXL", "BST1 Switch", "BST1" },
2498 { "HPOVOL MIXL", NULL
, "HPOVOL MIXL Power" },
2499 { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
2500 { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
2501 { "HPOVOL MIXR", "INR Switch", "INR VOL" },
2502 { "HPOVOL MIXR", "BST2 Switch", "BST2" },
2503 { "HPOVOL MIXR", NULL
, "HPOVOL MIXR Power" },
2505 { "DAC 2", NULL
, "DAC L2" },
2506 { "DAC 2", NULL
, "DAC R2" },
2507 { "DAC 1", NULL
, "DAC L1" },
2508 { "DAC 1", NULL
, "DAC R1" },
2509 { "HPOVOL L", "Switch", "HPOVOL MIXL" },
2510 { "HPOVOL R", "Switch", "HPOVOL MIXR" },
2511 { "HPOVOL", NULL
, "HPOVOL L" },
2512 { "HPOVOL", NULL
, "HPOVOL R" },
2513 { "HPO MIX", "DAC1 Switch", "DAC 1" },
2514 { "HPO MIX", "HPVOL Switch", "HPOVOL" },
2516 { "SPKVOL L", "Switch", "SPK MIXL" },
2517 { "SPKVOL R", "Switch", "SPK MIXR" },
2519 { "SPOL MIX", "DAC R1 Switch", "DAC R1" },
2520 { "SPOL MIX", "DAC L1 Switch", "DAC L1" },
2521 { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
2522 { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
2523 { "SPOR MIX", "DAC R1 Switch", "DAC R1" },
2524 { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
2526 { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
2527 { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
2528 { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
2529 { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
2531 { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2532 { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
2533 { "PDM1 L Mux", NULL
, "PDM1 Power" },
2534 { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2535 { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
2536 { "PDM1 R Mux", NULL
, "PDM1 Power" },
2538 { "HP amp", NULL
, "HPO MIX" },
2539 { "HP amp", NULL
, "JD Power" },
2540 { "HP amp", NULL
, "Mic Det Power" },
2541 { "HP amp", NULL
, "LDO2" },
2542 { "HPOL", NULL
, "HP amp" },
2543 { "HPOR", NULL
, "HP amp" },
2545 { "LOUT amp", NULL
, "LOUT MIX" },
2546 { "LOUTL", NULL
, "LOUT amp" },
2547 { "LOUTR", NULL
, "LOUT amp" },
2549 { "PDM1 L", "Switch", "PDM1 L Mux" },
2550 { "PDM1 R", "Switch", "PDM1 R Mux" },
2552 { "PDM1L", NULL
, "PDM1 L" },
2553 { "PDM1R", NULL
, "PDM1 R" },
2555 { "SPK amp", NULL
, "SPOL MIX" },
2556 { "SPK amp", NULL
, "SPOR MIX" },
2557 { "SPOL", NULL
, "SPK amp" },
2558 { "SPOR", NULL
, "SPK amp" },
2561 static const struct snd_soc_dapm_route rt5650_specific_dapm_routes
[] = {
2562 { "A DAC1 L Mux", "DAC1", "DAC1 MIXL"},
2563 { "A DAC1 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2564 { "A DAC1 R Mux", "DAC1", "DAC1 MIXR"},
2565 { "A DAC1 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2567 { "A DAC2 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2568 { "A DAC2 L Mux", "Mono DAC Mixer", "Mono DAC MIXL"},
2569 { "A DAC2 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2570 { "A DAC2 R Mux", "Mono DAC Mixer", "Mono DAC MIXR"},
2572 { "DAC L1", NULL
, "A DAC1 L Mux" },
2573 { "DAC R1", NULL
, "A DAC1 R Mux" },
2574 { "DAC L2", NULL
, "A DAC2 L Mux" },
2575 { "DAC R2", NULL
, "A DAC2 R Mux" },
2577 { "RT5650 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2578 { "RT5650 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2579 { "RT5650 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2580 { "RT5650 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2582 { "RT5650 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2583 { "RT5650 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2584 { "RT5650 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2585 { "RT5650 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2587 { "RT5650 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2588 { "RT5650 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2589 { "RT5650 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2590 { "RT5650 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2592 { "IF1 ADC", NULL
, "RT5650 IF1 ADC1 Swap Mux" },
2593 { "IF1 ADC", NULL
, "RT5650 IF1 ADC2 Swap Mux" },
2594 { "IF1 ADC", NULL
, "RT5650 IF1 ADC3 Swap Mux" },
2596 { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/DAC_REF/Null", "IF1 ADC" },
2597 { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/Null/DAC_REF", "IF1 ADC" },
2598 { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/IF_ADC2/Null", "IF1 ADC" },
2599 { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/Null/IF_ADC2", "IF1 ADC" },
2600 { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/DAC_REF/IF_ADC2", "IF1 ADC" },
2601 { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/IF_ADC2/DAC_REF", "IF1 ADC" },
2603 { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/DAC_REF/Null", "IF1 ADC" },
2604 { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/Null/DAC_REF", "IF1 ADC" },
2605 { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/IF_ADC1/Null", "IF1 ADC" },
2606 { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/Null/IF_ADC1", "IF1 ADC" },
2607 { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/DAC_REF/IF_ADC1", "IF1 ADC" },
2608 { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/IF_ADC1/DAC_REF", "IF1 ADC" },
2610 { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/IF_ADC2/Null", "IF1 ADC" },
2611 { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/Null/IF_ADC2", "IF1 ADC" },
2612 { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/IF_ADC1/Null", "IF1 ADC" },
2613 { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/Null/IF_ADC1", "IF1 ADC" },
2614 { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC1/IF_ADC2", "IF1 ADC" },
2615 { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC2/IF_ADC1", "IF1 ADC" },
2617 { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/IF_ADC2/DAC_REF", "IF1 ADC" },
2618 { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/DAC_REF/IF_ADC2", "IF1 ADC" },
2619 { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/IF_ADC1/DAC_REF", "IF1 ADC" },
2620 { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/DAC_REF/IF_ADC1", "IF1 ADC" },
2621 { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC1/IF_ADC2", "IF1 ADC" },
2622 { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC2/IF_ADC1", "IF1 ADC" },
2623 { "AIF1TX", NULL
, "RT5650 IF1 ADC Mux" },
2625 { "RT5650 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2626 { "RT5650 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2627 { "RT5650 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2628 { "RT5650 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2630 { "RT5650 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2631 { "RT5650 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2632 { "RT5650 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2633 { "RT5650 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2635 { "RT5650 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2636 { "RT5650 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2637 { "RT5650 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2638 { "RT5650 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2640 { "RT5650 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2641 { "RT5650 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2642 { "RT5650 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2643 { "RT5650 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2645 { "DAC1 L Mux", "IF1 DAC", "RT5650 IF1 DAC1 L Mux" },
2646 { "DAC1 R Mux", "IF1 DAC", "RT5650 IF1 DAC1 R Mux" },
2648 { "DAC L2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 L Mux" },
2649 { "DAC R2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 R Mux" },
2652 static const struct snd_soc_dapm_route rt5645_specific_dapm_routes
[] = {
2653 { "DAC L1", NULL
, "Stereo DAC MIXL" },
2654 { "DAC R1", NULL
, "Stereo DAC MIXR" },
2655 { "DAC L2", NULL
, "Mono DAC MIXL" },
2656 { "DAC R2", NULL
, "Mono DAC MIXR" },
2658 { "RT5645 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2659 { "RT5645 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2660 { "RT5645 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2661 { "RT5645 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2663 { "RT5645 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2664 { "RT5645 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2665 { "RT5645 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2666 { "RT5645 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2668 { "RT5645 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2669 { "RT5645 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2670 { "RT5645 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2671 { "RT5645 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2673 { "IF1 ADC", NULL
, "RT5645 IF1 ADC1 Swap Mux" },
2674 { "IF1 ADC", NULL
, "RT5645 IF1 ADC2 Swap Mux" },
2675 { "IF1 ADC", NULL
, "RT5645 IF1 ADC3 Swap Mux" },
2677 { "RT5645 IF1 ADC Mux", "IF_ADC1/IF_ADC2/VAD_ADC", "IF1 ADC" },
2678 { "RT5645 IF1 ADC Mux", "IF_ADC2/IF_ADC1/VAD_ADC", "IF1 ADC" },
2679 { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC1/IF_ADC2", "IF1 ADC" },
2680 { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC2/IF_ADC1", "IF1 ADC" },
2681 { "AIF1TX", NULL
, "RT5645 IF1 ADC Mux" },
2683 { "RT5645 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2684 { "RT5645 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2685 { "RT5645 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2686 { "RT5645 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2688 { "RT5645 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2689 { "RT5645 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2690 { "RT5645 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2691 { "RT5645 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2693 { "RT5645 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2694 { "RT5645 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2695 { "RT5645 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2696 { "RT5645 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2698 { "RT5645 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2699 { "RT5645 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2700 { "RT5645 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2701 { "RT5645 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2703 { "DAC1 L Mux", "IF1 DAC", "RT5645 IF1 DAC1 L Mux" },
2704 { "DAC1 R Mux", "IF1 DAC", "RT5645 IF1 DAC1 R Mux" },
2706 { "DAC L2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 L Mux" },
2707 { "DAC R2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 R Mux" },
2710 static int rt5645_hw_params(struct snd_pcm_substream
*substream
,
2711 struct snd_pcm_hw_params
*params
, struct snd_soc_dai
*dai
)
2713 struct snd_soc_codec
*codec
= dai
->codec
;
2714 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
2715 unsigned int val_len
= 0, val_clk
, mask_clk
, dl_sft
;
2716 int pre_div
, bclk_ms
, frame_size
;
2718 rt5645
->lrck
[dai
->id
] = params_rate(params
);
2719 pre_div
= rl6231_get_clk_info(rt5645
->sysclk
, rt5645
->lrck
[dai
->id
]);
2721 dev_err(codec
->dev
, "Unsupported clock setting\n");
2724 frame_size
= snd_soc_params_to_frame_size(params
);
2725 if (frame_size
< 0) {
2726 dev_err(codec
->dev
, "Unsupported frame size: %d\n", frame_size
);
2730 switch (rt5645
->codec_type
) {
2731 case CODEC_TYPE_RT5650
:
2739 bclk_ms
= frame_size
> 32;
2740 rt5645
->bclk
[dai
->id
] = rt5645
->lrck
[dai
->id
] * (32 << bclk_ms
);
2742 dev_dbg(dai
->dev
, "bclk is %dHz and lrck is %dHz\n",
2743 rt5645
->bclk
[dai
->id
], rt5645
->lrck
[dai
->id
]);
2744 dev_dbg(dai
->dev
, "bclk_ms is %d and pre_div is %d for iis %d\n",
2745 bclk_ms
, pre_div
, dai
->id
);
2747 switch (params_width(params
)) {
2765 mask_clk
= RT5645_I2S_PD1_MASK
;
2766 val_clk
= pre_div
<< RT5645_I2S_PD1_SFT
;
2767 snd_soc_update_bits(codec
, RT5645_I2S1_SDP
,
2768 (0x3 << dl_sft
), (val_len
<< dl_sft
));
2769 snd_soc_update_bits(codec
, RT5645_ADDA_CLK1
, mask_clk
, val_clk
);
2772 mask_clk
= RT5645_I2S_BCLK_MS2_MASK
| RT5645_I2S_PD2_MASK
;
2773 val_clk
= bclk_ms
<< RT5645_I2S_BCLK_MS2_SFT
|
2774 pre_div
<< RT5645_I2S_PD2_SFT
;
2775 snd_soc_update_bits(codec
, RT5645_I2S2_SDP
,
2776 (0x3 << dl_sft
), (val_len
<< dl_sft
));
2777 snd_soc_update_bits(codec
, RT5645_ADDA_CLK1
, mask_clk
, val_clk
);
2780 dev_err(codec
->dev
, "Invalid dai->id: %d\n", dai
->id
);
2787 static int rt5645_set_dai_fmt(struct snd_soc_dai
*dai
, unsigned int fmt
)
2789 struct snd_soc_codec
*codec
= dai
->codec
;
2790 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
2791 unsigned int reg_val
= 0, pol_sft
;
2793 switch (rt5645
->codec_type
) {
2794 case CODEC_TYPE_RT5650
:
2802 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
2803 case SND_SOC_DAIFMT_CBM_CFM
:
2804 rt5645
->master
[dai
->id
] = 1;
2806 case SND_SOC_DAIFMT_CBS_CFS
:
2807 reg_val
|= RT5645_I2S_MS_S
;
2808 rt5645
->master
[dai
->id
] = 0;
2814 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
2815 case SND_SOC_DAIFMT_NB_NF
:
2817 case SND_SOC_DAIFMT_IB_NF
:
2818 reg_val
|= (1 << pol_sft
);
2824 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
2825 case SND_SOC_DAIFMT_I2S
:
2827 case SND_SOC_DAIFMT_LEFT_J
:
2828 reg_val
|= RT5645_I2S_DF_LEFT
;
2830 case SND_SOC_DAIFMT_DSP_A
:
2831 reg_val
|= RT5645_I2S_DF_PCM_A
;
2833 case SND_SOC_DAIFMT_DSP_B
:
2834 reg_val
|= RT5645_I2S_DF_PCM_B
;
2841 snd_soc_update_bits(codec
, RT5645_I2S1_SDP
,
2842 RT5645_I2S_MS_MASK
| (1 << pol_sft
) |
2843 RT5645_I2S_DF_MASK
, reg_val
);
2846 snd_soc_update_bits(codec
, RT5645_I2S2_SDP
,
2847 RT5645_I2S_MS_MASK
| (1 << pol_sft
) |
2848 RT5645_I2S_DF_MASK
, reg_val
);
2851 dev_err(codec
->dev
, "Invalid dai->id: %d\n", dai
->id
);
2857 static int rt5645_set_dai_sysclk(struct snd_soc_dai
*dai
,
2858 int clk_id
, unsigned int freq
, int dir
)
2860 struct snd_soc_codec
*codec
= dai
->codec
;
2861 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
2862 unsigned int reg_val
= 0;
2864 if (freq
== rt5645
->sysclk
&& clk_id
== rt5645
->sysclk_src
)
2868 case RT5645_SCLK_S_MCLK
:
2869 reg_val
|= RT5645_SCLK_SRC_MCLK
;
2871 case RT5645_SCLK_S_PLL1
:
2872 reg_val
|= RT5645_SCLK_SRC_PLL1
;
2874 case RT5645_SCLK_S_RCCLK
:
2875 reg_val
|= RT5645_SCLK_SRC_RCCLK
;
2878 dev_err(codec
->dev
, "Invalid clock id (%d)\n", clk_id
);
2881 snd_soc_update_bits(codec
, RT5645_GLB_CLK
,
2882 RT5645_SCLK_SRC_MASK
, reg_val
);
2883 rt5645
->sysclk
= freq
;
2884 rt5645
->sysclk_src
= clk_id
;
2886 dev_dbg(dai
->dev
, "Sysclk is %dHz and clock id is %d\n", freq
, clk_id
);
2891 static int rt5645_set_dai_pll(struct snd_soc_dai
*dai
, int pll_id
, int source
,
2892 unsigned int freq_in
, unsigned int freq_out
)
2894 struct snd_soc_codec
*codec
= dai
->codec
;
2895 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
2896 struct rl6231_pll_code pll_code
;
2899 if (source
== rt5645
->pll_src
&& freq_in
== rt5645
->pll_in
&&
2900 freq_out
== rt5645
->pll_out
)
2903 if (!freq_in
|| !freq_out
) {
2904 dev_dbg(codec
->dev
, "PLL disabled\n");
2907 rt5645
->pll_out
= 0;
2908 snd_soc_update_bits(codec
, RT5645_GLB_CLK
,
2909 RT5645_SCLK_SRC_MASK
, RT5645_SCLK_SRC_MCLK
);
2914 case RT5645_PLL1_S_MCLK
:
2915 snd_soc_update_bits(codec
, RT5645_GLB_CLK
,
2916 RT5645_PLL1_SRC_MASK
, RT5645_PLL1_SRC_MCLK
);
2918 case RT5645_PLL1_S_BCLK1
:
2919 case RT5645_PLL1_S_BCLK2
:
2922 snd_soc_update_bits(codec
, RT5645_GLB_CLK
,
2923 RT5645_PLL1_SRC_MASK
, RT5645_PLL1_SRC_BCLK1
);
2926 snd_soc_update_bits(codec
, RT5645_GLB_CLK
,
2927 RT5645_PLL1_SRC_MASK
, RT5645_PLL1_SRC_BCLK2
);
2930 dev_err(codec
->dev
, "Invalid dai->id: %d\n", dai
->id
);
2935 dev_err(codec
->dev
, "Unknown PLL source %d\n", source
);
2939 ret
= rl6231_pll_calc(freq_in
, freq_out
, &pll_code
);
2941 dev_err(codec
->dev
, "Unsupport input clock %d\n", freq_in
);
2945 dev_dbg(codec
->dev
, "bypass=%d m=%d n=%d k=%d\n",
2946 pll_code
.m_bp
, (pll_code
.m_bp
? 0 : pll_code
.m_code
),
2947 pll_code
.n_code
, pll_code
.k_code
);
2949 snd_soc_write(codec
, RT5645_PLL_CTRL1
,
2950 pll_code
.n_code
<< RT5645_PLL_N_SFT
| pll_code
.k_code
);
2951 snd_soc_write(codec
, RT5645_PLL_CTRL2
,
2952 (pll_code
.m_bp
? 0 : pll_code
.m_code
) << RT5645_PLL_M_SFT
|
2953 pll_code
.m_bp
<< RT5645_PLL_M_BP_SFT
);
2955 rt5645
->pll_in
= freq_in
;
2956 rt5645
->pll_out
= freq_out
;
2957 rt5645
->pll_src
= source
;
2962 static int rt5645_set_tdm_slot(struct snd_soc_dai
*dai
, unsigned int tx_mask
,
2963 unsigned int rx_mask
, int slots
, int slot_width
)
2965 struct snd_soc_codec
*codec
= dai
->codec
;
2966 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
2967 unsigned int i_slot_sft
, o_slot_sft
, i_width_sht
, o_width_sht
, en_sft
;
2968 unsigned int mask
, val
= 0;
2970 switch (rt5645
->codec_type
) {
2971 case CODEC_TYPE_RT5650
:
2981 i_slot_sft
= o_slot_sft
= 12;
2982 i_width_sht
= o_width_sht
= 10;
2986 if (rx_mask
|| tx_mask
) {
2987 val
|= (1 << en_sft
);
2988 if (rt5645
->codec_type
== CODEC_TYPE_RT5645
)
2989 snd_soc_update_bits(codec
, RT5645_BASS_BACK
,
2990 RT5645_G_BB_BST_MASK
, RT5645_G_BB_BST_25DB
);
2995 val
|= (1 << i_slot_sft
) | (1 << o_slot_sft
);
2998 val
|= (2 << i_slot_sft
) | (2 << o_slot_sft
);
3001 val
|= (3 << i_slot_sft
) | (3 << o_slot_sft
);
3008 switch (slot_width
) {
3010 val
|= (1 << i_width_sht
) | (1 << o_width_sht
);
3013 val
|= (2 << i_width_sht
) | (2 << o_width_sht
);
3016 val
|= (3 << i_width_sht
) | (3 << o_width_sht
);
3023 snd_soc_update_bits(codec
, RT5645_TDM_CTRL_1
, mask
, val
);
3028 static int rt5645_set_bias_level(struct snd_soc_codec
*codec
,
3029 enum snd_soc_bias_level level
)
3031 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
3034 case SND_SOC_BIAS_PREPARE
:
3035 if (SND_SOC_BIAS_STANDBY
== snd_soc_codec_get_bias_level(codec
)) {
3036 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
3037 RT5645_PWR_VREF1
| RT5645_PWR_MB
|
3038 RT5645_PWR_BG
| RT5645_PWR_VREF2
,
3039 RT5645_PWR_VREF1
| RT5645_PWR_MB
|
3040 RT5645_PWR_BG
| RT5645_PWR_VREF2
);
3042 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
3043 RT5645_PWR_FV1
| RT5645_PWR_FV2
,
3044 RT5645_PWR_FV1
| RT5645_PWR_FV2
);
3045 snd_soc_update_bits(codec
, RT5645_GEN_CTRL1
,
3046 RT5645_DIG_GATE_CTRL
, RT5645_DIG_GATE_CTRL
);
3050 case SND_SOC_BIAS_STANDBY
:
3051 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
3052 RT5645_PWR_VREF1
| RT5645_PWR_MB
|
3053 RT5645_PWR_BG
| RT5645_PWR_VREF2
,
3054 RT5645_PWR_VREF1
| RT5645_PWR_MB
|
3055 RT5645_PWR_BG
| RT5645_PWR_VREF2
);
3057 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
3058 RT5645_PWR_FV1
| RT5645_PWR_FV2
,
3059 RT5645_PWR_FV1
| RT5645_PWR_FV2
);
3060 if (snd_soc_codec_get_bias_level(codec
) == SND_SOC_BIAS_OFF
) {
3061 snd_soc_write(codec
, RT5645_DEPOP_M2
, 0x1140);
3063 if (rt5645
->en_button_func
)
3064 queue_delayed_work(system_power_efficient_wq
,
3065 &rt5645
->jack_detect_work
,
3066 msecs_to_jiffies(0));
3070 case SND_SOC_BIAS_OFF
:
3071 snd_soc_write(codec
, RT5645_DEPOP_M2
, 0x1100);
3072 if (!rt5645
->en_button_func
)
3073 snd_soc_update_bits(codec
, RT5645_GEN_CTRL1
,
3074 RT5645_DIG_GATE_CTRL
, 0);
3075 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
3076 RT5645_PWR_VREF1
| RT5645_PWR_MB
|
3077 RT5645_PWR_BG
| RT5645_PWR_VREF2
|
3078 RT5645_PWR_FV1
| RT5645_PWR_FV2
, 0x0);
3088 static void rt5645_enable_push_button_irq(struct snd_soc_codec
*codec
,
3091 struct snd_soc_dapm_context
*dapm
= snd_soc_codec_get_dapm(codec
);
3094 snd_soc_dapm_force_enable_pin(dapm
, "ADC L power");
3095 snd_soc_dapm_force_enable_pin(dapm
, "ADC R power");
3096 snd_soc_dapm_sync(dapm
);
3098 snd_soc_update_bits(codec
, RT5650_4BTN_IL_CMD1
, 0x3, 0x3);
3099 snd_soc_update_bits(codec
,
3100 RT5645_INT_IRQ_ST
, 0x8, 0x8);
3101 snd_soc_update_bits(codec
,
3102 RT5650_4BTN_IL_CMD2
, 0x8000, 0x8000);
3103 snd_soc_read(codec
, RT5650_4BTN_IL_CMD1
);
3104 pr_debug("%s read %x = %x\n", __func__
, RT5650_4BTN_IL_CMD1
,
3105 snd_soc_read(codec
, RT5650_4BTN_IL_CMD1
));
3107 snd_soc_update_bits(codec
, RT5650_4BTN_IL_CMD2
, 0x8000, 0x0);
3108 snd_soc_update_bits(codec
, RT5645_INT_IRQ_ST
, 0x8, 0x0);
3110 snd_soc_dapm_disable_pin(dapm
, "ADC L power");
3111 snd_soc_dapm_disable_pin(dapm
, "ADC R power");
3112 snd_soc_dapm_sync(dapm
);
3116 static int rt5645_jack_detect(struct snd_soc_codec
*codec
, int jack_insert
)
3118 struct snd_soc_dapm_context
*dapm
= snd_soc_codec_get_dapm(codec
);
3119 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
3123 regmap_write(rt5645
->regmap
, RT5645_CHARGE_PUMP
, 0x0e06);
3125 /* for jack type detect */
3126 snd_soc_dapm_force_enable_pin(dapm
, "LDO2");
3127 snd_soc_dapm_force_enable_pin(dapm
, "Mic Det Power");
3128 snd_soc_dapm_sync(dapm
);
3129 if (!dapm
->card
->instantiated
) {
3130 /* Power up necessary bits for JD if dapm is
3132 regmap_update_bits(rt5645
->regmap
, RT5645_PWR_ANLG1
,
3133 RT5645_PWR_MB
| RT5645_PWR_VREF2
,
3134 RT5645_PWR_MB
| RT5645_PWR_VREF2
);
3135 regmap_update_bits(rt5645
->regmap
, RT5645_PWR_MIXER
,
3136 RT5645_PWR_LDO2
, RT5645_PWR_LDO2
);
3137 regmap_update_bits(rt5645
->regmap
, RT5645_PWR_VOL
,
3138 RT5645_PWR_MIC_DET
, RT5645_PWR_MIC_DET
);
3141 regmap_write(rt5645
->regmap
, RT5645_JD_CTRL3
, 0x00f0);
3142 regmap_update_bits(rt5645
->regmap
, RT5645_IN1_CTRL2
,
3143 RT5645_CBJ_MN_JD
, RT5645_CBJ_MN_JD
);
3144 regmap_update_bits(rt5645
->regmap
, RT5645_IN1_CTRL1
,
3145 RT5645_CBJ_BST1_EN
, RT5645_CBJ_BST1_EN
);
3147 regmap_update_bits(rt5645
->regmap
, RT5645_IN1_CTRL2
,
3148 RT5645_CBJ_MN_JD
, 0);
3151 regmap_read(rt5645
->regmap
, RT5645_IN1_CTRL3
, &val
);
3153 dev_dbg(codec
->dev
, "val = %d\n", val
);
3155 if (val
== 1 || val
== 2) {
3156 rt5645
->jack_type
= SND_JACK_HEADSET
;
3157 if (rt5645
->en_button_func
) {
3158 rt5645_enable_push_button_irq(codec
, true);
3161 snd_soc_dapm_disable_pin(dapm
, "Mic Det Power");
3162 snd_soc_dapm_sync(dapm
);
3163 rt5645
->jack_type
= SND_JACK_HEADPHONE
;
3165 if (rt5645
->pdata
.level_trigger_irq
)
3166 regmap_update_bits(rt5645
->regmap
, RT5645_IRQ_CTRL2
,
3167 RT5645_JD_1_1_MASK
, RT5645_JD_1_1_NOR
);
3168 } else { /* jack out */
3169 rt5645
->jack_type
= 0;
3171 regmap_update_bits(rt5645
->regmap
, RT5645_HP_VOL
,
3172 RT5645_L_MUTE
| RT5645_R_MUTE
,
3173 RT5645_L_MUTE
| RT5645_R_MUTE
);
3174 regmap_update_bits(rt5645
->regmap
, RT5645_IN1_CTRL2
,
3175 RT5645_CBJ_MN_JD
, RT5645_CBJ_MN_JD
);
3176 regmap_update_bits(rt5645
->regmap
, RT5645_IN1_CTRL1
,
3177 RT5645_CBJ_BST1_EN
, 0);
3179 if (rt5645
->en_button_func
)
3180 rt5645_enable_push_button_irq(codec
, false);
3182 if (rt5645
->pdata
.jd_mode
== 0)
3183 snd_soc_dapm_disable_pin(dapm
, "LDO2");
3184 snd_soc_dapm_disable_pin(dapm
, "Mic Det Power");
3185 snd_soc_dapm_sync(dapm
);
3186 if (rt5645
->pdata
.level_trigger_irq
)
3187 regmap_update_bits(rt5645
->regmap
, RT5645_IRQ_CTRL2
,
3188 RT5645_JD_1_1_MASK
, RT5645_JD_1_1_INV
);
3191 return rt5645
->jack_type
;
3194 static int rt5645_button_detect(struct snd_soc_codec
*codec
)
3198 val
= snd_soc_read(codec
, RT5650_4BTN_IL_CMD1
);
3199 pr_debug("val=0x%x\n", val
);
3200 btn_type
= val
& 0xfff0;
3201 snd_soc_write(codec
, RT5650_4BTN_IL_CMD1
, val
);
3206 static irqreturn_t
rt5645_irq(int irq
, void *data
);
3208 int rt5645_set_jack_detect(struct snd_soc_codec
*codec
,
3209 struct snd_soc_jack
*hp_jack
, struct snd_soc_jack
*mic_jack
,
3210 struct snd_soc_jack
*btn_jack
)
3212 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
3214 rt5645
->hp_jack
= hp_jack
;
3215 rt5645
->mic_jack
= mic_jack
;
3216 rt5645
->btn_jack
= btn_jack
;
3217 if (rt5645
->btn_jack
&& rt5645
->codec_type
== CODEC_TYPE_RT5650
) {
3218 rt5645
->en_button_func
= true;
3219 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3220 RT5645_GP1_PIN_IRQ
, RT5645_GP1_PIN_IRQ
);
3221 regmap_update_bits(rt5645
->regmap
, RT5645_GEN_CTRL1
,
3222 RT5645_DIG_GATE_CTRL
, RT5645_DIG_GATE_CTRL
);
3224 rt5645_irq(0, rt5645
);
3228 EXPORT_SYMBOL_GPL(rt5645_set_jack_detect
);
3230 static void rt5645_jack_detect_work(struct work_struct
*work
)
3232 struct rt5645_priv
*rt5645
=
3233 container_of(work
, struct rt5645_priv
, jack_detect_work
.work
);
3234 int val
, btn_type
, gpio_state
= 0, report
= 0;
3239 switch (rt5645
->pdata
.jd_mode
) {
3240 case 0: /* Not using rt5645 JD */
3241 if (rt5645
->gpiod_hp_det
) {
3242 gpio_state
= gpiod_get_value(rt5645
->gpiod_hp_det
);
3243 dev_dbg(rt5645
->codec
->dev
, "gpio_state = %d\n",
3245 report
= rt5645_jack_detect(rt5645
->codec
, gpio_state
);
3247 snd_soc_jack_report(rt5645
->hp_jack
,
3248 report
, SND_JACK_HEADPHONE
);
3249 snd_soc_jack_report(rt5645
->mic_jack
,
3250 report
, SND_JACK_MICROPHONE
);
3252 default: /* read rt5645 jd1_1 status */
3253 val
= snd_soc_read(rt5645
->codec
, RT5645_INT_IRQ_ST
) & 0x1000;
3258 if (!val
&& (rt5645
->jack_type
== 0)) { /* jack in */
3259 report
= rt5645_jack_detect(rt5645
->codec
, 1);
3260 } else if (!val
&& rt5645
->jack_type
!= 0) {
3261 /* for push button and jack out */
3263 if (snd_soc_read(rt5645
->codec
, RT5645_INT_IRQ_ST
) & 0x4) {
3264 /* button pressed */
3265 report
= SND_JACK_HEADSET
;
3266 btn_type
= rt5645_button_detect(rt5645
->codec
);
3267 /* rt5650 can report three kinds of button behavior,
3268 one click, double click and hold. However,
3269 currently we will report button pressed/released
3270 event. So all the three button behaviors are
3271 treated as button pressed. */
3276 report
|= SND_JACK_BTN_0
;
3281 report
|= SND_JACK_BTN_1
;
3286 report
|= SND_JACK_BTN_2
;
3291 report
|= SND_JACK_BTN_3
;
3293 case 0x0000: /* unpressed */
3296 dev_err(rt5645
->codec
->dev
,
3297 "Unexpected button code 0x%04x\n",
3302 if (btn_type
== 0)/* button release */
3303 report
= rt5645
->jack_type
;
3305 mod_timer(&rt5645
->btn_check_timer
,
3306 msecs_to_jiffies(100));
3311 snd_soc_update_bits(rt5645
->codec
,
3312 RT5645_INT_IRQ_ST
, 0x1, 0x0);
3313 rt5645_jack_detect(rt5645
->codec
, 0);
3316 snd_soc_jack_report(rt5645
->hp_jack
, report
, SND_JACK_HEADPHONE
);
3317 snd_soc_jack_report(rt5645
->mic_jack
, report
, SND_JACK_MICROPHONE
);
3318 if (rt5645
->en_button_func
)
3319 snd_soc_jack_report(rt5645
->btn_jack
,
3320 report
, SND_JACK_BTN_0
| SND_JACK_BTN_1
|
3321 SND_JACK_BTN_2
| SND_JACK_BTN_3
);
3324 static void rt5645_rcclock_work(struct work_struct
*work
)
3326 struct rt5645_priv
*rt5645
=
3327 container_of(work
, struct rt5645_priv
, rcclock_work
.work
);
3329 regmap_update_bits(rt5645
->regmap
, RT5645_MICBIAS
,
3330 RT5645_PWR_CLK25M_MASK
, RT5645_PWR_CLK25M_PD
);
3333 static irqreturn_t
rt5645_irq(int irq
, void *data
)
3335 struct rt5645_priv
*rt5645
= data
;
3337 queue_delayed_work(system_power_efficient_wq
,
3338 &rt5645
->jack_detect_work
, msecs_to_jiffies(250));
3343 static void rt5645_btn_check_callback(unsigned long data
)
3345 struct rt5645_priv
*rt5645
= (struct rt5645_priv
*)data
;
3347 queue_delayed_work(system_power_efficient_wq
,
3348 &rt5645
->jack_detect_work
, msecs_to_jiffies(5));
3351 static int rt5645_probe(struct snd_soc_codec
*codec
)
3353 struct snd_soc_dapm_context
*dapm
= snd_soc_codec_get_dapm(codec
);
3354 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
3356 rt5645
->codec
= codec
;
3358 switch (rt5645
->codec_type
) {
3359 case CODEC_TYPE_RT5645
:
3360 snd_soc_dapm_new_controls(dapm
,
3361 rt5645_specific_dapm_widgets
,
3362 ARRAY_SIZE(rt5645_specific_dapm_widgets
));
3363 snd_soc_dapm_add_routes(dapm
,
3364 rt5645_specific_dapm_routes
,
3365 ARRAY_SIZE(rt5645_specific_dapm_routes
));
3367 case CODEC_TYPE_RT5650
:
3368 snd_soc_dapm_new_controls(dapm
,
3369 rt5650_specific_dapm_widgets
,
3370 ARRAY_SIZE(rt5650_specific_dapm_widgets
));
3371 snd_soc_dapm_add_routes(dapm
,
3372 rt5650_specific_dapm_routes
,
3373 ARRAY_SIZE(rt5650_specific_dapm_routes
));
3377 snd_soc_codec_force_bias_level(codec
, SND_SOC_BIAS_OFF
);
3379 /* for JD function */
3380 if (rt5645
->pdata
.jd_mode
) {
3381 snd_soc_dapm_force_enable_pin(dapm
, "JD Power");
3382 snd_soc_dapm_force_enable_pin(dapm
, "LDO2");
3383 snd_soc_dapm_sync(dapm
);
3386 rt5645
->eq_param
= devm_kzalloc(codec
->dev
,
3387 RT5645_HWEQ_NUM
* sizeof(struct rt5645_eq_param_s
), GFP_KERNEL
);
3392 static int rt5645_remove(struct snd_soc_codec
*codec
)
3394 rt5645_reset(codec
);
3399 static int rt5645_suspend(struct snd_soc_codec
*codec
)
3401 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
3403 regcache_cache_only(rt5645
->regmap
, true);
3404 regcache_mark_dirty(rt5645
->regmap
);
3409 static int rt5645_resume(struct snd_soc_codec
*codec
)
3411 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
3413 regcache_cache_only(rt5645
->regmap
, false);
3414 regcache_sync(rt5645
->regmap
);
3419 #define rt5645_suspend NULL
3420 #define rt5645_resume NULL
3423 #define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
3424 #define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
3425 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
3427 static const struct snd_soc_dai_ops rt5645_aif_dai_ops
= {
3428 .hw_params
= rt5645_hw_params
,
3429 .set_fmt
= rt5645_set_dai_fmt
,
3430 .set_sysclk
= rt5645_set_dai_sysclk
,
3431 .set_tdm_slot
= rt5645_set_tdm_slot
,
3432 .set_pll
= rt5645_set_dai_pll
,
3435 static struct snd_soc_dai_driver rt5645_dai
[] = {
3437 .name
= "rt5645-aif1",
3440 .stream_name
= "AIF1 Playback",
3443 .rates
= RT5645_STEREO_RATES
,
3444 .formats
= RT5645_FORMATS
,
3447 .stream_name
= "AIF1 Capture",
3450 .rates
= RT5645_STEREO_RATES
,
3451 .formats
= RT5645_FORMATS
,
3453 .ops
= &rt5645_aif_dai_ops
,
3456 .name
= "rt5645-aif2",
3459 .stream_name
= "AIF2 Playback",
3462 .rates
= RT5645_STEREO_RATES
,
3463 .formats
= RT5645_FORMATS
,
3466 .stream_name
= "AIF2 Capture",
3469 .rates
= RT5645_STEREO_RATES
,
3470 .formats
= RT5645_FORMATS
,
3472 .ops
= &rt5645_aif_dai_ops
,
3476 static const struct snd_soc_codec_driver soc_codec_dev_rt5645
= {
3477 .probe
= rt5645_probe
,
3478 .remove
= rt5645_remove
,
3479 .suspend
= rt5645_suspend
,
3480 .resume
= rt5645_resume
,
3481 .set_bias_level
= rt5645_set_bias_level
,
3482 .idle_bias_off
= true,
3483 .component_driver
= {
3484 .controls
= rt5645_snd_controls
,
3485 .num_controls
= ARRAY_SIZE(rt5645_snd_controls
),
3486 .dapm_widgets
= rt5645_dapm_widgets
,
3487 .num_dapm_widgets
= ARRAY_SIZE(rt5645_dapm_widgets
),
3488 .dapm_routes
= rt5645_dapm_routes
,
3489 .num_dapm_routes
= ARRAY_SIZE(rt5645_dapm_routes
),
3493 static const struct regmap_config rt5645_regmap
= {
3496 .use_single_rw
= true,
3497 .max_register
= RT5645_VENDOR_ID2
+ 1 + (ARRAY_SIZE(rt5645_ranges
) *
3499 .volatile_reg
= rt5645_volatile_register
,
3500 .readable_reg
= rt5645_readable_register
,
3502 .cache_type
= REGCACHE_RBTREE
,
3503 .reg_defaults
= rt5645_reg
,
3504 .num_reg_defaults
= ARRAY_SIZE(rt5645_reg
),
3505 .ranges
= rt5645_ranges
,
3506 .num_ranges
= ARRAY_SIZE(rt5645_ranges
),
3509 static const struct regmap_config rt5650_regmap
= {
3512 .use_single_rw
= true,
3513 .max_register
= RT5645_VENDOR_ID2
+ 1 + (ARRAY_SIZE(rt5645_ranges
) *
3515 .volatile_reg
= rt5645_volatile_register
,
3516 .readable_reg
= rt5645_readable_register
,
3518 .cache_type
= REGCACHE_RBTREE
,
3519 .reg_defaults
= rt5650_reg
,
3520 .num_reg_defaults
= ARRAY_SIZE(rt5650_reg
),
3521 .ranges
= rt5645_ranges
,
3522 .num_ranges
= ARRAY_SIZE(rt5645_ranges
),
3525 static const struct regmap_config temp_regmap
= {
3529 .use_single_rw
= true,
3530 .max_register
= RT5645_VENDOR_ID2
+ 1,
3531 .cache_type
= REGCACHE_NONE
,
3534 static const struct i2c_device_id rt5645_i2c_id
[] = {
3539 MODULE_DEVICE_TABLE(i2c
, rt5645_i2c_id
);
3542 static const struct of_device_id rt5645_of_match
[] = {
3543 { .compatible
= "realtek,rt5645", },
3544 { .compatible
= "realtek,rt5650", },
3547 MODULE_DEVICE_TABLE(of
, rt5645_of_match
);
3551 static const struct acpi_device_id rt5645_acpi_match
[] = {
3559 MODULE_DEVICE_TABLE(acpi
, rt5645_acpi_match
);
3562 static const struct rt5645_platform_data general_platform_data
= {
3563 .dmic1_data_pin
= RT5645_DMIC1_DISABLE
,
3564 .dmic2_data_pin
= RT5645_DMIC_DATA_IN2P
,
3568 static const struct dmi_system_id dmi_platform_intel_braswell
[] = {
3570 .ident
= "Intel Strago",
3572 DMI_MATCH(DMI_PRODUCT_NAME
, "Strago"),
3576 .ident
= "Google Chrome",
3578 DMI_MATCH(DMI_SYS_VENDOR
, "GOOGLE"),
3582 .ident
= "Google Setzer",
3584 DMI_MATCH(DMI_PRODUCT_NAME
, "Setzer"),
3588 .ident
= "Microsoft Surface 3",
3590 DMI_MATCH(DMI_PRODUCT_NAME
, "Surface 3"),
3596 static const struct rt5645_platform_data buddy_platform_data
= {
3597 .dmic1_data_pin
= RT5645_DMIC_DATA_GPIO5
,
3598 .dmic2_data_pin
= RT5645_DMIC_DATA_IN2P
,
3600 .level_trigger_irq
= true,
3603 static const struct dmi_system_id dmi_platform_intel_broadwell
[] = {
3605 .ident
= "Chrome Buddy",
3607 DMI_MATCH(DMI_PRODUCT_NAME
, "Buddy"),
3613 static const struct rt5645_platform_data gpd_win_platform_data
= {
3618 static const struct dmi_system_id dmi_platform_gpd_win
[] = {
3621 * Match for the GPDwin which unfortunately uses somewhat
3622 * generic dmi strings, which is why we test for 4 strings.
3623 * Comparing against 23 other byt/cht boards, board_vendor
3624 * and board_name are unique to the GPDwin, where as only one
3625 * other board has the same board_serial and 3 others have
3626 * the same default product_name. Also the GPDwin is the
3627 * only device to have both board_ and product_name not set.
3631 DMI_MATCH(DMI_BOARD_VENDOR
, "AMI Corporation"),
3632 DMI_MATCH(DMI_BOARD_NAME
, "Default string"),
3633 DMI_MATCH(DMI_BOARD_SERIAL
, "Default string"),
3634 DMI_MATCH(DMI_PRODUCT_NAME
, "Default string"),
3640 static struct rt5645_platform_data general_platform_data2
= {
3641 .dmic1_data_pin
= RT5645_DMIC_DATA_IN2N
,
3642 .dmic2_data_pin
= RT5645_DMIC2_DISABLE
,
3647 static struct dmi_system_id dmi_platform_asus_t100ha
[] = {
3649 .ident
= "ASUS T100HAN",
3651 DMI_EXACT_MATCH(DMI_SYS_VENDOR
, "ASUSTeK COMPUTER INC."),
3652 DMI_MATCH(DMI_PRODUCT_NAME
, "T100HAN"),
3658 static struct rt5645_platform_data minix_z83_4_platform_data
= {
3662 static struct dmi_system_id dmi_platform_minix_z83_4
[] = {
3664 .ident
= "MINIX Z83-4",
3666 DMI_EXACT_MATCH(DMI_SYS_VENDOR
, "MINIX"),
3667 DMI_MATCH(DMI_PRODUCT_NAME
, "Z83-4"),
3673 static bool rt5645_check_dp(struct device
*dev
)
3675 if (device_property_present(dev
, "realtek,in2-differential") ||
3676 device_property_present(dev
, "realtek,dmic1-data-pin") ||
3677 device_property_present(dev
, "realtek,dmic2-data-pin") ||
3678 device_property_present(dev
, "realtek,jd-mode"))
3684 static int rt5645_parse_dt(struct rt5645_priv
*rt5645
, struct device
*dev
)
3686 rt5645
->pdata
.in2_diff
= device_property_read_bool(dev
,
3687 "realtek,in2-differential");
3688 device_property_read_u32(dev
,
3689 "realtek,dmic1-data-pin", &rt5645
->pdata
.dmic1_data_pin
);
3690 device_property_read_u32(dev
,
3691 "realtek,dmic2-data-pin", &rt5645
->pdata
.dmic2_data_pin
);
3692 device_property_read_u32(dev
,
3693 "realtek,jd-mode", &rt5645
->pdata
.jd_mode
);
3698 static int rt5645_i2c_probe(struct i2c_client
*i2c
,
3699 const struct i2c_device_id
*id
)
3701 struct rt5645_platform_data
*pdata
= dev_get_platdata(&i2c
->dev
);
3702 struct rt5645_priv
*rt5645
;
3705 struct regmap
*regmap
;
3707 rt5645
= devm_kzalloc(&i2c
->dev
, sizeof(struct rt5645_priv
),
3713 i2c_set_clientdata(i2c
, rt5645
);
3716 rt5645
->pdata
= *pdata
;
3717 else if (dmi_check_system(dmi_platform_intel_broadwell
))
3718 rt5645
->pdata
= buddy_platform_data
;
3719 else if (rt5645_check_dp(&i2c
->dev
))
3720 rt5645_parse_dt(rt5645
, &i2c
->dev
);
3721 else if (dmi_check_system(dmi_platform_intel_braswell
))
3722 rt5645
->pdata
= general_platform_data
;
3723 else if (dmi_check_system(dmi_platform_gpd_win
))
3724 rt5645
->pdata
= gpd_win_platform_data
;
3725 else if (dmi_check_system(dmi_platform_asus_t100ha
))
3726 rt5645
->pdata
= general_platform_data2
;
3727 else if (dmi_check_system(dmi_platform_minix_z83_4
))
3728 rt5645
->pdata
= minix_z83_4_platform_data
;
3731 rt5645
->pdata
.in2_diff
= QUIRK_IN2_DIFF(quirk
);
3732 rt5645
->pdata
.level_trigger_irq
= QUIRK_LEVEL_IRQ(quirk
);
3733 rt5645
->pdata
.inv_jd1_1
= QUIRK_INV_JD1_1(quirk
);
3734 rt5645
->pdata
.jd_mode
= QUIRK_JD_MODE(quirk
);
3735 rt5645
->pdata
.dmic1_data_pin
= QUIRK_DMIC1_DATA_PIN(quirk
);
3736 rt5645
->pdata
.dmic2_data_pin
= QUIRK_DMIC2_DATA_PIN(quirk
);
3739 rt5645
->gpiod_hp_det
= devm_gpiod_get_optional(&i2c
->dev
, "hp-detect",
3742 if (IS_ERR(rt5645
->gpiod_hp_det
)) {
3743 dev_info(&i2c
->dev
, "failed to initialize gpiod\n");
3744 ret
= PTR_ERR(rt5645
->gpiod_hp_det
);
3746 * Continue if optional gpiod is missing, bail for all other
3747 * errors, including -EPROBE_DEFER
3753 for (i
= 0; i
< ARRAY_SIZE(rt5645
->supplies
); i
++)
3754 rt5645
->supplies
[i
].supply
= rt5645_supply_names
[i
];
3756 ret
= devm_regulator_bulk_get(&i2c
->dev
,
3757 ARRAY_SIZE(rt5645
->supplies
),
3760 dev_err(&i2c
->dev
, "Failed to request supplies: %d\n", ret
);
3764 ret
= regulator_bulk_enable(ARRAY_SIZE(rt5645
->supplies
),
3767 dev_err(&i2c
->dev
, "Failed to enable supplies: %d\n", ret
);
3771 regmap
= devm_regmap_init_i2c(i2c
, &temp_regmap
);
3772 if (IS_ERR(regmap
)) {
3773 ret
= PTR_ERR(regmap
);
3774 dev_err(&i2c
->dev
, "Failed to allocate temp register map: %d\n",
3778 regmap_read(regmap
, RT5645_VENDOR_ID2
, &val
);
3781 case RT5645_DEVICE_ID
:
3782 rt5645
->regmap
= devm_regmap_init_i2c(i2c
, &rt5645_regmap
);
3783 rt5645
->codec_type
= CODEC_TYPE_RT5645
;
3785 case RT5650_DEVICE_ID
:
3786 rt5645
->regmap
= devm_regmap_init_i2c(i2c
, &rt5650_regmap
);
3787 rt5645
->codec_type
= CODEC_TYPE_RT5650
;
3791 "Device with ID register %#x is not rt5645 or rt5650\n",
3797 if (IS_ERR(rt5645
->regmap
)) {
3798 ret
= PTR_ERR(rt5645
->regmap
);
3799 dev_err(&i2c
->dev
, "Failed to allocate register map: %d\n",
3804 regmap_write(rt5645
->regmap
, RT5645_RESET
, 0);
3806 ret
= regmap_register_patch(rt5645
->regmap
, init_list
,
3807 ARRAY_SIZE(init_list
));
3809 dev_warn(&i2c
->dev
, "Failed to apply regmap patch: %d\n", ret
);
3811 if (rt5645
->codec_type
== CODEC_TYPE_RT5650
) {
3812 ret
= regmap_register_patch(rt5645
->regmap
, rt5650_init_list
,
3813 ARRAY_SIZE(rt5650_init_list
));
3815 dev_warn(&i2c
->dev
, "Apply rt5650 patch failed: %d\n",
3819 regmap_update_bits(rt5645
->regmap
, RT5645_CLSD_OUT_CTRL
, 0xc0, 0xc0);
3821 if (rt5645
->pdata
.in2_diff
)
3822 regmap_update_bits(rt5645
->regmap
, RT5645_IN2_CTRL
,
3823 RT5645_IN_DF2
, RT5645_IN_DF2
);
3825 if (rt5645
->pdata
.dmic1_data_pin
|| rt5645
->pdata
.dmic2_data_pin
) {
3826 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3827 RT5645_GP2_PIN_MASK
, RT5645_GP2_PIN_DMIC1_SCL
);
3829 switch (rt5645
->pdata
.dmic1_data_pin
) {
3830 case RT5645_DMIC_DATA_IN2N
:
3831 regmap_update_bits(rt5645
->regmap
, RT5645_DMIC_CTRL1
,
3832 RT5645_DMIC_1_DP_MASK
, RT5645_DMIC_1_DP_IN2N
);
3835 case RT5645_DMIC_DATA_GPIO5
:
3836 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3837 RT5645_I2S2_DAC_PIN_MASK
, RT5645_I2S2_DAC_PIN_GPIO
);
3838 regmap_update_bits(rt5645
->regmap
, RT5645_DMIC_CTRL1
,
3839 RT5645_DMIC_1_DP_MASK
, RT5645_DMIC_1_DP_GPIO5
);
3840 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3841 RT5645_GP5_PIN_MASK
, RT5645_GP5_PIN_DMIC1_SDA
);
3844 case RT5645_DMIC_DATA_GPIO11
:
3845 regmap_update_bits(rt5645
->regmap
, RT5645_DMIC_CTRL1
,
3846 RT5645_DMIC_1_DP_MASK
, RT5645_DMIC_1_DP_GPIO11
);
3847 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3848 RT5645_GP11_PIN_MASK
,
3849 RT5645_GP11_PIN_DMIC1_SDA
);
3856 switch (rt5645
->pdata
.dmic2_data_pin
) {
3857 case RT5645_DMIC_DATA_IN2P
:
3858 regmap_update_bits(rt5645
->regmap
, RT5645_DMIC_CTRL1
,
3859 RT5645_DMIC_2_DP_MASK
, RT5645_DMIC_2_DP_IN2P
);
3862 case RT5645_DMIC_DATA_GPIO6
:
3863 regmap_update_bits(rt5645
->regmap
, RT5645_DMIC_CTRL1
,
3864 RT5645_DMIC_2_DP_MASK
, RT5645_DMIC_2_DP_GPIO6
);
3865 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3866 RT5645_GP6_PIN_MASK
, RT5645_GP6_PIN_DMIC2_SDA
);
3869 case RT5645_DMIC_DATA_GPIO10
:
3870 regmap_update_bits(rt5645
->regmap
, RT5645_DMIC_CTRL1
,
3871 RT5645_DMIC_2_DP_MASK
, RT5645_DMIC_2_DP_GPIO10
);
3872 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3873 RT5645_GP10_PIN_MASK
,
3874 RT5645_GP10_PIN_DMIC2_SDA
);
3877 case RT5645_DMIC_DATA_GPIO12
:
3878 regmap_update_bits(rt5645
->regmap
, RT5645_DMIC_CTRL1
,
3879 RT5645_DMIC_2_DP_MASK
, RT5645_DMIC_2_DP_GPIO12
);
3880 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3881 RT5645_GP12_PIN_MASK
,
3882 RT5645_GP12_PIN_DMIC2_SDA
);
3889 if (rt5645
->pdata
.jd_mode
) {
3890 regmap_update_bits(rt5645
->regmap
, RT5645_GEN_CTRL3
,
3891 RT5645_IRQ_CLK_GATE_CTRL
,
3892 RT5645_IRQ_CLK_GATE_CTRL
);
3893 regmap_update_bits(rt5645
->regmap
, RT5645_MICBIAS
,
3894 RT5645_IRQ_CLK_INT
, RT5645_IRQ_CLK_INT
);
3895 regmap_update_bits(rt5645
->regmap
, RT5645_IRQ_CTRL2
,
3896 RT5645_IRQ_JD_1_1_EN
, RT5645_IRQ_JD_1_1_EN
);
3897 regmap_update_bits(rt5645
->regmap
, RT5645_GEN_CTRL3
,
3898 RT5645_JD_PSV_MODE
, RT5645_JD_PSV_MODE
);
3899 regmap_update_bits(rt5645
->regmap
, RT5645_HPO_MIXER
,
3900 RT5645_IRQ_PSV_MODE
, RT5645_IRQ_PSV_MODE
);
3901 regmap_update_bits(rt5645
->regmap
, RT5645_MICBIAS
,
3902 RT5645_MIC2_OVCD_EN
, RT5645_MIC2_OVCD_EN
);
3903 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3904 RT5645_GP1_PIN_IRQ
, RT5645_GP1_PIN_IRQ
);
3905 switch (rt5645
->pdata
.jd_mode
) {
3907 regmap_update_bits(rt5645
->regmap
, RT5645_A_JD_CTRL1
,
3908 RT5645_JD1_MODE_MASK
,
3912 regmap_update_bits(rt5645
->regmap
, RT5645_A_JD_CTRL1
,
3913 RT5645_JD1_MODE_MASK
,
3917 regmap_update_bits(rt5645
->regmap
, RT5645_A_JD_CTRL1
,
3918 RT5645_JD1_MODE_MASK
,
3924 if (rt5645
->pdata
.inv_jd1_1
) {
3925 regmap_update_bits(rt5645
->regmap
, RT5645_IRQ_CTRL2
,
3926 RT5645_JD_1_1_MASK
, RT5645_JD_1_1_INV
);
3930 regmap_update_bits(rt5645
->regmap
, RT5645_ADDA_CLK1
,
3931 RT5645_I2S_PD1_MASK
, RT5645_I2S_PD1_2
);
3933 if (rt5645
->pdata
.level_trigger_irq
) {
3934 regmap_update_bits(rt5645
->regmap
, RT5645_IRQ_CTRL2
,
3935 RT5645_JD_1_1_MASK
, RT5645_JD_1_1_INV
);
3937 setup_timer(&rt5645
->btn_check_timer
,
3938 rt5645_btn_check_callback
, (unsigned long)rt5645
);
3940 INIT_DELAYED_WORK(&rt5645
->jack_detect_work
, rt5645_jack_detect_work
);
3941 INIT_DELAYED_WORK(&rt5645
->rcclock_work
, rt5645_rcclock_work
);
3943 if (rt5645
->i2c
->irq
) {
3944 ret
= request_threaded_irq(rt5645
->i2c
->irq
, NULL
, rt5645_irq
,
3945 IRQF_TRIGGER_RISING
| IRQF_TRIGGER_FALLING
3946 | IRQF_ONESHOT
, "rt5645", rt5645
);
3948 dev_err(&i2c
->dev
, "Failed to reguest IRQ: %d\n", ret
);
3953 ret
= snd_soc_register_codec(&i2c
->dev
, &soc_codec_dev_rt5645
,
3954 rt5645_dai
, ARRAY_SIZE(rt5645_dai
));
3961 if (rt5645
->i2c
->irq
)
3962 free_irq(rt5645
->i2c
->irq
, rt5645
);
3964 regulator_bulk_disable(ARRAY_SIZE(rt5645
->supplies
), rt5645
->supplies
);
3968 static int rt5645_i2c_remove(struct i2c_client
*i2c
)
3970 struct rt5645_priv
*rt5645
= i2c_get_clientdata(i2c
);
3973 free_irq(i2c
->irq
, rt5645
);
3975 cancel_delayed_work_sync(&rt5645
->jack_detect_work
);
3976 cancel_delayed_work_sync(&rt5645
->rcclock_work
);
3977 del_timer_sync(&rt5645
->btn_check_timer
);
3979 snd_soc_unregister_codec(&i2c
->dev
);
3980 regulator_bulk_disable(ARRAY_SIZE(rt5645
->supplies
), rt5645
->supplies
);
3985 static void rt5645_i2c_shutdown(struct i2c_client
*i2c
)
3987 struct rt5645_priv
*rt5645
= i2c_get_clientdata(i2c
);
3989 regmap_update_bits(rt5645
->regmap
, RT5645_GEN_CTRL3
,
3990 RT5645_RING2_SLEEVE_GND
, RT5645_RING2_SLEEVE_GND
);
3991 regmap_update_bits(rt5645
->regmap
, RT5645_IN1_CTRL2
, RT5645_CBJ_MN_JD
,
3993 regmap_update_bits(rt5645
->regmap
, RT5645_IN1_CTRL1
, RT5645_CBJ_BST1_EN
,
3996 regmap_write(rt5645
->regmap
, RT5645_RESET
, 0);
3999 static struct i2c_driver rt5645_i2c_driver
= {
4002 .of_match_table
= of_match_ptr(rt5645_of_match
),
4003 .acpi_match_table
= ACPI_PTR(rt5645_acpi_match
),
4005 .probe
= rt5645_i2c_probe
,
4006 .remove
= rt5645_i2c_remove
,
4007 .shutdown
= rt5645_i2c_shutdown
,
4008 .id_table
= rt5645_i2c_id
,
4010 module_i2c_driver(rt5645_i2c_driver
);
4012 MODULE_DESCRIPTION("ASoC RT5645 driver");
4013 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
4014 MODULE_LICENSE("GPL v2");