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x86/speculation/mds: Fix documentation typo
[linux/fpc-iii.git] / sound / soc / codecs / rt5670.c
blob9545764ef3eb965a75a285eb9e5a3275333f959d
1 /*
2 * rt5670.c -- RT5670 ALSA SoC audio codec driver
3 *
4 * Copyright 2014 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
16 #include <linux/pm.h>
17 #include <linux/pm_runtime.h>
18 #include <linux/i2c.h>
19 #include <linux/platform_device.h>
20 #include <linux/acpi.h>
21 #include <linux/spi/spi.h>
22 #include <linux/dmi.h>
23 #include <sound/core.h>
24 #include <sound/pcm.h>
25 #include <sound/pcm_params.h>
26 #include <sound/jack.h>
27 #include <sound/soc.h>
28 #include <sound/soc-dapm.h>
29 #include <sound/initval.h>
30 #include <sound/tlv.h>
31 #include <sound/rt5670.h>
32
33 #include "rl6231.h"
34 #include "rt5670.h"
35 #include "rt5670-dsp.h"
36
37 #define RT5670_DEVICE_ID 0x6271
38
39 #define RT5670_PR_RANGE_BASE (0xff + 1)
40 #define RT5670_PR_SPACING 0x100
41
42 #define RT5670_PR_BASE (RT5670_PR_RANGE_BASE + (0 * RT5670_PR_SPACING))
43
44 static const struct regmap_range_cfg rt5670_ranges[] = {
45 { .name = "PR", .range_min = RT5670_PR_BASE,
46 .range_max = RT5670_PR_BASE + 0xf8,
47 .selector_reg = RT5670_PRIV_INDEX,
48 .selector_mask = 0xff,
49 .selector_shift = 0x0,
50 .window_start = RT5670_PRIV_DATA,
51 .window_len = 0x1, },
52 };
53
54 static const struct reg_sequence init_list[] = {
55 { RT5670_PR_BASE + 0x14, 0x9a8a },
56 { RT5670_PR_BASE + 0x38, 0x3ba1 },
57 { RT5670_PR_BASE + 0x3d, 0x3640 },
58 { 0x8a, 0x0123 },
59 };
60
61 static const struct reg_default rt5670_reg[] = {
62 { 0x00, 0x0000 },
63 { 0x02, 0x8888 },
64 { 0x03, 0x8888 },
65 { 0x0a, 0x0001 },
66 { 0x0b, 0x0827 },
67 { 0x0c, 0x0000 },
68 { 0x0d, 0x0008 },
69 { 0x0e, 0x0000 },
70 { 0x0f, 0x0808 },
71 { 0x19, 0xafaf },
72 { 0x1a, 0xafaf },
73 { 0x1b, 0x0011 },
74 { 0x1c, 0x2f2f },
75 { 0x1d, 0x2f2f },
76 { 0x1e, 0x0000 },
77 { 0x1f, 0x2f2f },
78 { 0x20, 0x0000 },
79 { 0x26, 0x7860 },
80 { 0x27, 0x7860 },
81 { 0x28, 0x7871 },
82 { 0x29, 0x8080 },
83 { 0x2a, 0x5656 },
84 { 0x2b, 0x5454 },
85 { 0x2c, 0xaaa0 },
86 { 0x2d, 0x0000 },
87 { 0x2e, 0x2f2f },
88 { 0x2f, 0x1002 },
89 { 0x30, 0x0000 },
90 { 0x31, 0x5f00 },
91 { 0x32, 0x0000 },
92 { 0x33, 0x0000 },
93 { 0x34, 0x0000 },
94 { 0x35, 0x0000 },
95 { 0x36, 0x0000 },
96 { 0x37, 0x0000 },
97 { 0x38, 0x0000 },
98 { 0x3b, 0x0000 },
99 { 0x3c, 0x007f },
100 { 0x3d, 0x0000 },
101 { 0x3e, 0x007f },
102 { 0x45, 0xe00f },
103 { 0x4c, 0x5380 },
104 { 0x4f, 0x0073 },
105 { 0x52, 0x00d3 },
106 { 0x53, 0xf000 },
107 { 0x61, 0x0000 },
108 { 0x62, 0x0001 },
109 { 0x63, 0x00c3 },
110 { 0x64, 0x0000 },
111 { 0x65, 0x0001 },
112 { 0x66, 0x0000 },
113 { 0x6f, 0x8000 },
114 { 0x70, 0x8000 },
115 { 0x71, 0x8000 },
116 { 0x72, 0x8000 },
117 { 0x73, 0x7770 },
118 { 0x74, 0x0e00 },
119 { 0x75, 0x1505 },
120 { 0x76, 0x0015 },
121 { 0x77, 0x0c00 },
122 { 0x78, 0x4000 },
123 { 0x79, 0x0123 },
124 { 0x7f, 0x1100 },
125 { 0x80, 0x0000 },
126 { 0x81, 0x0000 },
127 { 0x82, 0x0000 },
128 { 0x83, 0x0000 },
129 { 0x84, 0x0000 },
130 { 0x85, 0x0000 },
131 { 0x86, 0x0004 },
132 { 0x87, 0x0000 },
133 { 0x88, 0x0000 },
134 { 0x89, 0x0000 },
135 { 0x8a, 0x0123 },
136 { 0x8b, 0x0000 },
137 { 0x8c, 0x0003 },
138 { 0x8d, 0x0000 },
139 { 0x8e, 0x0004 },
140 { 0x8f, 0x1100 },
141 { 0x90, 0x0646 },
142 { 0x91, 0x0c06 },
143 { 0x93, 0x0000 },
144 { 0x94, 0x1270 },
145 { 0x95, 0x1000 },
146 { 0x97, 0x0000 },
147 { 0x98, 0x0000 },
148 { 0x99, 0x0000 },
149 { 0x9a, 0x2184 },
150 { 0x9b, 0x010a },
151 { 0x9c, 0x0aea },
152 { 0x9d, 0x000c },
153 { 0x9e, 0x0400 },
154 { 0xae, 0x7000 },
155 { 0xaf, 0x0000 },
156 { 0xb0, 0x7000 },
157 { 0xb1, 0x0000 },
158 { 0xb2, 0x0000 },
159 { 0xb3, 0x001f },
160 { 0xb4, 0x220c },
161 { 0xb5, 0x1f00 },
162 { 0xb6, 0x0000 },
163 { 0xb7, 0x0000 },
164 { 0xbb, 0x0000 },
165 { 0xbc, 0x0000 },
166 { 0xbd, 0x0000 },
167 { 0xbe, 0x0000 },
168 { 0xbf, 0x0000 },
169 { 0xc0, 0x0000 },
170 { 0xc1, 0x0000 },
171 { 0xc2, 0x0000 },
172 { 0xcd, 0x0000 },
173 { 0xce, 0x0000 },
174 { 0xcf, 0x1813 },
175 { 0xd0, 0x0690 },
176 { 0xd1, 0x1c17 },
177 { 0xd3, 0xa220 },
178 { 0xd4, 0x0000 },
179 { 0xd6, 0x0400 },
180 { 0xd9, 0x0809 },
181 { 0xda, 0x0000 },
182 { 0xdb, 0x0001 },
183 { 0xdc, 0x0049 },
184 { 0xdd, 0x0024 },
185 { 0xe6, 0x8000 },
186 { 0xe7, 0x0000 },
187 { 0xec, 0xa200 },
188 { 0xed, 0x0000 },
189 { 0xee, 0xa200 },
190 { 0xef, 0x0000 },
191 { 0xf8, 0x0000 },
192 { 0xf9, 0x0000 },
193 { 0xfa, 0x8010 },
194 { 0xfb, 0x0033 },
195 { 0xfc, 0x0100 },
196 };
197
198 static bool rt5670_volatile_register(struct device *dev, unsigned int reg)
199 {
200 int i;
201
202 for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) {
203 if ((reg >= rt5670_ranges[i].window_start &&
204 reg <= rt5670_ranges[i].window_start +
205 rt5670_ranges[i].window_len) ||
206 (reg >= rt5670_ranges[i].range_min &&
207 reg <= rt5670_ranges[i].range_max)) {
208 return true;
209 }
210 }
211
212 switch (reg) {
213 case RT5670_RESET:
214 case RT5670_PDM_DATA_CTRL1:
215 case RT5670_PDM1_DATA_CTRL4:
216 case RT5670_PDM2_DATA_CTRL4:
217 case RT5670_PRIV_DATA:
218 case RT5670_ASRC_5:
219 case RT5670_CJ_CTRL1:
220 case RT5670_CJ_CTRL2:
221 case RT5670_CJ_CTRL3:
222 case RT5670_A_JD_CTRL1:
223 case RT5670_A_JD_CTRL2:
224 case RT5670_VAD_CTRL5:
225 case RT5670_ADC_EQ_CTRL1:
226 case RT5670_EQ_CTRL1:
227 case RT5670_ALC_CTRL_1:
228 case RT5670_IRQ_CTRL2:
229 case RT5670_INT_IRQ_ST:
230 case RT5670_IL_CMD:
231 case RT5670_DSP_CTRL1:
232 case RT5670_DSP_CTRL2:
233 case RT5670_DSP_CTRL3:
234 case RT5670_DSP_CTRL4:
235 case RT5670_DSP_CTRL5:
236 case RT5670_VENDOR_ID:
237 case RT5670_VENDOR_ID1:
238 case RT5670_VENDOR_ID2:
239 return true;
240 default:
241 return false;
242 }
243 }
244
245 static bool rt5670_readable_register(struct device *dev, unsigned int reg)
246 {
247 int i;
248
249 for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) {
250 if ((reg >= rt5670_ranges[i].window_start &&
251 reg <= rt5670_ranges[i].window_start +
252 rt5670_ranges[i].window_len) ||
253 (reg >= rt5670_ranges[i].range_min &&
254 reg <= rt5670_ranges[i].range_max)) {
255 return true;
256 }
257 }
258
259 switch (reg) {
260 case RT5670_RESET:
261 case RT5670_HP_VOL:
262 case RT5670_LOUT1:
263 case RT5670_CJ_CTRL1:
264 case RT5670_CJ_CTRL2:
265 case RT5670_CJ_CTRL3:
266 case RT5670_IN2:
267 case RT5670_INL1_INR1_VOL:
268 case RT5670_DAC1_DIG_VOL:
269 case RT5670_DAC2_DIG_VOL:
270 case RT5670_DAC_CTRL:
271 case RT5670_STO1_ADC_DIG_VOL:
272 case RT5670_MONO_ADC_DIG_VOL:
273 case RT5670_STO2_ADC_DIG_VOL:
274 case RT5670_ADC_BST_VOL1:
275 case RT5670_ADC_BST_VOL2:
276 case RT5670_STO2_ADC_MIXER:
277 case RT5670_STO1_ADC_MIXER:
278 case RT5670_MONO_ADC_MIXER:
279 case RT5670_AD_DA_MIXER:
280 case RT5670_STO_DAC_MIXER:
281 case RT5670_DD_MIXER:
282 case RT5670_DIG_MIXER:
283 case RT5670_DSP_PATH1:
284 case RT5670_DSP_PATH2:
285 case RT5670_DIG_INF1_DATA:
286 case RT5670_DIG_INF2_DATA:
287 case RT5670_PDM_OUT_CTRL:
288 case RT5670_PDM_DATA_CTRL1:
289 case RT5670_PDM1_DATA_CTRL2:
290 case RT5670_PDM1_DATA_CTRL3:
291 case RT5670_PDM1_DATA_CTRL4:
292 case RT5670_PDM2_DATA_CTRL2:
293 case RT5670_PDM2_DATA_CTRL3:
294 case RT5670_PDM2_DATA_CTRL4:
295 case RT5670_REC_L1_MIXER:
296 case RT5670_REC_L2_MIXER:
297 case RT5670_REC_R1_MIXER:
298 case RT5670_REC_R2_MIXER:
299 case RT5670_HPO_MIXER:
300 case RT5670_MONO_MIXER:
301 case RT5670_OUT_L1_MIXER:
302 case RT5670_OUT_R1_MIXER:
303 case RT5670_LOUT_MIXER:
304 case RT5670_PWR_DIG1:
305 case RT5670_PWR_DIG2:
306 case RT5670_PWR_ANLG1:
307 case RT5670_PWR_ANLG2:
308 case RT5670_PWR_MIXER:
309 case RT5670_PWR_VOL:
310 case RT5670_PRIV_INDEX:
311 case RT5670_PRIV_DATA:
312 case RT5670_I2S4_SDP:
313 case RT5670_I2S1_SDP:
314 case RT5670_I2S2_SDP:
315 case RT5670_I2S3_SDP:
316 case RT5670_ADDA_CLK1:
317 case RT5670_ADDA_CLK2:
318 case RT5670_DMIC_CTRL1:
319 case RT5670_DMIC_CTRL2:
320 case RT5670_TDM_CTRL_1:
321 case RT5670_TDM_CTRL_2:
322 case RT5670_TDM_CTRL_3:
323 case RT5670_DSP_CLK:
324 case RT5670_GLB_CLK:
325 case RT5670_PLL_CTRL1:
326 case RT5670_PLL_CTRL2:
327 case RT5670_ASRC_1:
328 case RT5670_ASRC_2:
329 case RT5670_ASRC_3:
330 case RT5670_ASRC_4:
331 case RT5670_ASRC_5:
332 case RT5670_ASRC_7:
333 case RT5670_ASRC_8:
334 case RT5670_ASRC_9:
335 case RT5670_ASRC_10:
336 case RT5670_ASRC_11:
337 case RT5670_ASRC_12:
338 case RT5670_ASRC_13:
339 case RT5670_ASRC_14:
340 case RT5670_DEPOP_M1:
341 case RT5670_DEPOP_M2:
342 case RT5670_DEPOP_M3:
343 case RT5670_CHARGE_PUMP:
344 case RT5670_MICBIAS:
345 case RT5670_A_JD_CTRL1:
346 case RT5670_A_JD_CTRL2:
347 case RT5670_VAD_CTRL1:
348 case RT5670_VAD_CTRL2:
349 case RT5670_VAD_CTRL3:
350 case RT5670_VAD_CTRL4:
351 case RT5670_VAD_CTRL5:
352 case RT5670_ADC_EQ_CTRL1:
353 case RT5670_ADC_EQ_CTRL2:
354 case RT5670_EQ_CTRL1:
355 case RT5670_EQ_CTRL2:
356 case RT5670_ALC_DRC_CTRL1:
357 case RT5670_ALC_DRC_CTRL2:
358 case RT5670_ALC_CTRL_1:
359 case RT5670_ALC_CTRL_2:
360 case RT5670_ALC_CTRL_3:
361 case RT5670_JD_CTRL:
362 case RT5670_IRQ_CTRL1:
363 case RT5670_IRQ_CTRL2:
364 case RT5670_INT_IRQ_ST:
365 case RT5670_GPIO_CTRL1:
366 case RT5670_GPIO_CTRL2:
367 case RT5670_GPIO_CTRL3:
368 case RT5670_SCRABBLE_FUN:
369 case RT5670_SCRABBLE_CTRL:
370 case RT5670_BASE_BACK:
371 case RT5670_MP3_PLUS1:
372 case RT5670_MP3_PLUS2:
373 case RT5670_ADJ_HPF1:
374 case RT5670_ADJ_HPF2:
375 case RT5670_HP_CALIB_AMP_DET:
376 case RT5670_SV_ZCD1:
377 case RT5670_SV_ZCD2:
378 case RT5670_IL_CMD:
379 case RT5670_IL_CMD2:
380 case RT5670_IL_CMD3:
381 case RT5670_DRC_HL_CTRL1:
382 case RT5670_DRC_HL_CTRL2:
383 case RT5670_ADC_MONO_HP_CTRL1:
384 case RT5670_ADC_MONO_HP_CTRL2:
385 case RT5670_ADC_STO2_HP_CTRL1:
386 case RT5670_ADC_STO2_HP_CTRL2:
387 case RT5670_JD_CTRL3:
388 case RT5670_JD_CTRL4:
389 case RT5670_DIG_MISC:
390 case RT5670_DSP_CTRL1:
391 case RT5670_DSP_CTRL2:
392 case RT5670_DSP_CTRL3:
393 case RT5670_DSP_CTRL4:
394 case RT5670_DSP_CTRL5:
395 case RT5670_GEN_CTRL2:
396 case RT5670_GEN_CTRL3:
397 case RT5670_VENDOR_ID:
398 case RT5670_VENDOR_ID1:
399 case RT5670_VENDOR_ID2:
400 return true;
401 default:
402 return false;
403 }
404 }
405
406 /**
407 * rt5670_headset_detect - Detect headset.
408 * @codec: SoC audio codec device.
409 * @jack_insert: Jack insert or not.
410 *
411 * Detect whether is headset or not when jack inserted.
412 *
413 * Returns detect status.
414 */
415
416 static int rt5670_headset_detect(struct snd_soc_codec *codec, int jack_insert)
417 {
418 int val;
419 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
420 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
421
422 if (jack_insert) {
423 snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power");
424 snd_soc_dapm_sync(dapm);
425 snd_soc_update_bits(codec, RT5670_GEN_CTRL3, 0x4, 0x0);
426 snd_soc_update_bits(codec, RT5670_CJ_CTRL2,
427 RT5670_CBJ_DET_MODE | RT5670_CBJ_MN_JD,
428 RT5670_CBJ_MN_JD);
429 snd_soc_write(codec, RT5670_GPIO_CTRL2, 0x0004);
430 snd_soc_update_bits(codec, RT5670_GPIO_CTRL1,
431 RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ);
432 snd_soc_update_bits(codec, RT5670_CJ_CTRL1,
433 RT5670_CBJ_BST1_EN, RT5670_CBJ_BST1_EN);
434 snd_soc_write(codec, RT5670_JD_CTRL3, 0x00f0);
435 snd_soc_update_bits(codec, RT5670_CJ_CTRL2,
436 RT5670_CBJ_MN_JD, RT5670_CBJ_MN_JD);
437 snd_soc_update_bits(codec, RT5670_CJ_CTRL2,
438 RT5670_CBJ_MN_JD, 0);
439 msleep(300);
440 val = snd_soc_read(codec, RT5670_CJ_CTRL3) & 0x7;
441 if (val == 0x1 || val == 0x2) {
442 rt5670->jack_type = SND_JACK_HEADSET;
443 /* for push button */
444 snd_soc_update_bits(codec, RT5670_INT_IRQ_ST, 0x8, 0x8);
445 snd_soc_update_bits(codec, RT5670_IL_CMD, 0x40, 0x40);
446 snd_soc_read(codec, RT5670_IL_CMD);
447 } else {
448 snd_soc_update_bits(codec, RT5670_GEN_CTRL3, 0x4, 0x4);
449 rt5670->jack_type = SND_JACK_HEADPHONE;
450 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
451 snd_soc_dapm_sync(dapm);
452 }
453 } else {
454 snd_soc_update_bits(codec, RT5670_INT_IRQ_ST, 0x8, 0x0);
455 snd_soc_update_bits(codec, RT5670_GEN_CTRL3, 0x4, 0x4);
456 rt5670->jack_type = 0;
457 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
458 snd_soc_dapm_sync(dapm);
459 }
460
461 return rt5670->jack_type;
462 }
463
464 void rt5670_jack_suspend(struct snd_soc_codec *codec)
465 {
466 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
467
468 rt5670->jack_type_saved = rt5670->jack_type;
469 rt5670_headset_detect(codec, 0);
470 }
471 EXPORT_SYMBOL_GPL(rt5670_jack_suspend);
472
473 void rt5670_jack_resume(struct snd_soc_codec *codec)
474 {
475 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
476
477 if (rt5670->jack_type_saved)
478 rt5670_headset_detect(codec, 1);
479 }
480 EXPORT_SYMBOL_GPL(rt5670_jack_resume);
481
482 static int rt5670_button_detect(struct snd_soc_codec *codec)
483 {
484 int btn_type, val;
485
486 val = snd_soc_read(codec, RT5670_IL_CMD);
487 btn_type = val & 0xff80;
488 snd_soc_write(codec, RT5670_IL_CMD, val);
489 if (btn_type != 0) {
490 msleep(20);
491 val = snd_soc_read(codec, RT5670_IL_CMD);
492 snd_soc_write(codec, RT5670_IL_CMD, val);
493 }
494
495 return btn_type;
496 }
497
498 static int rt5670_irq_detection(void *data)
499 {
500 struct rt5670_priv *rt5670 = (struct rt5670_priv *)data;
501 struct snd_soc_jack_gpio *gpio = &rt5670->hp_gpio;
502 struct snd_soc_jack *jack = rt5670->jack;
503 int val, btn_type, report = jack->status;
504
505 if (rt5670->pdata.jd_mode == 1) /* 2 port */
506 val = snd_soc_read(rt5670->codec, RT5670_A_JD_CTRL1) & 0x0070;
507 else
508 val = snd_soc_read(rt5670->codec, RT5670_A_JD_CTRL1) & 0x0020;
509
510 switch (val) {
511 /* jack in */
512 case 0x30: /* 2 port */
513 case 0x0: /* 1 port or 2 port */
514 if (rt5670->jack_type == 0) {
515 report = rt5670_headset_detect(rt5670->codec, 1);
516 /* for push button and jack out */
517 gpio->debounce_time = 25;
518 break;
519 }
520 btn_type = 0;
521 if (snd_soc_read(rt5670->codec, RT5670_INT_IRQ_ST) & 0x4) {
522 /* button pressed */
523 report = SND_JACK_HEADSET;
524 btn_type = rt5670_button_detect(rt5670->codec);
525 switch (btn_type) {
526 case 0x2000: /* up */
527 report |= SND_JACK_BTN_1;
528 break;
529 case 0x0400: /* center */
530 report |= SND_JACK_BTN_0;
531 break;
532 case 0x0080: /* down */
533 report |= SND_JACK_BTN_2;
534 break;
535 default:
536 dev_err(rt5670->codec->dev,
537 "Unexpected button code 0x%04x\n",
538 btn_type);
539 break;
540 }
541 }
542 if (btn_type == 0)/* button release */
543 report = rt5670->jack_type;
544
545 break;
546 /* jack out */
547 case 0x70: /* 2 port */
548 case 0x10: /* 2 port */
549 case 0x20: /* 1 port */
550 report = 0;
551 snd_soc_update_bits(rt5670->codec, RT5670_INT_IRQ_ST, 0x1, 0x0);
552 rt5670_headset_detect(rt5670->codec, 0);
553 gpio->debounce_time = 150; /* for jack in */
554 break;
555 default:
556 break;
557 }
558
559 return report;
560 }
561
562 int rt5670_set_jack_detect(struct snd_soc_codec *codec,
563 struct snd_soc_jack *jack)
564 {
565 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
566 int ret;
567
568 rt5670->jack = jack;
569 rt5670->hp_gpio.gpiod_dev = codec->dev;
570 rt5670->hp_gpio.name = "headset";
571 rt5670->hp_gpio.report = SND_JACK_HEADSET |
572 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2;
573 rt5670->hp_gpio.debounce_time = 150;
574 rt5670->hp_gpio.wake = true;
575 rt5670->hp_gpio.data = (struct rt5670_priv *)rt5670;
576 rt5670->hp_gpio.jack_status_check = rt5670_irq_detection;
577
578 ret = snd_soc_jack_add_gpios(rt5670->jack, 1,
579 &rt5670->hp_gpio);
580 if (ret) {
581 dev_err(codec->dev, "Adding jack GPIO failed\n");
582 return ret;
583 }
584
585 return 0;
586 }
587 EXPORT_SYMBOL_GPL(rt5670_set_jack_detect);
588
589 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
590 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
591 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
592 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
593 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
594
595 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
596 static const DECLARE_TLV_DB_RANGE(bst_tlv,
597 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
598 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
599 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
600 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
601 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
602 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
603 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
604 );
605
606 /* Interface data select */
607 static const char * const rt5670_data_select[] = {
608 "Normal", "Swap", "left copy to right", "right copy to left"
609 };
610
611 static SOC_ENUM_SINGLE_DECL(rt5670_if2_dac_enum, RT5670_DIG_INF1_DATA,
612 RT5670_IF2_DAC_SEL_SFT, rt5670_data_select);
613
614 static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_enum, RT5670_DIG_INF1_DATA,
615 RT5670_IF2_ADC_SEL_SFT, rt5670_data_select);
616
617 static const struct snd_kcontrol_new rt5670_snd_controls[] = {
618 /* Headphone Output Volume */
619 SOC_DOUBLE("HP Playback Switch", RT5670_HP_VOL,
620 RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1),
621 SOC_DOUBLE_TLV("HP Playback Volume", RT5670_HP_VOL,
622 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
623 39, 1, out_vol_tlv),
624 /* OUTPUT Control */
625 SOC_DOUBLE("OUT Channel Switch", RT5670_LOUT1,
626 RT5670_VOL_L_SFT, RT5670_VOL_R_SFT, 1, 1),
627 SOC_DOUBLE_TLV("OUT Playback Volume", RT5670_LOUT1,
628 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 39, 1, out_vol_tlv),
629 /* DAC Digital Volume */
630 SOC_DOUBLE("DAC2 Playback Switch", RT5670_DAC_CTRL,
631 RT5670_M_DAC_L2_VOL_SFT, RT5670_M_DAC_R2_VOL_SFT, 1, 1),
632 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5670_DAC1_DIG_VOL,
633 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
634 175, 0, dac_vol_tlv),
635 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5670_DAC2_DIG_VOL,
636 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
637 175, 0, dac_vol_tlv),
638 /* IN1/IN2 Control */
639 SOC_SINGLE_TLV("IN1 Boost Volume", RT5670_CJ_CTRL1,
640 RT5670_BST_SFT1, 8, 0, bst_tlv),
641 SOC_SINGLE_TLV("IN2 Boost Volume", RT5670_IN2,
642 RT5670_BST_SFT1, 8, 0, bst_tlv),
643 /* INL/INR Volume Control */
644 SOC_DOUBLE_TLV("IN Capture Volume", RT5670_INL1_INR1_VOL,
645 RT5670_INL_VOL_SFT, RT5670_INR_VOL_SFT,
646 31, 1, in_vol_tlv),
647 /* ADC Digital Volume Control */
648 SOC_DOUBLE("ADC Capture Switch", RT5670_STO1_ADC_DIG_VOL,
649 RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1),
650 SOC_DOUBLE_TLV("ADC Capture Volume", RT5670_STO1_ADC_DIG_VOL,
651 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
652 127, 0, adc_vol_tlv),
653
654 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5670_MONO_ADC_DIG_VOL,
655 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
656 127, 0, adc_vol_tlv),
657
658 /* ADC Boost Volume Control */
659 SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
660 RT5670_STO1_ADC_L_BST_SFT, RT5670_STO1_ADC_R_BST_SFT,
661 3, 0, adc_bst_tlv),
662
663 SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
664 RT5670_STO2_ADC_L_BST_SFT, RT5670_STO2_ADC_R_BST_SFT,
665 3, 0, adc_bst_tlv),
666
667 SOC_ENUM("ADC IF2 Data Switch", rt5670_if2_adc_enum),
668 SOC_ENUM("DAC IF2 Data Switch", rt5670_if2_dac_enum),
669 };
670
671 /**
672 * set_dmic_clk - Set parameter of dmic.
673 *
674 * @w: DAPM widget.
675 * @kcontrol: The kcontrol of this widget.
676 * @event: Event id.
677 *
678 * Choose dmic clock between 1MHz and 3MHz.
679 * It is better for clock to approximate 3MHz.
680 */
681 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
682 struct snd_kcontrol *kcontrol, int event)
683 {
684 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
685 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
686 int idx, rate;
687
688 rate = rt5670->sysclk / rl6231_get_pre_div(rt5670->regmap,
689 RT5670_ADDA_CLK1, RT5670_I2S_PD1_SFT);
690 idx = rl6231_calc_dmic_clk(rate);
691 if (idx < 0)
692 dev_err(codec->dev, "Failed to set DMIC clock\n");
693 else
694 snd_soc_update_bits(codec, RT5670_DMIC_CTRL1,
695 RT5670_DMIC_CLK_MASK, idx << RT5670_DMIC_CLK_SFT);
696 return idx;
697 }
698
699 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
700 struct snd_soc_dapm_widget *sink)
701 {
702 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
703 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
704
705 if (rt5670->sysclk_src == RT5670_SCLK_S_PLL1)
706 return 1;
707 else
708 return 0;
709 }
710
711 static int is_using_asrc(struct snd_soc_dapm_widget *source,
712 struct snd_soc_dapm_widget *sink)
713 {
714 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
715 unsigned int reg, shift, val;
716
717 switch (source->shift) {
718 case 0:
719 reg = RT5670_ASRC_3;
720 shift = 0;
721 break;
722 case 1:
723 reg = RT5670_ASRC_3;
724 shift = 4;
725 break;
726 case 2:
727 reg = RT5670_ASRC_5;
728 shift = 12;
729 break;
730 case 3:
731 reg = RT5670_ASRC_2;
732 shift = 0;
733 break;
734 case 8:
735 reg = RT5670_ASRC_2;
736 shift = 4;
737 break;
738 case 9:
739 reg = RT5670_ASRC_2;
740 shift = 8;
741 break;
742 case 10:
743 reg = RT5670_ASRC_2;
744 shift = 12;
745 break;
746 default:
747 return 0;
748 }
749
750 val = (snd_soc_read(codec, reg) >> shift) & 0xf;
751 switch (val) {
752 case 1:
753 case 2:
754 case 3:
755 case 4:
756 return 1;
757 default:
758 return 0;
759 }
760
761 }
762
763 static int can_use_asrc(struct snd_soc_dapm_widget *source,
764 struct snd_soc_dapm_widget *sink)
765 {
766 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
767 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
768
769 if (rt5670->sysclk > rt5670->lrck[RT5670_AIF1] * 384)
770 return 1;
771
772 return 0;
773 }
774
775
776 /**
777 * rt5670_sel_asrc_clk_src - select ASRC clock source for a set of filters
778 * @codec: SoC audio codec device.
779 * @filter_mask: mask of filters.
780 * @clk_src: clock source
781 *
782 * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5670 can
783 * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
784 * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
785 * ASRC function will track i2s clock and generate a corresponding system clock
786 * for codec. This function provides an API to select the clock source for a
787 * set of filters specified by the mask. And the codec driver will turn on ASRC
788 * for these filters if ASRC is selected as their clock source.
789 */
790 int rt5670_sel_asrc_clk_src(struct snd_soc_codec *codec,
791 unsigned int filter_mask, unsigned int clk_src)
792 {
793 unsigned int asrc2_mask = 0, asrc2_value = 0;
794 unsigned int asrc3_mask = 0, asrc3_value = 0;
795
796 if (clk_src > RT5670_CLK_SEL_SYS3)
797 return -EINVAL;
798
799 if (filter_mask & RT5670_DA_STEREO_FILTER) {
800 asrc2_mask |= RT5670_DA_STO_CLK_SEL_MASK;
801 asrc2_value = (asrc2_value & ~RT5670_DA_STO_CLK_SEL_MASK)
802 | (clk_src << RT5670_DA_STO_CLK_SEL_SFT);
803 }
804
805 if (filter_mask & RT5670_DA_MONO_L_FILTER) {
806 asrc2_mask |= RT5670_DA_MONOL_CLK_SEL_MASK;
807 asrc2_value = (asrc2_value & ~RT5670_DA_MONOL_CLK_SEL_MASK)
808 | (clk_src << RT5670_DA_MONOL_CLK_SEL_SFT);
809 }
810
811 if (filter_mask & RT5670_DA_MONO_R_FILTER) {
812 asrc2_mask |= RT5670_DA_MONOR_CLK_SEL_MASK;
813 asrc2_value = (asrc2_value & ~RT5670_DA_MONOR_CLK_SEL_MASK)
814 | (clk_src << RT5670_DA_MONOR_CLK_SEL_SFT);
815 }
816
817 if (filter_mask & RT5670_AD_STEREO_FILTER) {
818 asrc2_mask |= RT5670_AD_STO1_CLK_SEL_MASK;
819 asrc2_value = (asrc2_value & ~RT5670_AD_STO1_CLK_SEL_MASK)
820 | (clk_src << RT5670_AD_STO1_CLK_SEL_SFT);
821 }
822
823 if (filter_mask & RT5670_AD_MONO_L_FILTER) {
824 asrc3_mask |= RT5670_AD_MONOL_CLK_SEL_MASK;
825 asrc3_value = (asrc3_value & ~RT5670_AD_MONOL_CLK_SEL_MASK)
826 | (clk_src << RT5670_AD_MONOL_CLK_SEL_SFT);
827 }
828
829 if (filter_mask & RT5670_AD_MONO_R_FILTER) {
830 asrc3_mask |= RT5670_AD_MONOR_CLK_SEL_MASK;
831 asrc3_value = (asrc3_value & ~RT5670_AD_MONOR_CLK_SEL_MASK)
832 | (clk_src << RT5670_AD_MONOR_CLK_SEL_SFT);
833 }
834
835 if (filter_mask & RT5670_UP_RATE_FILTER) {
836 asrc3_mask |= RT5670_UP_CLK_SEL_MASK;
837 asrc3_value = (asrc3_value & ~RT5670_UP_CLK_SEL_MASK)
838 | (clk_src << RT5670_UP_CLK_SEL_SFT);
839 }
840
841 if (filter_mask & RT5670_DOWN_RATE_FILTER) {
842 asrc3_mask |= RT5670_DOWN_CLK_SEL_MASK;
843 asrc3_value = (asrc3_value & ~RT5670_DOWN_CLK_SEL_MASK)
844 | (clk_src << RT5670_DOWN_CLK_SEL_SFT);
845 }
846
847 if (asrc2_mask)
848 snd_soc_update_bits(codec, RT5670_ASRC_2,
849 asrc2_mask, asrc2_value);
850
851 if (asrc3_mask)
852 snd_soc_update_bits(codec, RT5670_ASRC_3,
853 asrc3_mask, asrc3_value);
854 return 0;
855 }
856 EXPORT_SYMBOL_GPL(rt5670_sel_asrc_clk_src);
857
858 /* Digital Mixer */
859 static const struct snd_kcontrol_new rt5670_sto1_adc_l_mix[] = {
860 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER,
861 RT5670_M_ADC_L1_SFT, 1, 1),
862 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER,
863 RT5670_M_ADC_L2_SFT, 1, 1),
864 };
865
866 static const struct snd_kcontrol_new rt5670_sto1_adc_r_mix[] = {
867 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER,
868 RT5670_M_ADC_R1_SFT, 1, 1),
869 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER,
870 RT5670_M_ADC_R2_SFT, 1, 1),
871 };
872
873 static const struct snd_kcontrol_new rt5670_sto2_adc_l_mix[] = {
874 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER,
875 RT5670_M_ADC_L1_SFT, 1, 1),
876 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER,
877 RT5670_M_ADC_L2_SFT, 1, 1),
878 };
879
880 static const struct snd_kcontrol_new rt5670_sto2_adc_r_mix[] = {
881 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER,
882 RT5670_M_ADC_R1_SFT, 1, 1),
883 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER,
884 RT5670_M_ADC_R2_SFT, 1, 1),
885 };
886
887 static const struct snd_kcontrol_new rt5670_mono_adc_l_mix[] = {
888 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER,
889 RT5670_M_MONO_ADC_L1_SFT, 1, 1),
890 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER,
891 RT5670_M_MONO_ADC_L2_SFT, 1, 1),
892 };
893
894 static const struct snd_kcontrol_new rt5670_mono_adc_r_mix[] = {
895 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER,
896 RT5670_M_MONO_ADC_R1_SFT, 1, 1),
897 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER,
898 RT5670_M_MONO_ADC_R2_SFT, 1, 1),
899 };
900
901 static const struct snd_kcontrol_new rt5670_dac_l_mix[] = {
902 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
903 RT5670_M_ADCMIX_L_SFT, 1, 1),
904 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER,
905 RT5670_M_DAC1_L_SFT, 1, 1),
906 };
907
908 static const struct snd_kcontrol_new rt5670_dac_r_mix[] = {
909 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
910 RT5670_M_ADCMIX_R_SFT, 1, 1),
911 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER,
912 RT5670_M_DAC1_R_SFT, 1, 1),
913 };
914
915 static const struct snd_kcontrol_new rt5670_sto_dac_l_mix[] = {
916 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER,
917 RT5670_M_DAC_L1_SFT, 1, 1),
918 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_STO_DAC_MIXER,
919 RT5670_M_DAC_L2_SFT, 1, 1),
920 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER,
921 RT5670_M_DAC_R1_STO_L_SFT, 1, 1),
922 };
923
924 static const struct snd_kcontrol_new rt5670_sto_dac_r_mix[] = {
925 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER,
926 RT5670_M_DAC_R1_SFT, 1, 1),
927 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_STO_DAC_MIXER,
928 RT5670_M_DAC_R2_SFT, 1, 1),
929 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER,
930 RT5670_M_DAC_L1_STO_R_SFT, 1, 1),
931 };
932
933 static const struct snd_kcontrol_new rt5670_mono_dac_l_mix[] = {
934 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_DD_MIXER,
935 RT5670_M_DAC_L1_MONO_L_SFT, 1, 1),
936 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER,
937 RT5670_M_DAC_L2_MONO_L_SFT, 1, 1),
938 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER,
939 RT5670_M_DAC_R2_MONO_L_SFT, 1, 1),
940 };
941
942 static const struct snd_kcontrol_new rt5670_mono_dac_r_mix[] = {
943 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_DD_MIXER,
944 RT5670_M_DAC_R1_MONO_R_SFT, 1, 1),
945 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER,
946 RT5670_M_DAC_R2_MONO_R_SFT, 1, 1),
947 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER,
948 RT5670_M_DAC_L2_MONO_R_SFT, 1, 1),
949 };
950
951 static const struct snd_kcontrol_new rt5670_dig_l_mix[] = {
952 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5670_DIG_MIXER,
953 RT5670_M_STO_L_DAC_L_SFT, 1, 1),
954 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER,
955 RT5670_M_DAC_L2_DAC_L_SFT, 1, 1),
956 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER,
957 RT5670_M_DAC_R2_DAC_L_SFT, 1, 1),
958 };
959
960 static const struct snd_kcontrol_new rt5670_dig_r_mix[] = {
961 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5670_DIG_MIXER,
962 RT5670_M_STO_R_DAC_R_SFT, 1, 1),
963 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER,
964 RT5670_M_DAC_R2_DAC_R_SFT, 1, 1),
965 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER,
966 RT5670_M_DAC_L2_DAC_R_SFT, 1, 1),
967 };
968
969 /* Analog Input Mixer */
970 static const struct snd_kcontrol_new rt5670_rec_l_mix[] = {
971 SOC_DAPM_SINGLE("INL Switch", RT5670_REC_L2_MIXER,
972 RT5670_M_IN_L_RM_L_SFT, 1, 1),
973 SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_L2_MIXER,
974 RT5670_M_BST2_RM_L_SFT, 1, 1),
975 SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_L2_MIXER,
976 RT5670_M_BST1_RM_L_SFT, 1, 1),
977 };
978
979 static const struct snd_kcontrol_new rt5670_rec_r_mix[] = {
980 SOC_DAPM_SINGLE("INR Switch", RT5670_REC_R2_MIXER,
981 RT5670_M_IN_R_RM_R_SFT, 1, 1),
982 SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_R2_MIXER,
983 RT5670_M_BST2_RM_R_SFT, 1, 1),
984 SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_R2_MIXER,
985 RT5670_M_BST1_RM_R_SFT, 1, 1),
986 };
987
988 static const struct snd_kcontrol_new rt5670_out_l_mix[] = {
989 SOC_DAPM_SINGLE("BST1 Switch", RT5670_OUT_L1_MIXER,
990 RT5670_M_BST1_OM_L_SFT, 1, 1),
991 SOC_DAPM_SINGLE("INL Switch", RT5670_OUT_L1_MIXER,
992 RT5670_M_IN_L_OM_L_SFT, 1, 1),
993 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_OUT_L1_MIXER,
994 RT5670_M_DAC_L2_OM_L_SFT, 1, 1),
995 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_OUT_L1_MIXER,
996 RT5670_M_DAC_L1_OM_L_SFT, 1, 1),
997 };
998
999 static const struct snd_kcontrol_new rt5670_out_r_mix[] = {
1000 SOC_DAPM_SINGLE("BST2 Switch", RT5670_OUT_R1_MIXER,
1001 RT5670_M_BST2_OM_R_SFT, 1, 1),
1002 SOC_DAPM_SINGLE("INR Switch", RT5670_OUT_R1_MIXER,
1003 RT5670_M_IN_R_OM_R_SFT, 1, 1),
1004 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_OUT_R1_MIXER,
1005 RT5670_M_DAC_R2_OM_R_SFT, 1, 1),
1006 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_OUT_R1_MIXER,
1007 RT5670_M_DAC_R1_OM_R_SFT, 1, 1),
1008 };
1009
1010 static const struct snd_kcontrol_new rt5670_hpo_mix[] = {
1011 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
1012 RT5670_M_DAC1_HM_SFT, 1, 1),
1013 SOC_DAPM_SINGLE("HPVOL Switch", RT5670_HPO_MIXER,
1014 RT5670_M_HPVOL_HM_SFT, 1, 1),
1015 };
1016
1017 static const struct snd_kcontrol_new rt5670_hpvoll_mix[] = {
1018 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
1019 RT5670_M_DACL1_HML_SFT, 1, 1),
1020 SOC_DAPM_SINGLE("INL Switch", RT5670_HPO_MIXER,
1021 RT5670_M_INL1_HML_SFT, 1, 1),
1022 };
1023
1024 static const struct snd_kcontrol_new rt5670_hpvolr_mix[] = {
1025 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
1026 RT5670_M_DACR1_HMR_SFT, 1, 1),
1027 SOC_DAPM_SINGLE("INR Switch", RT5670_HPO_MIXER,
1028 RT5670_M_INR1_HMR_SFT, 1, 1),
1029 };
1030
1031 static const struct snd_kcontrol_new rt5670_lout_mix[] = {
1032 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_LOUT_MIXER,
1033 RT5670_M_DAC_L1_LM_SFT, 1, 1),
1034 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_LOUT_MIXER,
1035 RT5670_M_DAC_R1_LM_SFT, 1, 1),
1036 SOC_DAPM_SINGLE("OUTMIX L Switch", RT5670_LOUT_MIXER,
1037 RT5670_M_OV_L_LM_SFT, 1, 1),
1038 SOC_DAPM_SINGLE("OUTMIX R Switch", RT5670_LOUT_MIXER,
1039 RT5670_M_OV_R_LM_SFT, 1, 1),
1040 };
1041
1042 static const struct snd_kcontrol_new rt5670_hpl_mix[] = {
1043 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_HPO_MIXER,
1044 RT5670_M_DACL1_HML_SFT, 1, 1),
1045 SOC_DAPM_SINGLE("INL1 Switch", RT5670_HPO_MIXER,
1046 RT5670_M_INL1_HML_SFT, 1, 1),
1047 };
1048
1049 static const struct snd_kcontrol_new rt5670_hpr_mix[] = {
1050 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_HPO_MIXER,
1051 RT5670_M_DACR1_HMR_SFT, 1, 1),
1052 SOC_DAPM_SINGLE("INR1 Switch", RT5670_HPO_MIXER,
1053 RT5670_M_INR1_HMR_SFT, 1, 1),
1054 };
1055
1056 static const struct snd_kcontrol_new lout_l_enable_control =
1057 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1,
1058 RT5670_L_MUTE_SFT, 1, 1);
1059
1060 static const struct snd_kcontrol_new lout_r_enable_control =
1061 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1,
1062 RT5670_R_MUTE_SFT, 1, 1);
1063
1064 /* DAC1 L/R source */ /* MX-29 [9:8] [11:10] */
1065 static const char * const rt5670_dac1_src[] = {
1066 "IF1 DAC", "IF2 DAC"
1067 };
1068
1069 static SOC_ENUM_SINGLE_DECL(rt5670_dac1l_enum, RT5670_AD_DA_MIXER,
1070 RT5670_DAC1_L_SEL_SFT, rt5670_dac1_src);
1071
1072 static const struct snd_kcontrol_new rt5670_dac1l_mux =
1073 SOC_DAPM_ENUM("DAC1 L source", rt5670_dac1l_enum);
1074
1075 static SOC_ENUM_SINGLE_DECL(rt5670_dac1r_enum, RT5670_AD_DA_MIXER,
1076 RT5670_DAC1_R_SEL_SFT, rt5670_dac1_src);
1077
1078 static const struct snd_kcontrol_new rt5670_dac1r_mux =
1079 SOC_DAPM_ENUM("DAC1 R source", rt5670_dac1r_enum);
1080
1081 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
1082 /* TODO Use SOC_VALUE_ENUM_SINGLE_DECL */
1083 static const char * const rt5670_dac12_src[] = {
1084 "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC",
1085 "Bass", "VAD_ADC", "IF4 DAC"
1086 };
1087
1088 static SOC_ENUM_SINGLE_DECL(rt5670_dac2l_enum, RT5670_DAC_CTRL,
1089 RT5670_DAC2_L_SEL_SFT, rt5670_dac12_src);
1090
1091 static const struct snd_kcontrol_new rt5670_dac_l2_mux =
1092 SOC_DAPM_ENUM("DAC2 L source", rt5670_dac2l_enum);
1093
1094 static const char * const rt5670_dacr2_src[] = {
1095 "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC", "TxDP ADC", "IF4 DAC"
1096 };
1097
1098 static SOC_ENUM_SINGLE_DECL(rt5670_dac2r_enum, RT5670_DAC_CTRL,
1099 RT5670_DAC2_R_SEL_SFT, rt5670_dacr2_src);
1100
1101 static const struct snd_kcontrol_new rt5670_dac_r2_mux =
1102 SOC_DAPM_ENUM("DAC2 R source", rt5670_dac2r_enum);
1103
1104 /*RxDP source*/ /* MX-2D [15:13] */
1105 static const char * const rt5670_rxdp_src[] = {
1106 "IF2 DAC", "IF1 DAC", "STO1 ADC Mixer", "STO2 ADC Mixer",
1107 "Mono ADC Mixer L", "Mono ADC Mixer R", "DAC1"
1108 };
1109
1110 static SOC_ENUM_SINGLE_DECL(rt5670_rxdp_enum, RT5670_DSP_PATH1,
1111 RT5670_RXDP_SEL_SFT, rt5670_rxdp_src);
1112
1113 static const struct snd_kcontrol_new rt5670_rxdp_mux =
1114 SOC_DAPM_ENUM("DAC2 L source", rt5670_rxdp_enum);
1115
1116 /* MX-2D [1] [0] */
1117 static const char * const rt5670_dsp_bypass_src[] = {
1118 "DSP", "Bypass"
1119 };
1120
1121 static SOC_ENUM_SINGLE_DECL(rt5670_dsp_ul_enum, RT5670_DSP_PATH1,
1122 RT5670_DSP_UL_SFT, rt5670_dsp_bypass_src);
1123
1124 static const struct snd_kcontrol_new rt5670_dsp_ul_mux =
1125 SOC_DAPM_ENUM("DSP UL source", rt5670_dsp_ul_enum);
1126
1127 static SOC_ENUM_SINGLE_DECL(rt5670_dsp_dl_enum, RT5670_DSP_PATH1,
1128 RT5670_DSP_DL_SFT, rt5670_dsp_bypass_src);
1129
1130 static const struct snd_kcontrol_new rt5670_dsp_dl_mux =
1131 SOC_DAPM_ENUM("DSP DL source", rt5670_dsp_dl_enum);
1132
1133 /* Stereo2 ADC source */
1134 /* MX-26 [15] */
1135 static const char * const rt5670_stereo2_adc_lr_src[] = {
1136 "L", "LR"
1137 };
1138
1139 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_lr_enum, RT5670_STO2_ADC_MIXER,
1140 RT5670_STO2_ADC_SRC_SFT, rt5670_stereo2_adc_lr_src);
1141
1142 static const struct snd_kcontrol_new rt5670_sto2_adc_lr_mux =
1143 SOC_DAPM_ENUM("Stereo2 ADC LR source", rt5670_stereo2_adc_lr_enum);
1144
1145 /* Stereo1 ADC source */
1146 /* MX-27 MX-26 [12] */
1147 static const char * const rt5670_stereo_adc1_src[] = {
1148 "DAC MIX", "ADC"
1149 };
1150
1151 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc1_enum, RT5670_STO1_ADC_MIXER,
1152 RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src);
1153
1154 static const struct snd_kcontrol_new rt5670_sto_adc_1_mux =
1155 SOC_DAPM_ENUM("Stereo1 ADC 1 Mux", rt5670_stereo1_adc1_enum);
1156
1157 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc1_enum, RT5670_STO2_ADC_MIXER,
1158 RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src);
1159
1160 static const struct snd_kcontrol_new rt5670_sto2_adc_1_mux =
1161 SOC_DAPM_ENUM("Stereo2 ADC 1 Mux", rt5670_stereo2_adc1_enum);
1162
1163
1164 /* MX-27 MX-26 [11] */
1165 static const char * const rt5670_stereo_adc2_src[] = {
1166 "DAC MIX", "DMIC"
1167 };
1168
1169 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc2_enum, RT5670_STO1_ADC_MIXER,
1170 RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src);
1171
1172 static const struct snd_kcontrol_new rt5670_sto_adc_2_mux =
1173 SOC_DAPM_ENUM("Stereo1 ADC 2 Mux", rt5670_stereo1_adc2_enum);
1174
1175 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc2_enum, RT5670_STO2_ADC_MIXER,
1176 RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src);
1177
1178 static const struct snd_kcontrol_new rt5670_sto2_adc_2_mux =
1179 SOC_DAPM_ENUM("Stereo2 ADC 2 Mux", rt5670_stereo2_adc2_enum);
1180
1181
1182 /* MX-27 MX26 [10] */
1183 static const char * const rt5670_stereo_adc_src[] = {
1184 "ADC1L ADC2R", "ADC3"
1185 };
1186
1187 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc_enum, RT5670_STO1_ADC_MIXER,
1188 RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src);
1189
1190 static const struct snd_kcontrol_new rt5670_sto_adc_mux =
1191 SOC_DAPM_ENUM("Stereo1 ADC source", rt5670_stereo1_adc_enum);
1192
1193 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_enum, RT5670_STO2_ADC_MIXER,
1194 RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src);
1195
1196 static const struct snd_kcontrol_new rt5670_sto2_adc_mux =
1197 SOC_DAPM_ENUM("Stereo2 ADC source", rt5670_stereo2_adc_enum);
1198
1199 /* MX-27 MX-26 [9:8] */
1200 static const char * const rt5670_stereo_dmic_src[] = {
1201 "DMIC1", "DMIC2", "DMIC3"
1202 };
1203
1204 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_dmic_enum, RT5670_STO1_ADC_MIXER,
1205 RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src);
1206
1207 static const struct snd_kcontrol_new rt5670_sto1_dmic_mux =
1208 SOC_DAPM_ENUM("Stereo1 DMIC source", rt5670_stereo1_dmic_enum);
1209
1210 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_dmic_enum, RT5670_STO2_ADC_MIXER,
1211 RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src);
1212
1213 static const struct snd_kcontrol_new rt5670_sto2_dmic_mux =
1214 SOC_DAPM_ENUM("Stereo2 DMIC source", rt5670_stereo2_dmic_enum);
1215
1216 /* MX-27 [0] */
1217 static const char * const rt5670_stereo_dmic3_src[] = {
1218 "DMIC3", "PDM ADC"
1219 };
1220
1221 static SOC_ENUM_SINGLE_DECL(rt5670_stereo_dmic3_enum, RT5670_STO1_ADC_MIXER,
1222 RT5670_DMIC3_SRC_SFT, rt5670_stereo_dmic3_src);
1223
1224 static const struct snd_kcontrol_new rt5670_sto_dmic3_mux =
1225 SOC_DAPM_ENUM("Stereo DMIC3 source", rt5670_stereo_dmic3_enum);
1226
1227 /* Mono ADC source */
1228 /* MX-28 [12] */
1229 static const char * const rt5670_mono_adc_l1_src[] = {
1230 "Mono DAC MIXL", "ADC1"
1231 };
1232
1233 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l1_enum, RT5670_MONO_ADC_MIXER,
1234 RT5670_MONO_ADC_L1_SRC_SFT, rt5670_mono_adc_l1_src);
1235
1236 static const struct snd_kcontrol_new rt5670_mono_adc_l1_mux =
1237 SOC_DAPM_ENUM("Mono ADC1 left source", rt5670_mono_adc_l1_enum);
1238 /* MX-28 [11] */
1239 static const char * const rt5670_mono_adc_l2_src[] = {
1240 "Mono DAC MIXL", "DMIC"
1241 };
1242
1243 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l2_enum, RT5670_MONO_ADC_MIXER,
1244 RT5670_MONO_ADC_L2_SRC_SFT, rt5670_mono_adc_l2_src);
1245
1246 static const struct snd_kcontrol_new rt5670_mono_adc_l2_mux =
1247 SOC_DAPM_ENUM("Mono ADC2 left source", rt5670_mono_adc_l2_enum);
1248
1249 /* MX-28 [9:8] */
1250 static const char * const rt5670_mono_dmic_src[] = {
1251 "DMIC1", "DMIC2", "DMIC3"
1252 };
1253
1254 static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_l_enum, RT5670_MONO_ADC_MIXER,
1255 RT5670_MONO_DMIC_L_SRC_SFT, rt5670_mono_dmic_src);
1256
1257 static const struct snd_kcontrol_new rt5670_mono_dmic_l_mux =
1258 SOC_DAPM_ENUM("Mono DMIC left source", rt5670_mono_dmic_l_enum);
1259 /* MX-28 [1:0] */
1260 static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_r_enum, RT5670_MONO_ADC_MIXER,
1261 RT5670_MONO_DMIC_R_SRC_SFT, rt5670_mono_dmic_src);
1262
1263 static const struct snd_kcontrol_new rt5670_mono_dmic_r_mux =
1264 SOC_DAPM_ENUM("Mono DMIC Right source", rt5670_mono_dmic_r_enum);
1265 /* MX-28 [4] */
1266 static const char * const rt5670_mono_adc_r1_src[] = {
1267 "Mono DAC MIXR", "ADC2"
1268 };
1269
1270 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r1_enum, RT5670_MONO_ADC_MIXER,
1271 RT5670_MONO_ADC_R1_SRC_SFT, rt5670_mono_adc_r1_src);
1272
1273 static const struct snd_kcontrol_new rt5670_mono_adc_r1_mux =
1274 SOC_DAPM_ENUM("Mono ADC1 right source", rt5670_mono_adc_r1_enum);
1275 /* MX-28 [3] */
1276 static const char * const rt5670_mono_adc_r2_src[] = {
1277 "Mono DAC MIXR", "DMIC"
1278 };
1279
1280 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r2_enum, RT5670_MONO_ADC_MIXER,
1281 RT5670_MONO_ADC_R2_SRC_SFT, rt5670_mono_adc_r2_src);
1282
1283 static const struct snd_kcontrol_new rt5670_mono_adc_r2_mux =
1284 SOC_DAPM_ENUM("Mono ADC2 right source", rt5670_mono_adc_r2_enum);
1285
1286 /* MX-2D [3:2] */
1287 static const char * const rt5670_txdp_slot_src[] = {
1288 "Slot 0-1", "Slot 2-3", "Slot 4-5", "Slot 6-7"
1289 };
1290
1291 static SOC_ENUM_SINGLE_DECL(rt5670_txdp_slot_enum, RT5670_DSP_PATH1,
1292 RT5670_TXDP_SLOT_SEL_SFT, rt5670_txdp_slot_src);
1293
1294 static const struct snd_kcontrol_new rt5670_txdp_slot_mux =
1295 SOC_DAPM_ENUM("TxDP Slot source", rt5670_txdp_slot_enum);
1296
1297 /* MX-2F [15] */
1298 static const char * const rt5670_if1_adc2_in_src[] = {
1299 "IF_ADC2", "VAD_ADC"
1300 };
1301
1302 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in_enum, RT5670_DIG_INF1_DATA,
1303 RT5670_IF1_ADC2_IN_SFT, rt5670_if1_adc2_in_src);
1304
1305 static const struct snd_kcontrol_new rt5670_if1_adc2_in_mux =
1306 SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5670_if1_adc2_in_enum);
1307
1308 /* MX-2F [14:12] */
1309 static const char * const rt5670_if2_adc_in_src[] = {
1310 "IF_ADC1", "IF_ADC2", "IF_ADC3", "TxDC_DAC", "TxDP_ADC", "VAD_ADC"
1311 };
1312
1313 static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_in_enum, RT5670_DIG_INF1_DATA,
1314 RT5670_IF2_ADC_IN_SFT, rt5670_if2_adc_in_src);
1315
1316 static const struct snd_kcontrol_new rt5670_if2_adc_in_mux =
1317 SOC_DAPM_ENUM("IF2 ADC IN source", rt5670_if2_adc_in_enum);
1318
1319 /* MX-30 [5:4] */
1320 static const char * const rt5670_if4_adc_in_src[] = {
1321 "IF_ADC1", "IF_ADC2", "IF_ADC3"
1322 };
1323
1324 static SOC_ENUM_SINGLE_DECL(rt5670_if4_adc_in_enum, RT5670_DIG_INF2_DATA,
1325 RT5670_IF4_ADC_IN_SFT, rt5670_if4_adc_in_src);
1326
1327 static const struct snd_kcontrol_new rt5670_if4_adc_in_mux =
1328 SOC_DAPM_ENUM("IF4 ADC IN source", rt5670_if4_adc_in_enum);
1329
1330 /* MX-31 [15] [13] [11] [9] */
1331 static const char * const rt5670_pdm_src[] = {
1332 "Mono DAC", "Stereo DAC"
1333 };
1334
1335 static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_l_enum, RT5670_PDM_OUT_CTRL,
1336 RT5670_PDM1_L_SFT, rt5670_pdm_src);
1337
1338 static const struct snd_kcontrol_new rt5670_pdm1_l_mux =
1339 SOC_DAPM_ENUM("PDM1 L source", rt5670_pdm1_l_enum);
1340
1341 static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_r_enum, RT5670_PDM_OUT_CTRL,
1342 RT5670_PDM1_R_SFT, rt5670_pdm_src);
1343
1344 static const struct snd_kcontrol_new rt5670_pdm1_r_mux =
1345 SOC_DAPM_ENUM("PDM1 R source", rt5670_pdm1_r_enum);
1346
1347 static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_l_enum, RT5670_PDM_OUT_CTRL,
1348 RT5670_PDM2_L_SFT, rt5670_pdm_src);
1349
1350 static const struct snd_kcontrol_new rt5670_pdm2_l_mux =
1351 SOC_DAPM_ENUM("PDM2 L source", rt5670_pdm2_l_enum);
1352
1353 static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_r_enum, RT5670_PDM_OUT_CTRL,
1354 RT5670_PDM2_R_SFT, rt5670_pdm_src);
1355
1356 static const struct snd_kcontrol_new rt5670_pdm2_r_mux =
1357 SOC_DAPM_ENUM("PDM2 R source", rt5670_pdm2_r_enum);
1358
1359 /* MX-FA [12] */
1360 static const char * const rt5670_if1_adc1_in1_src[] = {
1361 "IF_ADC1", "IF1_ADC3"
1362 };
1363
1364 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in1_enum, RT5670_DIG_MISC,
1365 RT5670_IF1_ADC1_IN1_SFT, rt5670_if1_adc1_in1_src);
1366
1367 static const struct snd_kcontrol_new rt5670_if1_adc1_in1_mux =
1368 SOC_DAPM_ENUM("IF1 ADC1 IN1 source", rt5670_if1_adc1_in1_enum);
1369
1370 /* MX-FA [11] */
1371 static const char * const rt5670_if1_adc1_in2_src[] = {
1372 "IF1_ADC1_IN1", "IF1_ADC4"
1373 };
1374
1375 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in2_enum, RT5670_DIG_MISC,
1376 RT5670_IF1_ADC1_IN2_SFT, rt5670_if1_adc1_in2_src);
1377
1378 static const struct snd_kcontrol_new rt5670_if1_adc1_in2_mux =
1379 SOC_DAPM_ENUM("IF1 ADC1 IN2 source", rt5670_if1_adc1_in2_enum);
1380
1381 /* MX-FA [10] */
1382 static const char * const rt5670_if1_adc2_in1_src[] = {
1383 "IF1_ADC2_IN", "IF1_ADC4"
1384 };
1385
1386 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in1_enum, RT5670_DIG_MISC,
1387 RT5670_IF1_ADC2_IN1_SFT, rt5670_if1_adc2_in1_src);
1388
1389 static const struct snd_kcontrol_new rt5670_if1_adc2_in1_mux =
1390 SOC_DAPM_ENUM("IF1 ADC2 IN1 source", rt5670_if1_adc2_in1_enum);
1391
1392 /* MX-9D [9:8] */
1393 static const char * const rt5670_vad_adc_src[] = {
1394 "Sto1 ADC L", "Mono ADC L", "Mono ADC R", "Sto2 ADC L"
1395 };
1396
1397 static SOC_ENUM_SINGLE_DECL(rt5670_vad_adc_enum, RT5670_VAD_CTRL4,
1398 RT5670_VAD_SEL_SFT, rt5670_vad_adc_src);
1399
1400 static const struct snd_kcontrol_new rt5670_vad_adc_mux =
1401 SOC_DAPM_ENUM("VAD ADC source", rt5670_vad_adc_enum);
1402
1403 static int rt5670_hp_power_event(struct snd_soc_dapm_widget *w,
1404 struct snd_kcontrol *kcontrol, int event)
1405 {
1406 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1407 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
1408
1409 switch (event) {
1410 case SND_SOC_DAPM_POST_PMU:
1411 regmap_update_bits(rt5670->regmap, RT5670_CHARGE_PUMP,
1412 RT5670_PM_HP_MASK, RT5670_PM_HP_HV);
1413 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2,
1414 0x0400, 0x0400);
1415 /* headphone amp power on */
1416 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
1417 RT5670_PWR_HA | RT5670_PWR_FV1 |
1418 RT5670_PWR_FV2, RT5670_PWR_HA |
1419 RT5670_PWR_FV1 | RT5670_PWR_FV2);
1420 /* depop parameters */
1421 regmap_write(rt5670->regmap, RT5670_DEPOP_M2, 0x3100);
1422 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8009);
1423 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1424 RT5670_HP_DCC_INT1, 0x9f00);
1425 mdelay(20);
1426 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1427 break;
1428 case SND_SOC_DAPM_PRE_PMD:
1429 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x0004);
1430 msleep(30);
1431 break;
1432 default:
1433 return 0;
1434 }
1435
1436 return 0;
1437 }
1438
1439 static int rt5670_hp_event(struct snd_soc_dapm_widget *w,
1440 struct snd_kcontrol *kcontrol, int event)
1441 {
1442 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1443 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
1444
1445 switch (event) {
1446 case SND_SOC_DAPM_POST_PMU:
1447 /* headphone unmute sequence */
1448 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1449 RT5670_MAMP_INT_REG2, 0xb400);
1450 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772);
1451 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x805d);
1452 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d);
1453 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2,
1454 0x0300, 0x0300);
1455 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL,
1456 RT5670_L_MUTE | RT5670_R_MUTE, 0);
1457 msleep(80);
1458 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1459 break;
1460
1461 case SND_SOC_DAPM_PRE_PMD:
1462 /* headphone mute sequence */
1463 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1464 RT5670_MAMP_INT_REG2, 0xb400);
1465 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772);
1466 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x803d);
1467 mdelay(10);
1468 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d);
1469 mdelay(10);
1470 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL,
1471 RT5670_L_MUTE | RT5670_R_MUTE,
1472 RT5670_L_MUTE | RT5670_R_MUTE);
1473 msleep(20);
1474 regmap_update_bits(rt5670->regmap,
1475 RT5670_GEN_CTRL2, 0x0300, 0x0);
1476 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1477 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0707);
1478 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1479 RT5670_MAMP_INT_REG2, 0xfc00);
1480 break;
1481
1482 default:
1483 return 0;
1484 }
1485
1486 return 0;
1487 }
1488
1489 static int rt5670_bst1_event(struct snd_soc_dapm_widget *w,
1490 struct snd_kcontrol *kcontrol, int event)
1491 {
1492 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1493
1494 switch (event) {
1495 case SND_SOC_DAPM_POST_PMU:
1496 snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
1497 RT5670_PWR_BST1_P, RT5670_PWR_BST1_P);
1498 break;
1499
1500 case SND_SOC_DAPM_PRE_PMD:
1501 snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
1502 RT5670_PWR_BST1_P, 0);
1503 break;
1504
1505 default:
1506 return 0;
1507 }
1508
1509 return 0;
1510 }
1511
1512 static int rt5670_bst2_event(struct snd_soc_dapm_widget *w,
1513 struct snd_kcontrol *kcontrol, int event)
1514 {
1515 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1516
1517 switch (event) {
1518 case SND_SOC_DAPM_POST_PMU:
1519 snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
1520 RT5670_PWR_BST2_P, RT5670_PWR_BST2_P);
1521 break;
1522
1523 case SND_SOC_DAPM_PRE_PMD:
1524 snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
1525 RT5670_PWR_BST2_P, 0);
1526 break;
1527
1528 default:
1529 return 0;
1530 }
1531
1532 return 0;
1533 }
1534
1535 static const struct snd_soc_dapm_widget rt5670_dapm_widgets[] = {
1536 SND_SOC_DAPM_SUPPLY("PLL1", RT5670_PWR_ANLG2,
1537 RT5670_PWR_PLL_BIT, 0, NULL, 0),
1538 SND_SOC_DAPM_SUPPLY("I2S DSP", RT5670_PWR_DIG2,
1539 RT5670_PWR_I2S_DSP_BIT, 0, NULL, 0),
1540 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5670_PWR_VOL,
1541 RT5670_PWR_MIC_DET_BIT, 0, NULL, 0),
1542
1543 /* ASRC */
1544 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5670_ASRC_1,
1545 11, 0, NULL, 0),
1546 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5670_ASRC_1,
1547 12, 0, NULL, 0),
1548 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5670_ASRC_1,
1549 10, 0, NULL, 0),
1550 SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5670_ASRC_1,
1551 9, 0, NULL, 0),
1552 SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5670_ASRC_1,
1553 8, 0, NULL, 0),
1554 SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5670_ASRC_1,
1555 7, 0, NULL, 0),
1556 SND_SOC_DAPM_SUPPLY_S("DMIC STO2 ASRC", 1, RT5670_ASRC_1,
1557 6, 0, NULL, 0),
1558 SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5670_ASRC_1,
1559 5, 0, NULL, 0),
1560 SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5670_ASRC_1,
1561 4, 0, NULL, 0),
1562 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5670_ASRC_1,
1563 3, 0, NULL, 0),
1564 SND_SOC_DAPM_SUPPLY_S("ADC STO2 ASRC", 1, RT5670_ASRC_1,
1565 2, 0, NULL, 0),
1566 SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5670_ASRC_1,
1567 1, 0, NULL, 0),
1568 SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5670_ASRC_1,
1569 0, 0, NULL, 0),
1570
1571 /* Input Side */
1572 /* micbias */
1573 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5670_PWR_ANLG2,
1574 RT5670_PWR_MB1_BIT, 0, NULL, 0),
1575
1576 /* Input Lines */
1577 SND_SOC_DAPM_INPUT("DMIC L1"),
1578 SND_SOC_DAPM_INPUT("DMIC R1"),
1579 SND_SOC_DAPM_INPUT("DMIC L2"),
1580 SND_SOC_DAPM_INPUT("DMIC R2"),
1581 SND_SOC_DAPM_INPUT("DMIC L3"),
1582 SND_SOC_DAPM_INPUT("DMIC R3"),
1583
1584 SND_SOC_DAPM_INPUT("IN1P"),
1585 SND_SOC_DAPM_INPUT("IN1N"),
1586 SND_SOC_DAPM_INPUT("IN2P"),
1587 SND_SOC_DAPM_INPUT("IN2N"),
1588
1589 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1590 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1591 SND_SOC_DAPM_PGA("DMIC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1592
1593 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1594 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1595 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5670_DMIC_CTRL1,
1596 RT5670_DMIC_1_EN_SFT, 0, NULL, 0),
1597 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5670_DMIC_CTRL1,
1598 RT5670_DMIC_2_EN_SFT, 0, NULL, 0),
1599 SND_SOC_DAPM_SUPPLY("DMIC3 Power", RT5670_DMIC_CTRL1,
1600 RT5670_DMIC_3_EN_SFT, 0, NULL, 0),
1601 /* Boost */
1602 SND_SOC_DAPM_PGA_E("BST1", RT5670_PWR_ANLG2, RT5670_PWR_BST1_BIT,
1603 0, NULL, 0, rt5670_bst1_event,
1604 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1605 SND_SOC_DAPM_PGA_E("BST2", RT5670_PWR_ANLG2, RT5670_PWR_BST2_BIT,
1606 0, NULL, 0, rt5670_bst2_event,
1607 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1608 /* Input Volume */
1609 SND_SOC_DAPM_PGA("INL VOL", RT5670_PWR_VOL,
1610 RT5670_PWR_IN_L_BIT, 0, NULL, 0),
1611 SND_SOC_DAPM_PGA("INR VOL", RT5670_PWR_VOL,
1612 RT5670_PWR_IN_R_BIT, 0, NULL, 0),
1613
1614 /* REC Mixer */
1615 SND_SOC_DAPM_MIXER("RECMIXL", RT5670_PWR_MIXER, RT5670_PWR_RM_L_BIT, 0,
1616 rt5670_rec_l_mix, ARRAY_SIZE(rt5670_rec_l_mix)),
1617 SND_SOC_DAPM_MIXER("RECMIXR", RT5670_PWR_MIXER, RT5670_PWR_RM_R_BIT, 0,
1618 rt5670_rec_r_mix, ARRAY_SIZE(rt5670_rec_r_mix)),
1619 /* ADCs */
1620 SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0),
1621 SND_SOC_DAPM_ADC("ADC 2", NULL, SND_SOC_NOPM, 0, 0),
1622
1623 SND_SOC_DAPM_PGA("ADC 1_2", SND_SOC_NOPM, 0, 0, NULL, 0),
1624
1625 SND_SOC_DAPM_SUPPLY("ADC 1 power", RT5670_PWR_DIG1,
1626 RT5670_PWR_ADC_L_BIT, 0, NULL, 0),
1627 SND_SOC_DAPM_SUPPLY("ADC 2 power", RT5670_PWR_DIG1,
1628 RT5670_PWR_ADC_R_BIT, 0, NULL, 0),
1629 SND_SOC_DAPM_SUPPLY("ADC clock", RT5670_PR_BASE +
1630 RT5670_CHOP_DAC_ADC, 12, 0, NULL, 0),
1631 /* ADC Mux */
1632 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
1633 &rt5670_sto1_dmic_mux),
1634 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1635 &rt5670_sto_adc_2_mux),
1636 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1637 &rt5670_sto_adc_2_mux),
1638 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1639 &rt5670_sto_adc_1_mux),
1640 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1641 &rt5670_sto_adc_1_mux),
1642 SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0,
1643 &rt5670_sto2_dmic_mux),
1644 SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1645 &rt5670_sto2_adc_2_mux),
1646 SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1647 &rt5670_sto2_adc_2_mux),
1648 SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1649 &rt5670_sto2_adc_1_mux),
1650 SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1651 &rt5670_sto2_adc_1_mux),
1652 SND_SOC_DAPM_MUX("Stereo2 ADC LR Mux", SND_SOC_NOPM, 0, 0,
1653 &rt5670_sto2_adc_lr_mux),
1654 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
1655 &rt5670_mono_dmic_l_mux),
1656 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
1657 &rt5670_mono_dmic_r_mux),
1658 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1659 &rt5670_mono_adc_l2_mux),
1660 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1661 &rt5670_mono_adc_l1_mux),
1662 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1663 &rt5670_mono_adc_r1_mux),
1664 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1665 &rt5670_mono_adc_r2_mux),
1666 /* ADC Mixer */
1667 SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5670_PWR_DIG2,
1668 RT5670_PWR_ADC_S1F_BIT, 0, NULL, 0),
1669 SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5670_PWR_DIG2,
1670 RT5670_PWR_ADC_S2F_BIT, 0, NULL, 0),
1671 SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", RT5670_STO1_ADC_DIG_VOL,
1672 RT5670_L_MUTE_SFT, 1, rt5670_sto1_adc_l_mix,
1673 ARRAY_SIZE(rt5670_sto1_adc_l_mix)),
1674 SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", RT5670_STO1_ADC_DIG_VOL,
1675 RT5670_R_MUTE_SFT, 1, rt5670_sto1_adc_r_mix,
1676 ARRAY_SIZE(rt5670_sto1_adc_r_mix)),
1677 SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0,
1678 rt5670_sto2_adc_l_mix,
1679 ARRAY_SIZE(rt5670_sto2_adc_l_mix)),
1680 SND_SOC_DAPM_MIXER("Sto2 ADC MIXR", SND_SOC_NOPM, 0, 0,
1681 rt5670_sto2_adc_r_mix,
1682 ARRAY_SIZE(rt5670_sto2_adc_r_mix)),
1683 SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5670_PWR_DIG2,
1684 RT5670_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1685 SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5670_MONO_ADC_DIG_VOL,
1686 RT5670_L_MUTE_SFT, 1, rt5670_mono_adc_l_mix,
1687 ARRAY_SIZE(rt5670_mono_adc_l_mix)),
1688 SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5670_PWR_DIG2,
1689 RT5670_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1690 SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5670_MONO_ADC_DIG_VOL,
1691 RT5670_R_MUTE_SFT, 1, rt5670_mono_adc_r_mix,
1692 ARRAY_SIZE(rt5670_mono_adc_r_mix)),
1693
1694 /* ADC PGA */
1695 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1696 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1697 SND_SOC_DAPM_PGA("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1698 SND_SOC_DAPM_PGA("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1699 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1700 SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1701 SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1702 SND_SOC_DAPM_PGA("Mono ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1703 SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1704 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1705 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1706 SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1707 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1708 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1709 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1710
1711 /* DSP */
1712 SND_SOC_DAPM_PGA("TxDP_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1713 SND_SOC_DAPM_PGA("TxDP_ADC_L", SND_SOC_NOPM, 0, 0, NULL, 0),
1714 SND_SOC_DAPM_PGA("TxDP_ADC_R", SND_SOC_NOPM, 0, 0, NULL, 0),
1715 SND_SOC_DAPM_PGA("TxDC_DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1716
1717 SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0,
1718 &rt5670_txdp_slot_mux),
1719
1720 SND_SOC_DAPM_MUX("DSP UL Mux", SND_SOC_NOPM, 0, 0,
1721 &rt5670_dsp_ul_mux),
1722 SND_SOC_DAPM_MUX("DSP DL Mux", SND_SOC_NOPM, 0, 0,
1723 &rt5670_dsp_dl_mux),
1724
1725 SND_SOC_DAPM_MUX("RxDP Mux", SND_SOC_NOPM, 0, 0,
1726 &rt5670_rxdp_mux),
1727
1728 /* IF2 Mux */
1729 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0,
1730 &rt5670_if2_adc_in_mux),
1731
1732 /* Digital Interface */
1733 SND_SOC_DAPM_SUPPLY("I2S1", RT5670_PWR_DIG1,
1734 RT5670_PWR_I2S1_BIT, 0, NULL, 0),
1735 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1736 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1737 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1738 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1739 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1740 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1741 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1742 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1743 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1744 SND_SOC_DAPM_SUPPLY("I2S2", RT5670_PWR_DIG1,
1745 RT5670_PWR_I2S2_BIT, 0, NULL, 0),
1746 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1747 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1748 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1749 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1750 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1751 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1752
1753 /* Digital Interface Select */
1754 SND_SOC_DAPM_MUX("IF1 ADC1 IN1 Mux", SND_SOC_NOPM, 0, 0,
1755 &rt5670_if1_adc1_in1_mux),
1756 SND_SOC_DAPM_MUX("IF1 ADC1 IN2 Mux", SND_SOC_NOPM, 0, 0,
1757 &rt5670_if1_adc1_in2_mux),
1758 SND_SOC_DAPM_MUX("IF1 ADC2 IN Mux", SND_SOC_NOPM, 0, 0,
1759 &rt5670_if1_adc2_in_mux),
1760 SND_SOC_DAPM_MUX("IF1 ADC2 IN1 Mux", SND_SOC_NOPM, 0, 0,
1761 &rt5670_if1_adc2_in1_mux),
1762 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM, 0, 0,
1763 &rt5670_vad_adc_mux),
1764
1765 /* Audio Interface */
1766 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1767 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1768 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1769 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0,
1770 RT5670_GPIO_CTRL1, RT5670_I2S2_PIN_SFT, 1),
1771
1772 /* Audio DSP */
1773 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1774
1775 /* Output Side */
1776 /* DAC mixer before sound effect */
1777 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
1778 rt5670_dac_l_mix, ARRAY_SIZE(rt5670_dac_l_mix)),
1779 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
1780 rt5670_dac_r_mix, ARRAY_SIZE(rt5670_dac_r_mix)),
1781 SND_SOC_DAPM_PGA("DAC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1782
1783 /* DAC2 channel Mux */
1784 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1785 &rt5670_dac_l2_mux),
1786 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1787 &rt5670_dac_r2_mux),
1788 SND_SOC_DAPM_PGA("DAC L2 Volume", RT5670_PWR_DIG1,
1789 RT5670_PWR_DAC_L2_BIT, 0, NULL, 0),
1790 SND_SOC_DAPM_PGA("DAC R2 Volume", RT5670_PWR_DIG1,
1791 RT5670_PWR_DAC_R2_BIT, 0, NULL, 0),
1792
1793 SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1l_mux),
1794 SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1r_mux),
1795
1796 /* DAC Mixer */
1797 SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5670_PWR_DIG2,
1798 RT5670_PWR_DAC_S1F_BIT, 0, NULL, 0),
1799 SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5670_PWR_DIG2,
1800 RT5670_PWR_DAC_MF_L_BIT, 0, NULL, 0),
1801 SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5670_PWR_DIG2,
1802 RT5670_PWR_DAC_MF_R_BIT, 0, NULL, 0),
1803 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1804 rt5670_sto_dac_l_mix,
1805 ARRAY_SIZE(rt5670_sto_dac_l_mix)),
1806 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1807 rt5670_sto_dac_r_mix,
1808 ARRAY_SIZE(rt5670_sto_dac_r_mix)),
1809 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1810 rt5670_mono_dac_l_mix,
1811 ARRAY_SIZE(rt5670_mono_dac_l_mix)),
1812 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1813 rt5670_mono_dac_r_mix,
1814 ARRAY_SIZE(rt5670_mono_dac_r_mix)),
1815 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1816 rt5670_dig_l_mix,
1817 ARRAY_SIZE(rt5670_dig_l_mix)),
1818 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1819 rt5670_dig_r_mix,
1820 ARRAY_SIZE(rt5670_dig_r_mix)),
1821
1822 /* DACs */
1823 SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5670_PWR_DIG1,
1824 RT5670_PWR_DAC_L1_BIT, 0, NULL, 0),
1825 SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5670_PWR_DIG1,
1826 RT5670_PWR_DAC_R1_BIT, 0, NULL, 0),
1827 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
1828 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
1829 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5670_PWR_DIG1,
1830 RT5670_PWR_DAC_L2_BIT, 0),
1831
1832 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5670_PWR_DIG1,
1833 RT5670_PWR_DAC_R2_BIT, 0),
1834 /* OUT Mixer */
1835
1836 SND_SOC_DAPM_MIXER("OUT MIXL", RT5670_PWR_MIXER, RT5670_PWR_OM_L_BIT,
1837 0, rt5670_out_l_mix, ARRAY_SIZE(rt5670_out_l_mix)),
1838 SND_SOC_DAPM_MIXER("OUT MIXR", RT5670_PWR_MIXER, RT5670_PWR_OM_R_BIT,
1839 0, rt5670_out_r_mix, ARRAY_SIZE(rt5670_out_r_mix)),
1840 /* Ouput Volume */
1841 SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5670_PWR_VOL,
1842 RT5670_PWR_HV_L_BIT, 0,
1843 rt5670_hpvoll_mix, ARRAY_SIZE(rt5670_hpvoll_mix)),
1844 SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5670_PWR_VOL,
1845 RT5670_PWR_HV_R_BIT, 0,
1846 rt5670_hpvolr_mix, ARRAY_SIZE(rt5670_hpvolr_mix)),
1847 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
1848 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
1849 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
1850
1851 /* HPO/LOUT/Mono Mixer */
1852 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0,
1853 rt5670_hpo_mix, ARRAY_SIZE(rt5670_hpo_mix)),
1854 SND_SOC_DAPM_MIXER("LOUT MIX", RT5670_PWR_ANLG1, RT5670_PWR_LM_BIT,
1855 0, rt5670_lout_mix, ARRAY_SIZE(rt5670_lout_mix)),
1856 SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM, 0, 0,
1857 rt5670_hp_power_event, SND_SOC_DAPM_POST_PMU |
1858 SND_SOC_DAPM_PRE_PMD),
1859 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5670_PWR_ANLG1,
1860 RT5670_PWR_HP_L_BIT, 0, NULL, 0),
1861 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5670_PWR_ANLG1,
1862 RT5670_PWR_HP_R_BIT, 0, NULL, 0),
1863 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0,
1864 rt5670_hp_event, SND_SOC_DAPM_PRE_PMD |
1865 SND_SOC_DAPM_POST_PMU),
1866 SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
1867 &lout_l_enable_control),
1868 SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
1869 &lout_r_enable_control),
1870 SND_SOC_DAPM_PGA("LOUT Amp", SND_SOC_NOPM, 0, 0, NULL, 0),
1871
1872 /* PDM */
1873 SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5670_PWR_DIG2,
1874 RT5670_PWR_PDM1_BIT, 0, NULL, 0),
1875
1876 SND_SOC_DAPM_MUX("PDM1 L Mux", RT5670_PDM_OUT_CTRL,
1877 RT5670_M_PDM1_L_SFT, 1, &rt5670_pdm1_l_mux),
1878 SND_SOC_DAPM_MUX("PDM1 R Mux", RT5670_PDM_OUT_CTRL,
1879 RT5670_M_PDM1_R_SFT, 1, &rt5670_pdm1_r_mux),
1880
1881 /* Output Lines */
1882 SND_SOC_DAPM_OUTPUT("HPOL"),
1883 SND_SOC_DAPM_OUTPUT("HPOR"),
1884 SND_SOC_DAPM_OUTPUT("LOUTL"),
1885 SND_SOC_DAPM_OUTPUT("LOUTR"),
1886 };
1887
1888 static const struct snd_soc_dapm_widget rt5670_specific_dapm_widgets[] = {
1889 SND_SOC_DAPM_SUPPLY("PDM2 Power", RT5670_PWR_DIG2,
1890 RT5670_PWR_PDM2_BIT, 0, NULL, 0),
1891 SND_SOC_DAPM_MUX("PDM2 L Mux", RT5670_PDM_OUT_CTRL,
1892 RT5670_M_PDM2_L_SFT, 1, &rt5670_pdm2_l_mux),
1893 SND_SOC_DAPM_MUX("PDM2 R Mux", RT5670_PDM_OUT_CTRL,
1894 RT5670_M_PDM2_R_SFT, 1, &rt5670_pdm2_r_mux),
1895 SND_SOC_DAPM_OUTPUT("PDM1L"),
1896 SND_SOC_DAPM_OUTPUT("PDM1R"),
1897 SND_SOC_DAPM_OUTPUT("PDM2L"),
1898 SND_SOC_DAPM_OUTPUT("PDM2R"),
1899 };
1900
1901 static const struct snd_soc_dapm_widget rt5672_specific_dapm_widgets[] = {
1902 SND_SOC_DAPM_PGA("SPO Amp", SND_SOC_NOPM, 0, 0, NULL, 0),
1903 SND_SOC_DAPM_OUTPUT("SPOLP"),
1904 SND_SOC_DAPM_OUTPUT("SPOLN"),
1905 SND_SOC_DAPM_OUTPUT("SPORP"),
1906 SND_SOC_DAPM_OUTPUT("SPORN"),
1907 };
1908
1909 static const struct snd_soc_dapm_route rt5670_dapm_routes[] = {
1910 { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc },
1911 { "ADC Stereo2 Filter", NULL, "ADC STO2 ASRC", is_using_asrc },
1912 { "ADC Mono Left Filter", NULL, "ADC MONO L ASRC", is_using_asrc },
1913 { "ADC Mono Right Filter", NULL, "ADC MONO R ASRC", is_using_asrc },
1914 { "DAC Mono Left Filter", NULL, "DAC MONO L ASRC", is_using_asrc },
1915 { "DAC Mono Right Filter", NULL, "DAC MONO R ASRC", is_using_asrc },
1916 { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc },
1917 { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC", can_use_asrc },
1918 { "Stereo2 DMIC Mux", NULL, "DMIC STO2 ASRC", can_use_asrc },
1919 { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC", can_use_asrc },
1920 { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC", can_use_asrc },
1921
1922 { "I2S1", NULL, "I2S1 ASRC", can_use_asrc},
1923 { "I2S2", NULL, "I2S2 ASRC", can_use_asrc},
1924
1925 { "DMIC1", NULL, "DMIC L1" },
1926 { "DMIC1", NULL, "DMIC R1" },
1927 { "DMIC2", NULL, "DMIC L2" },
1928 { "DMIC2", NULL, "DMIC R2" },
1929 { "DMIC3", NULL, "DMIC L3" },
1930 { "DMIC3", NULL, "DMIC R3" },
1931
1932 { "BST1", NULL, "IN1P" },
1933 { "BST1", NULL, "IN1N" },
1934 { "BST1", NULL, "Mic Det Power" },
1935 { "BST2", NULL, "IN2P" },
1936 { "BST2", NULL, "IN2N" },
1937
1938 { "INL VOL", NULL, "IN2P" },
1939 { "INR VOL", NULL, "IN2N" },
1940
1941 { "RECMIXL", "INL Switch", "INL VOL" },
1942 { "RECMIXL", "BST2 Switch", "BST2" },
1943 { "RECMIXL", "BST1 Switch", "BST1" },
1944
1945 { "RECMIXR", "INR Switch", "INR VOL" },
1946 { "RECMIXR", "BST2 Switch", "BST2" },
1947 { "RECMIXR", "BST1 Switch", "BST1" },
1948
1949 { "ADC 1", NULL, "RECMIXL" },
1950 { "ADC 1", NULL, "ADC 1 power" },
1951 { "ADC 1", NULL, "ADC clock" },
1952 { "ADC 2", NULL, "RECMIXR" },
1953 { "ADC 2", NULL, "ADC 2 power" },
1954 { "ADC 2", NULL, "ADC clock" },
1955
1956 { "DMIC L1", NULL, "DMIC CLK" },
1957 { "DMIC L1", NULL, "DMIC1 Power" },
1958 { "DMIC R1", NULL, "DMIC CLK" },
1959 { "DMIC R1", NULL, "DMIC1 Power" },
1960 { "DMIC L2", NULL, "DMIC CLK" },
1961 { "DMIC L2", NULL, "DMIC2 Power" },
1962 { "DMIC R2", NULL, "DMIC CLK" },
1963 { "DMIC R2", NULL, "DMIC2 Power" },
1964 { "DMIC L3", NULL, "DMIC CLK" },
1965 { "DMIC L3", NULL, "DMIC3 Power" },
1966 { "DMIC R3", NULL, "DMIC CLK" },
1967 { "DMIC R3", NULL, "DMIC3 Power" },
1968
1969 { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
1970 { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
1971 { "Stereo1 DMIC Mux", "DMIC3", "DMIC3" },
1972
1973 { "Stereo2 DMIC Mux", "DMIC1", "DMIC1" },
1974 { "Stereo2 DMIC Mux", "DMIC2", "DMIC2" },
1975 { "Stereo2 DMIC Mux", "DMIC3", "DMIC3" },
1976
1977 { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
1978 { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
1979 { "Mono DMIC L Mux", "DMIC3", "DMIC L3" },
1980
1981 { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
1982 { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
1983 { "Mono DMIC R Mux", "DMIC3", "DMIC R3" },
1984
1985 { "ADC 1_2", NULL, "ADC 1" },
1986 { "ADC 1_2", NULL, "ADC 2" },
1987
1988 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1989 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
1990 { "Stereo1 ADC L1 Mux", "ADC", "ADC 1_2" },
1991 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
1992
1993 { "Stereo1 ADC R1 Mux", "ADC", "ADC 1_2" },
1994 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
1995 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1996 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
1997
1998 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
1999 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2000 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2001 { "Mono ADC L1 Mux", "ADC1", "ADC 1" },
2002
2003 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2004 { "Mono ADC R1 Mux", "ADC2", "ADC 2" },
2005 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
2006 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2007
2008 { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
2009 { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
2010 { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
2011 { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
2012
2013 { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
2014 { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" },
2015
2016 { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
2017 { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" },
2018 { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
2019
2020 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
2021 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
2022 { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" },
2023 { "ADC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll },
2024
2025 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
2026 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
2027 { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" },
2028 { "ADC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll },
2029
2030 { "Stereo2 ADC L2 Mux", "DMIC", "Stereo2 DMIC Mux" },
2031 { "Stereo2 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2032 { "Stereo2 ADC L1 Mux", "ADC", "ADC 1_2" },
2033 { "Stereo2 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2034
2035 { "Stereo2 ADC R1 Mux", "ADC", "ADC 1_2" },
2036 { "Stereo2 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2037 { "Stereo2 ADC R2 Mux", "DMIC", "Stereo2 DMIC Mux" },
2038 { "Stereo2 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2039
2040 { "Sto2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux" },
2041 { "Sto2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux" },
2042 { "Sto2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux" },
2043 { "Sto2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux" },
2044
2045 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXL" },
2046 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXR" },
2047
2048 { "Stereo2 ADC LR Mux", "L", "Sto2 ADC MIXL" },
2049 { "Stereo2 ADC LR Mux", "LR", "Sto2 ADC LR MIX" },
2050
2051 { "Stereo2 ADC MIXL", NULL, "Stereo2 ADC LR Mux" },
2052 { "Stereo2 ADC MIXL", NULL, "ADC Stereo2 Filter" },
2053
2054 { "Stereo2 ADC MIXR", NULL, "Sto2 ADC MIXR" },
2055 { "Stereo2 ADC MIXR", NULL, "ADC Stereo2 Filter" },
2056 { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll },
2057
2058 { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
2059 { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
2060 { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
2061 { "VAD ADC Mux", "Sto2 ADC L", "Sto2 ADC MIXL" },
2062
2063 { "VAD_ADC", NULL, "VAD ADC Mux" },
2064
2065 { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
2066 { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
2067 { "IF_ADC2", NULL, "Mono ADC MIXL" },
2068 { "IF_ADC2", NULL, "Mono ADC MIXR" },
2069 { "IF_ADC3", NULL, "Stereo2 ADC MIXL" },
2070 { "IF_ADC3", NULL, "Stereo2 ADC MIXR" },
2071
2072 { "IF1 ADC1 IN1 Mux", "IF_ADC1", "IF_ADC1" },
2073 { "IF1 ADC1 IN1 Mux", "IF1_ADC3", "IF1_ADC3" },
2074
2075 { "IF1 ADC1 IN2 Mux", "IF1_ADC1_IN1", "IF1 ADC1 IN1 Mux" },
2076 { "IF1 ADC1 IN2 Mux", "IF1_ADC4", "TxDP_ADC" },
2077
2078 { "IF1 ADC2 IN Mux", "IF_ADC2", "IF_ADC2" },
2079 { "IF1 ADC2 IN Mux", "VAD_ADC", "VAD_ADC" },
2080
2081 { "IF1 ADC2 IN1 Mux", "IF1_ADC2_IN", "IF1 ADC2 IN Mux" },
2082 { "IF1 ADC2 IN1 Mux", "IF1_ADC4", "TxDP_ADC" },
2083
2084 { "IF1_ADC1" , NULL, "IF1 ADC1 IN2 Mux" },
2085 { "IF1_ADC2" , NULL, "IF1 ADC2 IN1 Mux" },
2086
2087 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL" },
2088 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR" },
2089 { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXL" },
2090 { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXR" },
2091 { "Mono ADC MIX", NULL, "Mono ADC MIXL" },
2092 { "Mono ADC MIX", NULL, "Mono ADC MIXR" },
2093
2094 { "RxDP Mux", "IF2 DAC", "IF2 DAC" },
2095 { "RxDP Mux", "IF1 DAC", "IF1 DAC2" },
2096 { "RxDP Mux", "STO1 ADC Mixer", "Stereo1 ADC MIX" },
2097 { "RxDP Mux", "STO2 ADC Mixer", "Stereo2 ADC MIX" },
2098 { "RxDP Mux", "Mono ADC Mixer L", "Mono ADC MIXL" },
2099 { "RxDP Mux", "Mono ADC Mixer R", "Mono ADC MIXR" },
2100 { "RxDP Mux", "DAC1", "DAC MIX" },
2101
2102 { "TDM Data Mux", "Slot 0-1", "Stereo1 ADC MIX" },
2103 { "TDM Data Mux", "Slot 2-3", "Mono ADC MIX" },
2104 { "TDM Data Mux", "Slot 4-5", "Stereo2 ADC MIX" },
2105 { "TDM Data Mux", "Slot 6-7", "IF2 DAC" },
2106
2107 { "DSP UL Mux", "Bypass", "TDM Data Mux" },
2108 { "DSP UL Mux", NULL, "I2S DSP" },
2109 { "DSP DL Mux", "Bypass", "RxDP Mux" },
2110 { "DSP DL Mux", NULL, "I2S DSP" },
2111
2112 { "TxDP_ADC_L", NULL, "DSP UL Mux" },
2113 { "TxDP_ADC_R", NULL, "DSP UL Mux" },
2114 { "TxDC_DAC", NULL, "DSP DL Mux" },
2115
2116 { "TxDP_ADC", NULL, "TxDP_ADC_L" },
2117 { "TxDP_ADC", NULL, "TxDP_ADC_R" },
2118
2119 { "IF1 ADC", NULL, "I2S1" },
2120 { "IF1 ADC", NULL, "IF1_ADC1" },
2121 { "IF1 ADC", NULL, "IF1_ADC2" },
2122 { "IF1 ADC", NULL, "IF_ADC3" },
2123 { "IF1 ADC", NULL, "TxDP_ADC" },
2124
2125 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
2126 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
2127 { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" },
2128 { "IF2 ADC Mux", "TxDC_DAC", "TxDC_DAC" },
2129 { "IF2 ADC Mux", "TxDP_ADC", "TxDP_ADC" },
2130 { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
2131
2132 { "IF2 ADC L", NULL, "IF2 ADC Mux" },
2133 { "IF2 ADC R", NULL, "IF2 ADC Mux" },
2134
2135 { "IF2 ADC", NULL, "I2S2" },
2136 { "IF2 ADC", NULL, "IF2 ADC L" },
2137 { "IF2 ADC", NULL, "IF2 ADC R" },
2138
2139 { "AIF1TX", NULL, "IF1 ADC" },
2140 { "AIF2TX", NULL, "IF2 ADC" },
2141
2142 { "IF1 DAC1", NULL, "AIF1RX" },
2143 { "IF1 DAC2", NULL, "AIF1RX" },
2144 { "IF2 DAC", NULL, "AIF2RX" },
2145
2146 { "IF1 DAC1", NULL, "I2S1" },
2147 { "IF1 DAC2", NULL, "I2S1" },
2148 { "IF2 DAC", NULL, "I2S2" },
2149
2150 { "IF1 DAC2 L", NULL, "IF1 DAC2" },
2151 { "IF1 DAC2 R", NULL, "IF1 DAC2" },
2152 { "IF1 DAC1 L", NULL, "IF1 DAC1" },
2153 { "IF1 DAC1 R", NULL, "IF1 DAC1" },
2154 { "IF2 DAC L", NULL, "IF2 DAC" },
2155 { "IF2 DAC R", NULL, "IF2 DAC" },
2156
2157 { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" },
2158 { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
2159
2160 { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" },
2161 { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
2162
2163 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
2164 { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
2165 { "DAC1 MIXL", NULL, "DAC Stereo1 Filter" },
2166 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
2167 { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
2168 { "DAC1 MIXR", NULL, "DAC Stereo1 Filter" },
2169
2170 { "DAC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
2171 { "DAC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll },
2172 { "DAC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll },
2173
2174 { "DAC MIX", NULL, "DAC1 MIXL" },
2175 { "DAC MIX", NULL, "DAC1 MIXR" },
2176
2177 { "Audio DSP", NULL, "DAC1 MIXL" },
2178 { "Audio DSP", NULL, "DAC1 MIXR" },
2179
2180 { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" },
2181 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
2182 { "DAC L2 Mux", "TxDC DAC", "TxDC_DAC" },
2183 { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
2184 { "DAC L2 Volume", NULL, "DAC L2 Mux" },
2185 { "DAC L2 Volume", NULL, "DAC Mono Left Filter" },
2186
2187 { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" },
2188 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
2189 { "DAC R2 Mux", "TxDC DAC", "TxDC_DAC" },
2190 { "DAC R2 Mux", "TxDP ADC", "TxDP_ADC" },
2191 { "DAC R2 Volume", NULL, "DAC R2 Mux" },
2192 { "DAC R2 Volume", NULL, "DAC Mono Right Filter" },
2193
2194 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2195 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
2196 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2197 { "Stereo DAC MIXL", NULL, "DAC Stereo1 Filter" },
2198 { "Stereo DAC MIXL", NULL, "DAC L1 Power" },
2199 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2200 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
2201 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2202 { "Stereo DAC MIXR", NULL, "DAC Stereo1 Filter" },
2203 { "Stereo DAC MIXR", NULL, "DAC R1 Power" },
2204
2205 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2206 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2207 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2208 { "Mono DAC MIXL", NULL, "DAC Mono Left Filter" },
2209 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2210 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2211 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2212 { "Mono DAC MIXR", NULL, "DAC Mono Right Filter" },
2213
2214 { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
2215 { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2216 { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2217 { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
2218 { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2219 { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2220
2221 { "DAC L1", NULL, "DAC L1 Power" },
2222 { "DAC L1", NULL, "Stereo DAC MIXL" },
2223 { "DAC R1", NULL, "DAC R1 Power" },
2224 { "DAC R1", NULL, "Stereo DAC MIXR" },
2225 { "DAC L2", NULL, "Mono DAC MIXL" },
2226 { "DAC R2", NULL, "Mono DAC MIXR" },
2227
2228 { "OUT MIXL", "BST1 Switch", "BST1" },
2229 { "OUT MIXL", "INL Switch", "INL VOL" },
2230 { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
2231 { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
2232
2233 { "OUT MIXR", "BST2 Switch", "BST2" },
2234 { "OUT MIXR", "INR Switch", "INR VOL" },
2235 { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
2236 { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
2237
2238 { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
2239 { "HPOVOL MIXL", "INL Switch", "INL VOL" },
2240 { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
2241 { "HPOVOL MIXR", "INR Switch", "INR VOL" },
2242
2243 { "DAC 2", NULL, "DAC L2" },
2244 { "DAC 2", NULL, "DAC R2" },
2245 { "DAC 1", NULL, "DAC L1" },
2246 { "DAC 1", NULL, "DAC R1" },
2247 { "HPOVOL", NULL, "HPOVOL MIXL" },
2248 { "HPOVOL", NULL, "HPOVOL MIXR" },
2249 { "HPO MIX", "DAC1 Switch", "DAC 1" },
2250 { "HPO MIX", "HPVOL Switch", "HPOVOL" },
2251
2252 { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
2253 { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
2254 { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
2255 { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
2256
2257 { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2258 { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
2259 { "PDM1 L Mux", NULL, "PDM1 Power" },
2260 { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2261 { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
2262 { "PDM1 R Mux", NULL, "PDM1 Power" },
2263
2264 { "HP Amp", NULL, "HPO MIX" },
2265 { "HP Amp", NULL, "Mic Det Power" },
2266 { "HPOL", NULL, "HP Amp" },
2267 { "HPOL", NULL, "HP L Amp" },
2268 { "HPOL", NULL, "Improve HP Amp Drv" },
2269 { "HPOR", NULL, "HP Amp" },
2270 { "HPOR", NULL, "HP R Amp" },
2271 { "HPOR", NULL, "Improve HP Amp Drv" },
2272
2273 { "LOUT Amp", NULL, "LOUT MIX" },
2274 { "LOUT L Playback", "Switch", "LOUT Amp" },
2275 { "LOUT R Playback", "Switch", "LOUT Amp" },
2276 { "LOUTL", NULL, "LOUT L Playback" },
2277 { "LOUTR", NULL, "LOUT R Playback" },
2278 { "LOUTL", NULL, "Improve HP Amp Drv" },
2279 { "LOUTR", NULL, "Improve HP Amp Drv" },
2280 };
2281
2282 static const struct snd_soc_dapm_route rt5670_specific_dapm_routes[] = {
2283 { "PDM2 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2284 { "PDM2 L Mux", "Mono DAC", "Mono DAC MIXL" },
2285 { "PDM2 L Mux", NULL, "PDM2 Power" },
2286 { "PDM2 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2287 { "PDM2 R Mux", "Mono DAC", "Mono DAC MIXR" },
2288 { "PDM2 R Mux", NULL, "PDM2 Power" },
2289 { "PDM1L", NULL, "PDM1 L Mux" },
2290 { "PDM1R", NULL, "PDM1 R Mux" },
2291 { "PDM2L", NULL, "PDM2 L Mux" },
2292 { "PDM2R", NULL, "PDM2 R Mux" },
2293 };
2294
2295 static const struct snd_soc_dapm_route rt5672_specific_dapm_routes[] = {
2296 { "SPO Amp", NULL, "PDM1 L Mux" },
2297 { "SPO Amp", NULL, "PDM1 R Mux" },
2298 { "SPOLP", NULL, "SPO Amp" },
2299 { "SPOLN", NULL, "SPO Amp" },
2300 { "SPORP", NULL, "SPO Amp" },
2301 { "SPORN", NULL, "SPO Amp" },
2302 };
2303
2304 static int rt5670_hw_params(struct snd_pcm_substream *substream,
2305 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2306 {
2307 struct snd_soc_codec *codec = dai->codec;
2308 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2309 unsigned int val_len = 0, val_clk, mask_clk;
2310 int pre_div, bclk_ms, frame_size;
2311
2312 rt5670->lrck[dai->id] = params_rate(params);
2313 pre_div = rl6231_get_clk_info(rt5670->sysclk, rt5670->lrck[dai->id]);
2314 if (pre_div < 0) {
2315 dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n",
2316 rt5670->lrck[dai->id], dai->id);
2317 return -EINVAL;
2318 }
2319 frame_size = snd_soc_params_to_frame_size(params);
2320 if (frame_size < 0) {
2321 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
2322 return -EINVAL;
2323 }
2324 bclk_ms = frame_size > 32;
2325 rt5670->bclk[dai->id] = rt5670->lrck[dai->id] * (32 << bclk_ms);
2326
2327 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2328 rt5670->bclk[dai->id], rt5670->lrck[dai->id]);
2329 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2330 bclk_ms, pre_div, dai->id);
2331
2332 switch (params_width(params)) {
2333 case 16:
2334 break;
2335 case 20:
2336 val_len |= RT5670_I2S_DL_20;
2337 break;
2338 case 24:
2339 val_len |= RT5670_I2S_DL_24;
2340 break;
2341 case 8:
2342 val_len |= RT5670_I2S_DL_8;
2343 break;
2344 default:
2345 return -EINVAL;
2346 }
2347
2348 switch (dai->id) {
2349 case RT5670_AIF1:
2350 mask_clk = RT5670_I2S_BCLK_MS1_MASK | RT5670_I2S_PD1_MASK;
2351 val_clk = bclk_ms << RT5670_I2S_BCLK_MS1_SFT |
2352 pre_div << RT5670_I2S_PD1_SFT;
2353 snd_soc_update_bits(codec, RT5670_I2S1_SDP,
2354 RT5670_I2S_DL_MASK, val_len);
2355 snd_soc_update_bits(codec, RT5670_ADDA_CLK1, mask_clk, val_clk);
2356 break;
2357 case RT5670_AIF2:
2358 mask_clk = RT5670_I2S_BCLK_MS2_MASK | RT5670_I2S_PD2_MASK;
2359 val_clk = bclk_ms << RT5670_I2S_BCLK_MS2_SFT |
2360 pre_div << RT5670_I2S_PD2_SFT;
2361 snd_soc_update_bits(codec, RT5670_I2S2_SDP,
2362 RT5670_I2S_DL_MASK, val_len);
2363 snd_soc_update_bits(codec, RT5670_ADDA_CLK1, mask_clk, val_clk);
2364 break;
2365 default:
2366 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2367 return -EINVAL;
2368 }
2369
2370 return 0;
2371 }
2372
2373 static int rt5670_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2374 {
2375 struct snd_soc_codec *codec = dai->codec;
2376 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2377 unsigned int reg_val = 0;
2378
2379 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2380 case SND_SOC_DAIFMT_CBM_CFM:
2381 rt5670->master[dai->id] = 1;
2382 break;
2383 case SND_SOC_DAIFMT_CBS_CFS:
2384 reg_val |= RT5670_I2S_MS_S;
2385 rt5670->master[dai->id] = 0;
2386 break;
2387 default:
2388 return -EINVAL;
2389 }
2390
2391 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2392 case SND_SOC_DAIFMT_NB_NF:
2393 break;
2394 case SND_SOC_DAIFMT_IB_NF:
2395 reg_val |= RT5670_I2S_BP_INV;
2396 break;
2397 default:
2398 return -EINVAL;
2399 }
2400
2401 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2402 case SND_SOC_DAIFMT_I2S:
2403 break;
2404 case SND_SOC_DAIFMT_LEFT_J:
2405 reg_val |= RT5670_I2S_DF_LEFT;
2406 break;
2407 case SND_SOC_DAIFMT_DSP_A:
2408 reg_val |= RT5670_I2S_DF_PCM_A;
2409 break;
2410 case SND_SOC_DAIFMT_DSP_B:
2411 reg_val |= RT5670_I2S_DF_PCM_B;
2412 break;
2413 default:
2414 return -EINVAL;
2415 }
2416
2417 switch (dai->id) {
2418 case RT5670_AIF1:
2419 snd_soc_update_bits(codec, RT5670_I2S1_SDP,
2420 RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK |
2421 RT5670_I2S_DF_MASK, reg_val);
2422 break;
2423 case RT5670_AIF2:
2424 snd_soc_update_bits(codec, RT5670_I2S2_SDP,
2425 RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK |
2426 RT5670_I2S_DF_MASK, reg_val);
2427 break;
2428 default:
2429 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2430 return -EINVAL;
2431 }
2432 return 0;
2433 }
2434
2435 static int rt5670_set_codec_sysclk(struct snd_soc_codec *codec, int clk_id,
2436 int source, unsigned int freq, int dir)
2437 {
2438 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2439 unsigned int reg_val = 0;
2440
2441 switch (clk_id) {
2442 case RT5670_SCLK_S_MCLK:
2443 reg_val |= RT5670_SCLK_SRC_MCLK;
2444 break;
2445 case RT5670_SCLK_S_PLL1:
2446 reg_val |= RT5670_SCLK_SRC_PLL1;
2447 break;
2448 case RT5670_SCLK_S_RCCLK:
2449 reg_val |= RT5670_SCLK_SRC_RCCLK;
2450 break;
2451 default:
2452 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2453 return -EINVAL;
2454 }
2455 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2456 RT5670_SCLK_SRC_MASK, reg_val);
2457 rt5670->sysclk = freq;
2458 if (clk_id != RT5670_SCLK_S_RCCLK)
2459 rt5670->sysclk_src = clk_id;
2460
2461 dev_dbg(codec->dev, "Sysclk : %dHz clock id : %d\n", freq, clk_id);
2462
2463 return 0;
2464 }
2465
2466 static int rt5670_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2467 unsigned int freq_in, unsigned int freq_out)
2468 {
2469 struct snd_soc_codec *codec = dai->codec;
2470 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2471 struct rl6231_pll_code pll_code;
2472 int ret;
2473
2474 if (source == rt5670->pll_src && freq_in == rt5670->pll_in &&
2475 freq_out == rt5670->pll_out)
2476 return 0;
2477
2478 if (!freq_in || !freq_out) {
2479 dev_dbg(codec->dev, "PLL disabled\n");
2480
2481 rt5670->pll_in = 0;
2482 rt5670->pll_out = 0;
2483 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2484 RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_MCLK);
2485 return 0;
2486 }
2487
2488 switch (source) {
2489 case RT5670_PLL1_S_MCLK:
2490 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2491 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_MCLK);
2492 break;
2493 case RT5670_PLL1_S_BCLK1:
2494 case RT5670_PLL1_S_BCLK2:
2495 case RT5670_PLL1_S_BCLK3:
2496 case RT5670_PLL1_S_BCLK4:
2497 switch (dai->id) {
2498 case RT5670_AIF1:
2499 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2500 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK1);
2501 break;
2502 case RT5670_AIF2:
2503 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2504 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK2);
2505 break;
2506 default:
2507 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2508 return -EINVAL;
2509 }
2510 break;
2511 default:
2512 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2513 return -EINVAL;
2514 }
2515
2516 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2517 if (ret < 0) {
2518 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2519 return ret;
2520 }
2521
2522 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
2523 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2524 pll_code.n_code, pll_code.k_code);
2525
2526 snd_soc_write(codec, RT5670_PLL_CTRL1,
2527 pll_code.n_code << RT5670_PLL_N_SFT | pll_code.k_code);
2528 snd_soc_write(codec, RT5670_PLL_CTRL2,
2529 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5670_PLL_M_SFT |
2530 pll_code.m_bp << RT5670_PLL_M_BP_SFT);
2531
2532 rt5670->pll_in = freq_in;
2533 rt5670->pll_out = freq_out;
2534 rt5670->pll_src = source;
2535
2536 return 0;
2537 }
2538
2539 static int rt5670_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2540 unsigned int rx_mask, int slots, int slot_width)
2541 {
2542 struct snd_soc_codec *codec = dai->codec;
2543 unsigned int val = 0;
2544
2545 if (rx_mask || tx_mask)
2546 val |= (1 << 14);
2547
2548 switch (slots) {
2549 case 4:
2550 val |= (1 << 12);
2551 break;
2552 case 6:
2553 val |= (2 << 12);
2554 break;
2555 case 8:
2556 val |= (3 << 12);
2557 break;
2558 case 2:
2559 break;
2560 default:
2561 return -EINVAL;
2562 }
2563
2564 switch (slot_width) {
2565 case 20:
2566 val |= (1 << 10);
2567 break;
2568 case 24:
2569 val |= (2 << 10);
2570 break;
2571 case 32:
2572 val |= (3 << 10);
2573 break;
2574 case 16:
2575 break;
2576 default:
2577 return -EINVAL;
2578 }
2579
2580 snd_soc_update_bits(codec, RT5670_TDM_CTRL_1, 0x7c00, val);
2581
2582 return 0;
2583 }
2584
2585 static int rt5670_set_bias_level(struct snd_soc_codec *codec,
2586 enum snd_soc_bias_level level)
2587 {
2588 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2589
2590 switch (level) {
2591 case SND_SOC_BIAS_PREPARE:
2592 if (SND_SOC_BIAS_STANDBY == snd_soc_codec_get_bias_level(codec)) {
2593 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2594 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2595 RT5670_PWR_BG | RT5670_PWR_VREF2,
2596 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2597 RT5670_PWR_BG | RT5670_PWR_VREF2);
2598 mdelay(10);
2599 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2600 RT5670_PWR_FV1 | RT5670_PWR_FV2,
2601 RT5670_PWR_FV1 | RT5670_PWR_FV2);
2602 snd_soc_update_bits(codec, RT5670_CHARGE_PUMP,
2603 RT5670_OSW_L_MASK | RT5670_OSW_R_MASK,
2604 RT5670_OSW_L_DIS | RT5670_OSW_R_DIS);
2605 snd_soc_update_bits(codec, RT5670_DIG_MISC, 0x1, 0x1);
2606 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2607 RT5670_LDO_SEL_MASK, 0x5);
2608 }
2609 break;
2610 case SND_SOC_BIAS_STANDBY:
2611 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2612 RT5670_PWR_VREF1 | RT5670_PWR_VREF2 |
2613 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0);
2614 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2615 RT5670_LDO_SEL_MASK, 0x3);
2616 break;
2617 case SND_SOC_BIAS_OFF:
2618 if (rt5670->pdata.jd_mode)
2619 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2620 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2621 RT5670_PWR_BG | RT5670_PWR_VREF2 |
2622 RT5670_PWR_FV1 | RT5670_PWR_FV2,
2623 RT5670_PWR_MB | RT5670_PWR_BG);
2624 else
2625 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2626 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2627 RT5670_PWR_BG | RT5670_PWR_VREF2 |
2628 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0);
2629
2630 snd_soc_update_bits(codec, RT5670_DIG_MISC, 0x1, 0x0);
2631 break;
2632
2633 default:
2634 break;
2635 }
2636
2637 return 0;
2638 }
2639
2640 static int rt5670_probe(struct snd_soc_codec *codec)
2641 {
2642 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
2643 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2644
2645 switch (snd_soc_read(codec, RT5670_RESET) & RT5670_ID_MASK) {
2646 case RT5670_ID_5670:
2647 case RT5670_ID_5671:
2648 snd_soc_dapm_new_controls(dapm,
2649 rt5670_specific_dapm_widgets,
2650 ARRAY_SIZE(rt5670_specific_dapm_widgets));
2651 snd_soc_dapm_add_routes(dapm,
2652 rt5670_specific_dapm_routes,
2653 ARRAY_SIZE(rt5670_specific_dapm_routes));
2654 break;
2655 case RT5670_ID_5672:
2656 snd_soc_dapm_new_controls(dapm,
2657 rt5672_specific_dapm_widgets,
2658 ARRAY_SIZE(rt5672_specific_dapm_widgets));
2659 snd_soc_dapm_add_routes(dapm,
2660 rt5672_specific_dapm_routes,
2661 ARRAY_SIZE(rt5672_specific_dapm_routes));
2662 break;
2663 default:
2664 dev_err(codec->dev,
2665 "The driver is for RT5670 RT5671 or RT5672 only\n");
2666 return -ENODEV;
2667 }
2668 rt5670->codec = codec;
2669
2670 return 0;
2671 }
2672
2673 static int rt5670_remove(struct snd_soc_codec *codec)
2674 {
2675 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2676
2677 regmap_write(rt5670->regmap, RT5670_RESET, 0);
2678 snd_soc_jack_free_gpios(rt5670->jack, 1, &rt5670->hp_gpio);
2679 return 0;
2680 }
2681
2682 #ifdef CONFIG_PM
2683 static int rt5670_suspend(struct snd_soc_codec *codec)
2684 {
2685 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2686
2687 regcache_cache_only(rt5670->regmap, true);
2688 regcache_mark_dirty(rt5670->regmap);
2689 return 0;
2690 }
2691
2692 static int rt5670_resume(struct snd_soc_codec *codec)
2693 {
2694 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2695
2696 regcache_cache_only(rt5670->regmap, false);
2697 regcache_sync(rt5670->regmap);
2698
2699 return 0;
2700 }
2701 #else
2702 #define rt5670_suspend NULL
2703 #define rt5670_resume NULL
2704 #endif
2705
2706 #define RT5670_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2707 #define RT5670_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2708 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2709
2710 static const struct snd_soc_dai_ops rt5670_aif_dai_ops = {
2711 .hw_params = rt5670_hw_params,
2712 .set_fmt = rt5670_set_dai_fmt,
2713 .set_tdm_slot = rt5670_set_tdm_slot,
2714 .set_pll = rt5670_set_dai_pll,
2715 };
2716
2717 static struct snd_soc_dai_driver rt5670_dai[] = {
2718 {
2719 .name = "rt5670-aif1",
2720 .id = RT5670_AIF1,
2721 .playback = {
2722 .stream_name = "AIF1 Playback",
2723 .channels_min = 1,
2724 .channels_max = 2,
2725 .rates = RT5670_STEREO_RATES,
2726 .formats = RT5670_FORMATS,
2727 },
2728 .capture = {
2729 .stream_name = "AIF1 Capture",
2730 .channels_min = 1,
2731 .channels_max = 2,
2732 .rates = RT5670_STEREO_RATES,
2733 .formats = RT5670_FORMATS,
2734 },
2735 .ops = &rt5670_aif_dai_ops,
2736 .symmetric_rates = 1,
2737 },
2738 {
2739 .name = "rt5670-aif2",
2740 .id = RT5670_AIF2,
2741 .playback = {
2742 .stream_name = "AIF2 Playback",
2743 .channels_min = 1,
2744 .channels_max = 2,
2745 .rates = RT5670_STEREO_RATES,
2746 .formats = RT5670_FORMATS,
2747 },
2748 .capture = {
2749 .stream_name = "AIF2 Capture",
2750 .channels_min = 1,
2751 .channels_max = 2,
2752 .rates = RT5670_STEREO_RATES,
2753 .formats = RT5670_FORMATS,
2754 },
2755 .ops = &rt5670_aif_dai_ops,
2756 .symmetric_rates = 1,
2757 },
2758 };
2759
2760 static const struct snd_soc_codec_driver soc_codec_dev_rt5670 = {
2761 .probe = rt5670_probe,
2762 .remove = rt5670_remove,
2763 .suspend = rt5670_suspend,
2764 .resume = rt5670_resume,
2765 .set_bias_level = rt5670_set_bias_level,
2766 .idle_bias_off = true,
2767 .set_sysclk = rt5670_set_codec_sysclk,
2768 .component_driver = {
2769 .controls = rt5670_snd_controls,
2770 .num_controls = ARRAY_SIZE(rt5670_snd_controls),
2771 .dapm_widgets = rt5670_dapm_widgets,
2772 .num_dapm_widgets = ARRAY_SIZE(rt5670_dapm_widgets),
2773 .dapm_routes = rt5670_dapm_routes,
2774 .num_dapm_routes = ARRAY_SIZE(rt5670_dapm_routes),
2775 },
2776 };
2777
2778 static const struct regmap_config rt5670_regmap = {
2779 .reg_bits = 8,
2780 .val_bits = 16,
2781 .use_single_rw = true,
2782 .max_register = RT5670_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5670_ranges) *
2783 RT5670_PR_SPACING),
2784 .volatile_reg = rt5670_volatile_register,
2785 .readable_reg = rt5670_readable_register,
2786 .cache_type = REGCACHE_RBTREE,
2787 .reg_defaults = rt5670_reg,
2788 .num_reg_defaults = ARRAY_SIZE(rt5670_reg),
2789 .ranges = rt5670_ranges,
2790 .num_ranges = ARRAY_SIZE(rt5670_ranges),
2791 };
2792
2793 static const struct i2c_device_id rt5670_i2c_id[] = {
2794 { "rt5670", 0 },
2795 { "rt5671", 0 },
2796 { "rt5672", 0 },
2797 { }
2798 };
2799 MODULE_DEVICE_TABLE(i2c, rt5670_i2c_id);
2800
2801 #ifdef CONFIG_ACPI
2802 static const struct acpi_device_id rt5670_acpi_match[] = {
2803 { "10EC5670", 0},
2804 { "10EC5672", 0},
2805 { "10EC5640", 0}, /* quirk */
2806 { },
2807 };
2808 MODULE_DEVICE_TABLE(acpi, rt5670_acpi_match);
2809 #endif
2810
2811 static const struct dmi_system_id dmi_platform_intel_braswell[] = {
2812 {
2813 .ident = "Intel Braswell",
2814 .matches = {
2815 DMI_MATCH(DMI_SYS_VENDOR, "Intel Corporation"),
2816 DMI_MATCH(DMI_BOARD_NAME, "Braswell CRB"),
2817 },
2818 },
2819 {
2820 .ident = "Dell Wyse 3040",
2821 .matches = {
2822 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
2823 DMI_MATCH(DMI_PRODUCT_NAME, "Wyse 3040"),
2824 },
2825 },
2826 {
2827 .ident = "Lenovo Thinkpad Tablet 10",
2828 .matches = {
2829 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
2830 DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad 10"),
2831 },
2832 },
2833 {
2834 .ident = "Lenovo Thinkpad Tablet 10",
2835 .matches = {
2836 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
2837 DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad Tablet B"),
2838 },
2839 },
2840 {}
2841 };
2842
2843 static const struct dmi_system_id dmi_platform_intel_bytcht_jdmode2[] = {
2844 {
2845 .ident = "Lenovo Thinkpad Tablet 10",
2846 .matches = {
2847 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
2848 DMI_MATCH(DMI_PRODUCT_VERSION, "Lenovo Miix 2 10"),
2849 },
2850 },
2851 {}
2852 };
2853
2854 static const struct dmi_system_id dmi_platform_intel_bytcht_jdmode3[] = {
2855 {
2856 .ident = "Dell Venue 8 Pro 5855",
2857 .matches = {
2858 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
2859 DMI_MATCH(DMI_PRODUCT_NAME, "Venue 8 Pro 5855"),
2860 },
2861 },
2862 {}
2863 };
2864
2865 static int rt5670_i2c_probe(struct i2c_client *i2c,
2866 const struct i2c_device_id *id)
2867 {
2868 struct rt5670_platform_data *pdata = dev_get_platdata(&i2c->dev);
2869 struct rt5670_priv *rt5670;
2870 int ret;
2871 unsigned int val;
2872
2873 rt5670 = devm_kzalloc(&i2c->dev,
2874 sizeof(struct rt5670_priv),
2875 GFP_KERNEL);
2876 if (NULL == rt5670)
2877 return -ENOMEM;
2878
2879 i2c_set_clientdata(i2c, rt5670);
2880
2881 if (pdata)
2882 rt5670->pdata = *pdata;
2883
2884 if (dmi_check_system(dmi_platform_intel_braswell)) {
2885 rt5670->pdata.dmic_en = true;
2886 rt5670->pdata.dmic1_data_pin = RT5670_DMIC_DATA_IN2P;
2887 rt5670->pdata.dev_gpio = true;
2888 rt5670->pdata.jd_mode = 1;
2889 } else if (dmi_check_system(dmi_platform_intel_bytcht_jdmode2)) {
2890 rt5670->pdata.dmic_en = true;
2891 rt5670->pdata.dmic1_data_pin = RT5670_DMIC_DATA_IN2P;
2892 rt5670->pdata.dev_gpio = true;
2893 rt5670->pdata.jd_mode = 2;
2894 } else if (dmi_check_system(dmi_platform_intel_bytcht_jdmode3)) {
2895 rt5670->pdata.dmic_en = true;
2896 rt5670->pdata.dmic1_data_pin = RT5670_DMIC_DATA_IN2P;
2897 rt5670->pdata.dev_gpio = true;
2898 rt5670->pdata.jd_mode = 3;
2899 }
2900
2901 rt5670->regmap = devm_regmap_init_i2c(i2c, &rt5670_regmap);
2902 if (IS_ERR(rt5670->regmap)) {
2903 ret = PTR_ERR(rt5670->regmap);
2904 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2905 ret);
2906 return ret;
2907 }
2908
2909 regmap_read(rt5670->regmap, RT5670_VENDOR_ID2, &val);
2910 if (val != RT5670_DEVICE_ID) {
2911 dev_err(&i2c->dev,
2912 "Device with ID register %#x is not rt5670/72\n", val);
2913 return -ENODEV;
2914 }
2915
2916 regmap_write(rt5670->regmap, RT5670_RESET, 0);
2917 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
2918 RT5670_PWR_HP_L | RT5670_PWR_HP_R |
2919 RT5670_PWR_VREF2, RT5670_PWR_VREF2);
2920 msleep(100);
2921
2922 regmap_write(rt5670->regmap, RT5670_RESET, 0);
2923
2924 regmap_read(rt5670->regmap, RT5670_VENDOR_ID, &val);
2925 if (val >= 4)
2926 regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0980);
2927 else
2928 regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0d00);
2929
2930 ret = regmap_register_patch(rt5670->regmap, init_list,
2931 ARRAY_SIZE(init_list));
2932 if (ret != 0)
2933 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2934
2935 regmap_update_bits(rt5670->regmap, RT5670_DIG_MISC,
2936 RT5670_MCLK_DET, RT5670_MCLK_DET);
2937
2938 if (rt5670->pdata.in2_diff)
2939 regmap_update_bits(rt5670->regmap, RT5670_IN2,
2940 RT5670_IN_DF2, RT5670_IN_DF2);
2941
2942 if (rt5670->pdata.dev_gpio) {
2943 /* for push button */
2944 regmap_write(rt5670->regmap, RT5670_IL_CMD, 0x0000);
2945 regmap_write(rt5670->regmap, RT5670_IL_CMD2, 0x0010);
2946 regmap_write(rt5670->regmap, RT5670_IL_CMD3, 0x0014);
2947 /* for irq */
2948 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2949 RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ);
2950 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
2951 RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT);
2952 }
2953
2954 if (rt5670->pdata.jd_mode) {
2955 regmap_update_bits(rt5670->regmap, RT5670_GLB_CLK,
2956 RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_RCCLK);
2957 rt5670->sysclk = 0;
2958 rt5670->sysclk_src = RT5670_SCLK_S_RCCLK;
2959 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
2960 RT5670_PWR_MB, RT5670_PWR_MB);
2961 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG2,
2962 RT5670_PWR_JD1, RT5670_PWR_JD1);
2963 regmap_update_bits(rt5670->regmap, RT5670_IRQ_CTRL1,
2964 RT5670_JD1_1_EN_MASK, RT5670_JD1_1_EN);
2965 regmap_update_bits(rt5670->regmap, RT5670_JD_CTRL3,
2966 RT5670_JD_TRI_CBJ_SEL_MASK |
2967 RT5670_JD_TRI_HPO_SEL_MASK,
2968 RT5670_JD_CBJ_JD1_1 | RT5670_JD_HPO_JD1_1);
2969 switch (rt5670->pdata.jd_mode) {
2970 case 1:
2971 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
2972 RT5670_JD1_MODE_MASK,
2973 RT5670_JD1_MODE_0);
2974 break;
2975 case 2:
2976 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
2977 RT5670_JD1_MODE_MASK,
2978 RT5670_JD1_MODE_1);
2979 break;
2980 case 3:
2981 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
2982 RT5670_JD1_MODE_MASK,
2983 RT5670_JD1_MODE_2);
2984 break;
2985 default:
2986 break;
2987 }
2988 }
2989
2990 if (rt5670->pdata.dmic_en) {
2991 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2992 RT5670_GP2_PIN_MASK,
2993 RT5670_GP2_PIN_DMIC1_SCL);
2994
2995 switch (rt5670->pdata.dmic1_data_pin) {
2996 case RT5670_DMIC_DATA_IN2P:
2997 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2998 RT5670_DMIC_1_DP_MASK,
2999 RT5670_DMIC_1_DP_IN2P);
3000 break;
3001
3002 case RT5670_DMIC_DATA_GPIO6:
3003 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
3004 RT5670_DMIC_1_DP_MASK,
3005 RT5670_DMIC_1_DP_GPIO6);
3006 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3007 RT5670_GP6_PIN_MASK,
3008 RT5670_GP6_PIN_DMIC1_SDA);
3009 break;
3010
3011 case RT5670_DMIC_DATA_GPIO7:
3012 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
3013 RT5670_DMIC_1_DP_MASK,
3014 RT5670_DMIC_1_DP_GPIO7);
3015 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3016 RT5670_GP7_PIN_MASK,
3017 RT5670_GP7_PIN_DMIC1_SDA);
3018 break;
3019
3020 default:
3021 break;
3022 }
3023
3024 switch (rt5670->pdata.dmic2_data_pin) {
3025 case RT5670_DMIC_DATA_IN3N:
3026 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
3027 RT5670_DMIC_2_DP_MASK,
3028 RT5670_DMIC_2_DP_IN3N);
3029 break;
3030
3031 case RT5670_DMIC_DATA_GPIO8:
3032 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
3033 RT5670_DMIC_2_DP_MASK,
3034 RT5670_DMIC_2_DP_GPIO8);
3035 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3036 RT5670_GP8_PIN_MASK,
3037 RT5670_GP8_PIN_DMIC2_SDA);
3038 break;
3039
3040 default:
3041 break;
3042 }
3043
3044 switch (rt5670->pdata.dmic3_data_pin) {
3045 case RT5670_DMIC_DATA_GPIO5:
3046 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL2,
3047 RT5670_DMIC_3_DP_MASK,
3048 RT5670_DMIC_3_DP_GPIO5);
3049 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3050 RT5670_GP5_PIN_MASK,
3051 RT5670_GP5_PIN_DMIC3_SDA);
3052 break;
3053
3054 case RT5670_DMIC_DATA_GPIO9:
3055 case RT5670_DMIC_DATA_GPIO10:
3056 dev_err(&i2c->dev,
3057 "Always use GPIO5 as DMIC3 data pin\n");
3058 break;
3059
3060 default:
3061 break;
3062 }
3063
3064 }
3065
3066 pm_runtime_enable(&i2c->dev);
3067 pm_request_idle(&i2c->dev);
3068
3069 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5670,
3070 rt5670_dai, ARRAY_SIZE(rt5670_dai));
3071 if (ret < 0)
3072 goto err;
3073
3074 pm_runtime_put(&i2c->dev);
3075
3076 return 0;
3077 err:
3078 pm_runtime_disable(&i2c->dev);
3079
3080 return ret;
3081 }
3082
3083 static int rt5670_i2c_remove(struct i2c_client *i2c)
3084 {
3085 pm_runtime_disable(&i2c->dev);
3086 snd_soc_unregister_codec(&i2c->dev);
3087
3088 return 0;
3089 }
3090
3091 static struct i2c_driver rt5670_i2c_driver = {
3092 .driver = {
3093 .name = "rt5670",
3094 .acpi_match_table = ACPI_PTR(rt5670_acpi_match),
3095 },
3096 .probe = rt5670_i2c_probe,
3097 .remove = rt5670_i2c_remove,
3098 .id_table = rt5670_i2c_id,
3099 };
3100
3101 module_i2c_driver(rt5670_i2c_driver);
3102
3103 MODULE_DESCRIPTION("ASoC RT5670 driver");
3104 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
3105 MODULE_LICENSE("GPL v2");
Linux with added FPC-III support