2 * ALSA SoC TLV320AIC31XX codec driver
4 * Copyright (C) 2014 Texas Instruments, Inc.
6 * Author: Jyri Sarha <jsarha@ti.com>
8 * Based on ground work by: Ajit Kulkarni <x0175765@ti.com>
10 * This package is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * THIS PACKAGE IS PROVIDED AS IS AND WITHOUT ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
16 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
18 * The TLV320AIC31xx series of audio codec is a low-power, highly integrated
19 * high performance codec which provides a stereo DAC, a mono ADC,
20 * and mono/stereo Class-D speaker driver.
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
28 #include <linux/i2c.h>
29 #include <linux/gpio.h>
30 #include <linux/regulator/consumer.h>
31 #include <linux/acpi.h>
33 #include <linux/of_gpio.h>
34 #include <linux/slab.h>
35 #include <sound/core.h>
36 #include <sound/pcm.h>
37 #include <sound/pcm_params.h>
38 #include <sound/soc.h>
39 #include <sound/initval.h>
40 #include <sound/tlv.h>
41 #include <dt-bindings/sound/tlv320aic31xx-micbias.h>
43 #include "tlv320aic31xx.h"
45 static const struct reg_default aic31xx_reg_defaults
[] = {
46 { AIC31XX_CLKMUX
, 0x00 },
47 { AIC31XX_PLLPR
, 0x11 },
48 { AIC31XX_PLLJ
, 0x04 },
49 { AIC31XX_PLLDMSB
, 0x00 },
50 { AIC31XX_PLLDLSB
, 0x00 },
51 { AIC31XX_NDAC
, 0x01 },
52 { AIC31XX_MDAC
, 0x01 },
53 { AIC31XX_DOSRMSB
, 0x00 },
54 { AIC31XX_DOSRLSB
, 0x80 },
55 { AIC31XX_NADC
, 0x01 },
56 { AIC31XX_MADC
, 0x01 },
57 { AIC31XX_AOSR
, 0x80 },
58 { AIC31XX_IFACE1
, 0x00 },
59 { AIC31XX_DATA_OFFSET
, 0x00 },
60 { AIC31XX_IFACE2
, 0x00 },
61 { AIC31XX_BCLKN
, 0x01 },
62 { AIC31XX_DACSETUP
, 0x14 },
63 { AIC31XX_DACMUTE
, 0x0c },
64 { AIC31XX_LDACVOL
, 0x00 },
65 { AIC31XX_RDACVOL
, 0x00 },
66 { AIC31XX_ADCSETUP
, 0x00 },
67 { AIC31XX_ADCFGA
, 0x80 },
68 { AIC31XX_ADCVOL
, 0x00 },
69 { AIC31XX_HPDRIVER
, 0x04 },
70 { AIC31XX_SPKAMP
, 0x06 },
71 { AIC31XX_DACMIXERROUTE
, 0x00 },
72 { AIC31XX_LANALOGHPL
, 0x7f },
73 { AIC31XX_RANALOGHPR
, 0x7f },
74 { AIC31XX_LANALOGSPL
, 0x7f },
75 { AIC31XX_RANALOGSPR
, 0x7f },
76 { AIC31XX_HPLGAIN
, 0x02 },
77 { AIC31XX_HPRGAIN
, 0x02 },
78 { AIC31XX_SPLGAIN
, 0x00 },
79 { AIC31XX_SPRGAIN
, 0x00 },
80 { AIC31XX_MICBIAS
, 0x00 },
81 { AIC31XX_MICPGA
, 0x80 },
82 { AIC31XX_MICPGAPI
, 0x00 },
83 { AIC31XX_MICPGAMI
, 0x00 },
86 static bool aic31xx_volatile(struct device
*dev
, unsigned int reg
)
89 case AIC31XX_PAGECTL
: /* regmap implementation requires this */
90 case AIC31XX_RESET
: /* always clears after write */
93 case AIC31XX_DACFLAG1
:
94 case AIC31XX_DACFLAG2
:
95 case AIC31XX_OFFLAG
: /* Sticky interrupt flags */
96 case AIC31XX_INTRDACFLAG
: /* Sticky interrupt flags */
97 case AIC31XX_INTRADCFLAG
: /* Sticky interrupt flags */
98 case AIC31XX_INTRDACFLAG2
:
99 case AIC31XX_INTRADCFLAG2
:
105 static bool aic31xx_writeable(struct device
*dev
, unsigned int reg
)
108 case AIC31XX_OT_FLAG
:
109 case AIC31XX_ADCFLAG
:
110 case AIC31XX_DACFLAG1
:
111 case AIC31XX_DACFLAG2
:
112 case AIC31XX_OFFLAG
: /* Sticky interrupt flags */
113 case AIC31XX_INTRDACFLAG
: /* Sticky interrupt flags */
114 case AIC31XX_INTRADCFLAG
: /* Sticky interrupt flags */
115 case AIC31XX_INTRDACFLAG2
:
116 case AIC31XX_INTRADCFLAG2
:
122 static const struct regmap_range_cfg aic31xx_ranges
[] = {
125 .range_max
= 12 * 128,
126 .selector_reg
= AIC31XX_PAGECTL
,
127 .selector_mask
= 0xff,
134 static const struct regmap_config aic31xx_i2c_regmap
= {
137 .writeable_reg
= aic31xx_writeable
,
138 .volatile_reg
= aic31xx_volatile
,
139 .reg_defaults
= aic31xx_reg_defaults
,
140 .num_reg_defaults
= ARRAY_SIZE(aic31xx_reg_defaults
),
141 .cache_type
= REGCACHE_RBTREE
,
142 .ranges
= aic31xx_ranges
,
143 .num_ranges
= ARRAY_SIZE(aic31xx_ranges
),
144 .max_register
= 12 * 128,
147 #define AIC31XX_NUM_SUPPLIES 6
148 static const char * const aic31xx_supply_names
[AIC31XX_NUM_SUPPLIES
] = {
157 struct aic31xx_disable_nb
{
158 struct notifier_block nb
;
159 struct aic31xx_priv
*aic31xx
;
162 struct aic31xx_priv
{
163 struct snd_soc_codec
*codec
;
166 struct regmap
*regmap
;
167 struct aic31xx_pdata pdata
;
168 struct regulator_bulk_data supplies
[AIC31XX_NUM_SUPPLIES
];
169 struct aic31xx_disable_nb disable_nb
[AIC31XX_NUM_SUPPLIES
];
175 struct aic31xx_rate_divs
{
188 /* ADC dividers can be disabled by cofiguring them to 0 */
189 static const struct aic31xx_rate_divs aic31xx_divs
[] = {
190 /* mclk/p rate pll: j d dosr ndac mdac aors nadc madc */
192 {12000000, 8000, 8, 1920, 128, 48, 2, 128, 48, 2},
193 {12000000, 8000, 8, 1920, 128, 32, 3, 128, 32, 3},
194 {12500000, 8000, 7, 8643, 128, 48, 2, 128, 48, 2},
196 {12000000, 11025, 7, 5264, 128, 32, 2, 128, 32, 2},
197 {12000000, 11025, 8, 4672, 128, 24, 3, 128, 24, 3},
198 {12500000, 11025, 7, 2253, 128, 32, 2, 128, 32, 2},
200 {12000000, 16000, 8, 1920, 128, 24, 2, 128, 24, 2},
201 {12000000, 16000, 8, 1920, 128, 16, 3, 128, 16, 3},
202 {12500000, 16000, 7, 8643, 128, 24, 2, 128, 24, 2},
204 {12000000, 22050, 7, 5264, 128, 16, 2, 128, 16, 2},
205 {12000000, 22050, 8, 4672, 128, 12, 3, 128, 12, 3},
206 {12500000, 22050, 7, 2253, 128, 16, 2, 128, 16, 2},
208 {12000000, 32000, 8, 1920, 128, 12, 2, 128, 12, 2},
209 {12000000, 32000, 8, 1920, 128, 8, 3, 128, 8, 3},
210 {12500000, 32000, 7, 8643, 128, 12, 2, 128, 12, 2},
212 {12000000, 44100, 7, 5264, 128, 8, 2, 128, 8, 2},
213 {12000000, 44100, 8, 4672, 128, 6, 3, 128, 6, 3},
214 {12500000, 44100, 7, 2253, 128, 8, 2, 128, 8, 2},
216 {12000000, 48000, 8, 1920, 128, 8, 2, 128, 8, 2},
217 {12000000, 48000, 7, 6800, 96, 5, 4, 96, 5, 4},
218 {12500000, 48000, 7, 8643, 128, 8, 2, 128, 8, 2},
220 {12000000, 88200, 7, 5264, 64, 8, 2, 64, 8, 2},
221 {12000000, 88200, 8, 4672, 64, 6, 3, 64, 6, 3},
222 {12500000, 88200, 7, 2253, 64, 8, 2, 64, 8, 2},
224 {12000000, 96000, 8, 1920, 64, 8, 2, 64, 8, 2},
225 {12000000, 96000, 7, 6800, 48, 5, 4, 48, 5, 4},
226 {12500000, 96000, 7, 8643, 64, 8, 2, 64, 8, 2},
228 {12000000, 176400, 7, 5264, 32, 8, 2, 32, 8, 2},
229 {12000000, 176400, 8, 4672, 32, 6, 3, 32, 6, 3},
230 {12500000, 176400, 7, 2253, 32, 8, 2, 32, 8, 2},
232 {12000000, 192000, 8, 1920, 32, 8, 2, 32, 8, 2},
233 {12000000, 192000, 7, 6800, 24, 5, 4, 24, 5, 4},
234 {12500000, 192000, 7, 8643, 32, 8, 2, 32, 8, 2},
237 static const char * const ldac_in_text
[] = {
238 "Off", "Left Data", "Right Data", "Mono"
241 static const char * const rdac_in_text
[] = {
242 "Off", "Right Data", "Left Data", "Mono"
245 static SOC_ENUM_SINGLE_DECL(ldac_in_enum
, AIC31XX_DACSETUP
, 4, ldac_in_text
);
247 static SOC_ENUM_SINGLE_DECL(rdac_in_enum
, AIC31XX_DACSETUP
, 2, rdac_in_text
);
249 static const char * const mic_select_text
[] = {
250 "Off", "FFR 10 Ohm", "FFR 20 Ohm", "FFR 40 Ohm"
253 static SOC_ENUM_SINGLE_DECL(mic1lp_p_enum
, AIC31XX_MICPGAPI
, 6,
255 static SOC_ENUM_SINGLE_DECL(mic1rp_p_enum
, AIC31XX_MICPGAPI
, 4,
257 static SOC_ENUM_SINGLE_DECL(mic1lm_p_enum
, AIC31XX_MICPGAPI
, 2,
260 static SOC_ENUM_SINGLE_DECL(cm_m_enum
, AIC31XX_MICPGAMI
, 6, mic_select_text
);
261 static SOC_ENUM_SINGLE_DECL(mic1lm_m_enum
, AIC31XX_MICPGAMI
, 4,
264 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv
, -6350, 50, 0);
265 static const DECLARE_TLV_DB_SCALE(adc_fgain_tlv
, 0, 10, 0);
266 static const DECLARE_TLV_DB_SCALE(adc_cgain_tlv
, -2000, 50, 0);
267 static const DECLARE_TLV_DB_SCALE(mic_pga_tlv
, 0, 50, 0);
268 static const DECLARE_TLV_DB_SCALE(hp_drv_tlv
, 0, 100, 0);
269 static const DECLARE_TLV_DB_SCALE(class_D_drv_tlv
, 600, 600, 0);
270 static const DECLARE_TLV_DB_SCALE(hp_vol_tlv
, -6350, 50, 0);
271 static const DECLARE_TLV_DB_SCALE(sp_vol_tlv
, -6350, 50, 0);
274 * controls to be exported to the user space
276 static const struct snd_kcontrol_new common31xx_snd_controls
[] = {
277 SOC_DOUBLE_R_S_TLV("DAC Playback Volume", AIC31XX_LDACVOL
,
278 AIC31XX_RDACVOL
, 0, -127, 48, 7, 0, dac_vol_tlv
),
280 SOC_DOUBLE_R("HP Driver Playback Switch", AIC31XX_HPLGAIN
,
281 AIC31XX_HPRGAIN
, 2, 1, 0),
282 SOC_DOUBLE_R_TLV("HP Driver Playback Volume", AIC31XX_HPLGAIN
,
283 AIC31XX_HPRGAIN
, 3, 0x09, 0, hp_drv_tlv
),
285 SOC_DOUBLE_R_TLV("HP Analog Playback Volume", AIC31XX_LANALOGHPL
,
286 AIC31XX_RANALOGHPR
, 0, 0x7F, 1, hp_vol_tlv
),
289 static const struct snd_kcontrol_new aic31xx_snd_controls
[] = {
290 SOC_SINGLE_TLV("ADC Fine Capture Volume", AIC31XX_ADCFGA
, 4, 4, 1,
293 SOC_SINGLE("ADC Capture Switch", AIC31XX_ADCFGA
, 7, 1, 1),
294 SOC_DOUBLE_R_S_TLV("ADC Capture Volume", AIC31XX_ADCVOL
, AIC31XX_ADCVOL
,
295 0, -24, 40, 6, 0, adc_cgain_tlv
),
297 SOC_SINGLE_TLV("Mic PGA Capture Volume", AIC31XX_MICPGA
, 0,
298 119, 0, mic_pga_tlv
),
301 static const struct snd_kcontrol_new aic311x_snd_controls
[] = {
302 SOC_DOUBLE_R("Speaker Driver Playback Switch", AIC31XX_SPLGAIN
,
303 AIC31XX_SPRGAIN
, 2, 1, 0),
304 SOC_DOUBLE_R_TLV("Speaker Driver Playback Volume", AIC31XX_SPLGAIN
,
305 AIC31XX_SPRGAIN
, 3, 3, 0, class_D_drv_tlv
),
307 SOC_DOUBLE_R_TLV("Speaker Analog Playback Volume", AIC31XX_LANALOGSPL
,
308 AIC31XX_RANALOGSPR
, 0, 0x7F, 1, sp_vol_tlv
),
311 static const struct snd_kcontrol_new aic310x_snd_controls
[] = {
312 SOC_SINGLE("Speaker Driver Playback Switch", AIC31XX_SPLGAIN
,
314 SOC_SINGLE_TLV("Speaker Driver Playback Volume", AIC31XX_SPLGAIN
,
315 3, 3, 0, class_D_drv_tlv
),
317 SOC_SINGLE_TLV("Speaker Analog Playback Volume", AIC31XX_LANALOGSPL
,
318 0, 0x7F, 1, sp_vol_tlv
),
321 static const struct snd_kcontrol_new ldac_in_control
=
322 SOC_DAPM_ENUM("DAC Left Input", ldac_in_enum
);
324 static const struct snd_kcontrol_new rdac_in_control
=
325 SOC_DAPM_ENUM("DAC Right Input", rdac_in_enum
);
327 static int aic31xx_wait_bits(struct aic31xx_priv
*aic31xx
, unsigned int reg
,
328 unsigned int mask
, unsigned int wbits
, int sleep
,
333 int ret
= regmap_read(aic31xx
->regmap
, reg
, &bits
);
335 while ((bits
& mask
) != wbits
&& counter
&& !ret
) {
336 usleep_range(sleep
, sleep
* 2);
337 ret
= regmap_read(aic31xx
->regmap
, reg
, &bits
);
340 if ((bits
& mask
) != wbits
) {
341 dev_err(aic31xx
->dev
,
342 "%s: Failed! 0x%x was 0x%x expected 0x%x (%d, 0x%x, %d us)\n",
343 __func__
, reg
, bits
, wbits
, ret
, mask
,
344 (count
- counter
) * sleep
);
350 #define WIDGET_BIT(reg, shift) (((shift) << 8) | (reg))
352 static int aic31xx_dapm_power_event(struct snd_soc_dapm_widget
*w
,
353 struct snd_kcontrol
*kcontrol
, int event
)
355 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
356 struct aic31xx_priv
*aic31xx
= snd_soc_codec_get_drvdata(codec
);
357 unsigned int reg
= AIC31XX_DACFLAG1
;
360 switch (WIDGET_BIT(w
->reg
, w
->shift
)) {
361 case WIDGET_BIT(AIC31XX_DACSETUP
, 7):
362 mask
= AIC31XX_LDACPWRSTATUS_MASK
;
364 case WIDGET_BIT(AIC31XX_DACSETUP
, 6):
365 mask
= AIC31XX_RDACPWRSTATUS_MASK
;
367 case WIDGET_BIT(AIC31XX_HPDRIVER
, 7):
368 mask
= AIC31XX_HPLDRVPWRSTATUS_MASK
;
370 case WIDGET_BIT(AIC31XX_HPDRIVER
, 6):
371 mask
= AIC31XX_HPRDRVPWRSTATUS_MASK
;
373 case WIDGET_BIT(AIC31XX_SPKAMP
, 7):
374 mask
= AIC31XX_SPLDRVPWRSTATUS_MASK
;
376 case WIDGET_BIT(AIC31XX_SPKAMP
, 6):
377 mask
= AIC31XX_SPRDRVPWRSTATUS_MASK
;
379 case WIDGET_BIT(AIC31XX_ADCSETUP
, 7):
380 mask
= AIC31XX_ADCPWRSTATUS_MASK
;
381 reg
= AIC31XX_ADCFLAG
;
384 dev_err(codec
->dev
, "Unknown widget '%s' calling %s\n",
390 case SND_SOC_DAPM_POST_PMU
:
391 return aic31xx_wait_bits(aic31xx
, reg
, mask
, mask
, 5000, 100);
392 case SND_SOC_DAPM_POST_PMD
:
393 return aic31xx_wait_bits(aic31xx
, reg
, mask
, 0, 5000, 100);
396 "Unhandled dapm widget event %d from %s\n",
402 static const struct snd_kcontrol_new aic31xx_left_output_switches
[] = {
403 SOC_DAPM_SINGLE("From Left DAC", AIC31XX_DACMIXERROUTE
, 6, 1, 0),
404 SOC_DAPM_SINGLE("From MIC1LP", AIC31XX_DACMIXERROUTE
, 5, 1, 0),
405 SOC_DAPM_SINGLE("From MIC1RP", AIC31XX_DACMIXERROUTE
, 4, 1, 0),
408 static const struct snd_kcontrol_new aic31xx_right_output_switches
[] = {
409 SOC_DAPM_SINGLE("From Right DAC", AIC31XX_DACMIXERROUTE
, 2, 1, 0),
410 SOC_DAPM_SINGLE("From MIC1RP", AIC31XX_DACMIXERROUTE
, 1, 1, 0),
413 static const struct snd_kcontrol_new dac31xx_left_output_switches
[] = {
414 SOC_DAPM_SINGLE("From Left DAC", AIC31XX_DACMIXERROUTE
, 6, 1, 0),
415 SOC_DAPM_SINGLE("From AIN1", AIC31XX_DACMIXERROUTE
, 5, 1, 0),
416 SOC_DAPM_SINGLE("From AIN2", AIC31XX_DACMIXERROUTE
, 4, 1, 0),
419 static const struct snd_kcontrol_new dac31xx_right_output_switches
[] = {
420 SOC_DAPM_SINGLE("From Right DAC", AIC31XX_DACMIXERROUTE
, 2, 1, 0),
421 SOC_DAPM_SINGLE("From AIN2", AIC31XX_DACMIXERROUTE
, 1, 1, 0),
424 static const struct snd_kcontrol_new p_term_mic1lp
=
425 SOC_DAPM_ENUM("MIC1LP P-Terminal", mic1lp_p_enum
);
427 static const struct snd_kcontrol_new p_term_mic1rp
=
428 SOC_DAPM_ENUM("MIC1RP P-Terminal", mic1rp_p_enum
);
430 static const struct snd_kcontrol_new p_term_mic1lm
=
431 SOC_DAPM_ENUM("MIC1LM P-Terminal", mic1lm_p_enum
);
433 static const struct snd_kcontrol_new m_term_mic1lm
=
434 SOC_DAPM_ENUM("MIC1LM M-Terminal", mic1lm_m_enum
);
436 static const struct snd_kcontrol_new aic31xx_dapm_hpl_switch
=
437 SOC_DAPM_SINGLE("Switch", AIC31XX_LANALOGHPL
, 7, 1, 0);
439 static const struct snd_kcontrol_new aic31xx_dapm_hpr_switch
=
440 SOC_DAPM_SINGLE("Switch", AIC31XX_RANALOGHPR
, 7, 1, 0);
442 static const struct snd_kcontrol_new aic31xx_dapm_spl_switch
=
443 SOC_DAPM_SINGLE("Switch", AIC31XX_LANALOGSPL
, 7, 1, 0);
445 static const struct snd_kcontrol_new aic31xx_dapm_spr_switch
=
446 SOC_DAPM_SINGLE("Switch", AIC31XX_RANALOGSPR
, 7, 1, 0);
448 static int mic_bias_event(struct snd_soc_dapm_widget
*w
,
449 struct snd_kcontrol
*kcontrol
, int event
)
451 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
452 struct aic31xx_priv
*aic31xx
= snd_soc_codec_get_drvdata(codec
);
455 case SND_SOC_DAPM_POST_PMU
:
456 /* change mic bias voltage to user defined */
457 snd_soc_update_bits(codec
, AIC31XX_MICBIAS
,
458 AIC31XX_MICBIAS_MASK
,
459 aic31xx
->pdata
.micbias_vg
<<
460 AIC31XX_MICBIAS_SHIFT
);
461 dev_dbg(codec
->dev
, "%s: turned on\n", __func__
);
463 case SND_SOC_DAPM_PRE_PMD
:
464 /* turn mic bias off */
465 snd_soc_update_bits(codec
, AIC31XX_MICBIAS
,
466 AIC31XX_MICBIAS_MASK
, 0);
467 dev_dbg(codec
->dev
, "%s: turned off\n", __func__
);
473 static const struct snd_soc_dapm_widget common31xx_dapm_widgets
[] = {
474 SND_SOC_DAPM_AIF_IN("DAC IN", "DAC Playback", 0, SND_SOC_NOPM
, 0, 0),
476 SND_SOC_DAPM_MUX("DAC Left Input",
477 SND_SOC_NOPM
, 0, 0, &ldac_in_control
),
478 SND_SOC_DAPM_MUX("DAC Right Input",
479 SND_SOC_NOPM
, 0, 0, &rdac_in_control
),
481 SND_SOC_DAPM_DAC_E("DAC Left", "Left Playback",
482 AIC31XX_DACSETUP
, 7, 0, aic31xx_dapm_power_event
,
483 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_POST_PMD
),
485 SND_SOC_DAPM_DAC_E("DAC Right", "Right Playback",
486 AIC31XX_DACSETUP
, 6, 0, aic31xx_dapm_power_event
,
487 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_POST_PMD
),
490 SND_SOC_DAPM_SWITCH("HP Left", SND_SOC_NOPM
, 0, 0,
491 &aic31xx_dapm_hpl_switch
),
492 SND_SOC_DAPM_SWITCH("HP Right", SND_SOC_NOPM
, 0, 0,
493 &aic31xx_dapm_hpr_switch
),
496 SND_SOC_DAPM_OUT_DRV_E("HPL Driver", AIC31XX_HPDRIVER
, 7, 0,
497 NULL
, 0, aic31xx_dapm_power_event
,
498 SND_SOC_DAPM_POST_PMD
| SND_SOC_DAPM_POST_PMU
),
499 SND_SOC_DAPM_OUT_DRV_E("HPR Driver", AIC31XX_HPDRIVER
, 6, 0,
500 NULL
, 0, aic31xx_dapm_power_event
,
501 SND_SOC_DAPM_POST_PMD
| SND_SOC_DAPM_POST_PMU
),
504 SND_SOC_DAPM_SUPPLY("MICBIAS", SND_SOC_NOPM
, 0, 0, mic_bias_event
,
505 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_PRE_PMD
),
508 SND_SOC_DAPM_OUTPUT("HPL"),
509 SND_SOC_DAPM_OUTPUT("HPR"),
512 static const struct snd_soc_dapm_widget dac31xx_dapm_widgets
[] = {
514 SND_SOC_DAPM_INPUT("AIN1"),
515 SND_SOC_DAPM_INPUT("AIN2"),
518 SND_SOC_DAPM_MIXER("Output Left", SND_SOC_NOPM
, 0, 0,
519 dac31xx_left_output_switches
,
520 ARRAY_SIZE(dac31xx_left_output_switches
)),
521 SND_SOC_DAPM_MIXER("Output Right", SND_SOC_NOPM
, 0, 0,
522 dac31xx_right_output_switches
,
523 ARRAY_SIZE(dac31xx_right_output_switches
)),
526 static const struct snd_soc_dapm_widget aic31xx_dapm_widgets
[] = {
528 SND_SOC_DAPM_INPUT("MIC1LP"),
529 SND_SOC_DAPM_INPUT("MIC1RP"),
530 SND_SOC_DAPM_INPUT("MIC1LM"),
532 /* Input Selection to MIC_PGA */
533 SND_SOC_DAPM_MUX("MIC1LP P-Terminal", SND_SOC_NOPM
, 0, 0,
535 SND_SOC_DAPM_MUX("MIC1RP P-Terminal", SND_SOC_NOPM
, 0, 0,
537 SND_SOC_DAPM_MUX("MIC1LM P-Terminal", SND_SOC_NOPM
, 0, 0,
541 SND_SOC_DAPM_ADC_E("ADC", "Capture", AIC31XX_ADCSETUP
, 7, 0,
542 aic31xx_dapm_power_event
, SND_SOC_DAPM_POST_PMU
|
543 SND_SOC_DAPM_POST_PMD
),
545 SND_SOC_DAPM_MUX("MIC1LM M-Terminal", SND_SOC_NOPM
, 0, 0,
548 /* Enabling & Disabling MIC Gain Ctl */
549 SND_SOC_DAPM_PGA("MIC_GAIN_CTL", AIC31XX_MICPGA
,
553 SND_SOC_DAPM_MIXER("Output Left", SND_SOC_NOPM
, 0, 0,
554 aic31xx_left_output_switches
,
555 ARRAY_SIZE(aic31xx_left_output_switches
)),
556 SND_SOC_DAPM_MIXER("Output Right", SND_SOC_NOPM
, 0, 0,
557 aic31xx_right_output_switches
,
558 ARRAY_SIZE(aic31xx_right_output_switches
)),
561 static const struct snd_soc_dapm_widget aic311x_dapm_widgets
[] = {
562 /* AIC3111 and AIC3110 have stereo class-D amplifier */
563 SND_SOC_DAPM_OUT_DRV_E("SPL ClassD", AIC31XX_SPKAMP
, 7, 0, NULL
, 0,
564 aic31xx_dapm_power_event
, SND_SOC_DAPM_POST_PMU
|
565 SND_SOC_DAPM_POST_PMD
),
566 SND_SOC_DAPM_OUT_DRV_E("SPR ClassD", AIC31XX_SPKAMP
, 6, 0, NULL
, 0,
567 aic31xx_dapm_power_event
, SND_SOC_DAPM_POST_PMU
|
568 SND_SOC_DAPM_POST_PMD
),
569 SND_SOC_DAPM_SWITCH("Speaker Left", SND_SOC_NOPM
, 0, 0,
570 &aic31xx_dapm_spl_switch
),
571 SND_SOC_DAPM_SWITCH("Speaker Right", SND_SOC_NOPM
, 0, 0,
572 &aic31xx_dapm_spr_switch
),
573 SND_SOC_DAPM_OUTPUT("SPL"),
574 SND_SOC_DAPM_OUTPUT("SPR"),
577 /* AIC3100 and AIC3120 have only mono class-D amplifier */
578 static const struct snd_soc_dapm_widget aic310x_dapm_widgets
[] = {
579 SND_SOC_DAPM_OUT_DRV_E("SPK ClassD", AIC31XX_SPKAMP
, 7, 0, NULL
, 0,
580 aic31xx_dapm_power_event
, SND_SOC_DAPM_POST_PMU
|
581 SND_SOC_DAPM_POST_PMD
),
582 SND_SOC_DAPM_SWITCH("Speaker", SND_SOC_NOPM
, 0, 0,
583 &aic31xx_dapm_spl_switch
),
584 SND_SOC_DAPM_OUTPUT("SPK"),
587 static const struct snd_soc_dapm_route
588 common31xx_audio_map
[] = {
589 /* DAC Input Routing */
590 {"DAC Left Input", "Left Data", "DAC IN"},
591 {"DAC Left Input", "Right Data", "DAC IN"},
592 {"DAC Left Input", "Mono", "DAC IN"},
593 {"DAC Right Input", "Left Data", "DAC IN"},
594 {"DAC Right Input", "Right Data", "DAC IN"},
595 {"DAC Right Input", "Mono", "DAC IN"},
596 {"DAC Left", NULL
, "DAC Left Input"},
597 {"DAC Right", NULL
, "DAC Right Input"},
600 {"HP Left", "Switch", "Output Left"},
601 {"HPL Driver", NULL
, "HP Left"},
602 {"HPL", NULL
, "HPL Driver"},
605 {"HP Right", "Switch", "Output Right"},
606 {"HPR Driver", NULL
, "HP Right"},
607 {"HPR", NULL
, "HPR Driver"},
610 static const struct snd_soc_dapm_route
611 dac31xx_audio_map
[] = {
613 {"Output Left", "From Left DAC", "DAC Left"},
614 {"Output Left", "From AIN1", "AIN1"},
615 {"Output Left", "From AIN2", "AIN2"},
618 {"Output Right", "From Right DAC", "DAC Right"},
619 {"Output Right", "From AIN2", "AIN2"},
622 static const struct snd_soc_dapm_route
623 aic31xx_audio_map
[] = {
625 {"MIC1LP P-Terminal", "FFR 10 Ohm", "MIC1LP"},
626 {"MIC1LP P-Terminal", "FFR 20 Ohm", "MIC1LP"},
627 {"MIC1LP P-Terminal", "FFR 40 Ohm", "MIC1LP"},
628 {"MIC1RP P-Terminal", "FFR 10 Ohm", "MIC1RP"},
629 {"MIC1RP P-Terminal", "FFR 20 Ohm", "MIC1RP"},
630 {"MIC1RP P-Terminal", "FFR 40 Ohm", "MIC1RP"},
631 {"MIC1LM P-Terminal", "FFR 10 Ohm", "MIC1LM"},
632 {"MIC1LM P-Terminal", "FFR 20 Ohm", "MIC1LM"},
633 {"MIC1LM P-Terminal", "FFR 40 Ohm", "MIC1LM"},
635 {"MIC1LM M-Terminal", "FFR 10 Ohm", "MIC1LM"},
636 {"MIC1LM M-Terminal", "FFR 20 Ohm", "MIC1LM"},
637 {"MIC1LM M-Terminal", "FFR 40 Ohm", "MIC1LM"},
639 {"MIC_GAIN_CTL", NULL
, "MIC1LP P-Terminal"},
640 {"MIC_GAIN_CTL", NULL
, "MIC1RP P-Terminal"},
641 {"MIC_GAIN_CTL", NULL
, "MIC1LM P-Terminal"},
642 {"MIC_GAIN_CTL", NULL
, "MIC1LM M-Terminal"},
644 {"ADC", NULL
, "MIC_GAIN_CTL"},
647 {"Output Left", "From Left DAC", "DAC Left"},
648 {"Output Left", "From MIC1LP", "MIC1LP"},
649 {"Output Left", "From MIC1RP", "MIC1RP"},
652 {"Output Right", "From Right DAC", "DAC Right"},
653 {"Output Right", "From MIC1RP", "MIC1RP"},
656 static const struct snd_soc_dapm_route
657 aic311x_audio_map
[] = {
659 {"Speaker Left", "Switch", "Output Left"},
660 {"SPL ClassD", NULL
, "Speaker Left"},
661 {"SPL", NULL
, "SPL ClassD"},
664 {"Speaker Right", "Switch", "Output Right"},
665 {"SPR ClassD", NULL
, "Speaker Right"},
666 {"SPR", NULL
, "SPR ClassD"},
669 static const struct snd_soc_dapm_route
670 aic310x_audio_map
[] = {
672 {"Speaker", "Switch", "Output Left"},
673 {"SPK ClassD", NULL
, "Speaker"},
674 {"SPK", NULL
, "SPK ClassD"},
677 static int aic31xx_add_controls(struct snd_soc_codec
*codec
)
680 struct aic31xx_priv
*aic31xx
= snd_soc_codec_get_drvdata(codec
);
682 if (!(aic31xx
->pdata
.codec_type
& DAC31XX_BIT
))
683 ret
= snd_soc_add_codec_controls(
684 codec
, aic31xx_snd_controls
,
685 ARRAY_SIZE(aic31xx_snd_controls
));
689 if (aic31xx
->pdata
.codec_type
& AIC31XX_STEREO_CLASS_D_BIT
)
690 ret
= snd_soc_add_codec_controls(
691 codec
, aic311x_snd_controls
,
692 ARRAY_SIZE(aic311x_snd_controls
));
694 ret
= snd_soc_add_codec_controls(
695 codec
, aic310x_snd_controls
,
696 ARRAY_SIZE(aic310x_snd_controls
));
701 static int aic31xx_add_widgets(struct snd_soc_codec
*codec
)
703 struct snd_soc_dapm_context
*dapm
= snd_soc_codec_get_dapm(codec
);
704 struct aic31xx_priv
*aic31xx
= snd_soc_codec_get_drvdata(codec
);
707 if (aic31xx
->pdata
.codec_type
& DAC31XX_BIT
) {
708 ret
= snd_soc_dapm_new_controls(
709 dapm
, dac31xx_dapm_widgets
,
710 ARRAY_SIZE(dac31xx_dapm_widgets
));
714 ret
= snd_soc_dapm_add_routes(dapm
, dac31xx_audio_map
,
715 ARRAY_SIZE(dac31xx_audio_map
));
719 ret
= snd_soc_dapm_new_controls(
720 dapm
, aic31xx_dapm_widgets
,
721 ARRAY_SIZE(aic31xx_dapm_widgets
));
725 ret
= snd_soc_dapm_add_routes(dapm
, aic31xx_audio_map
,
726 ARRAY_SIZE(aic31xx_audio_map
));
731 if (aic31xx
->pdata
.codec_type
& AIC31XX_STEREO_CLASS_D_BIT
) {
732 ret
= snd_soc_dapm_new_controls(
733 dapm
, aic311x_dapm_widgets
,
734 ARRAY_SIZE(aic311x_dapm_widgets
));
738 ret
= snd_soc_dapm_add_routes(dapm
, aic311x_audio_map
,
739 ARRAY_SIZE(aic311x_audio_map
));
743 ret
= snd_soc_dapm_new_controls(
744 dapm
, aic310x_dapm_widgets
,
745 ARRAY_SIZE(aic310x_dapm_widgets
));
749 ret
= snd_soc_dapm_add_routes(dapm
, aic310x_audio_map
,
750 ARRAY_SIZE(aic310x_audio_map
));
758 static int aic31xx_setup_pll(struct snd_soc_codec
*codec
,
759 struct snd_pcm_hw_params
*params
)
761 struct aic31xx_priv
*aic31xx
= snd_soc_codec_get_drvdata(codec
);
762 int bclk_score
= snd_soc_params_to_frame_size(params
);
763 int mclk_p
= aic31xx
->sysclk
/ aic31xx
->p_div
;
768 /* Use PLL as CODEC_CLKIN and DAC_CLK as BDIV_CLKIN */
769 snd_soc_update_bits(codec
, AIC31XX_CLKMUX
,
770 AIC31XX_CODEC_CLKIN_MASK
, AIC31XX_CODEC_CLKIN_PLL
);
771 snd_soc_update_bits(codec
, AIC31XX_IFACE2
,
772 AIC31XX_BDIVCLK_MASK
, AIC31XX_DAC2BCLK
);
774 for (i
= 0; i
< ARRAY_SIZE(aic31xx_divs
); i
++) {
775 if (aic31xx_divs
[i
].rate
== params_rate(params
) &&
776 aic31xx_divs
[i
].mclk_p
== mclk_p
) {
777 int s
= (aic31xx_divs
[i
].dosr
* aic31xx_divs
[i
].mdac
) %
778 snd_soc_params_to_frame_size(params
);
779 int bn
= (aic31xx_divs
[i
].dosr
* aic31xx_divs
[i
].mdac
) /
780 snd_soc_params_to_frame_size(params
);
781 if (s
< bclk_score
&& bn
> 0) {
791 "%s: Sample rate (%u) and format not supported\n",
792 __func__
, params_rate(params
));
793 /* See bellow for details how fix this. */
796 if (bclk_score
!= 0) {
797 dev_warn(codec
->dev
, "Can not produce exact bitclock");
798 /* This is fine if using dsp format, but if using i2s
799 there may be trouble. To fix the issue edit the
800 aic31xx_divs table for your mclk and sample
801 rate. Details can be found from:
802 http://www.ti.com/lit/ds/symlink/tlv320aic3100.pdf
803 Section: 5.6 CLOCK Generation and PLL
808 /* PLL configuration */
809 snd_soc_update_bits(codec
, AIC31XX_PLLPR
, AIC31XX_PLL_MASK
,
810 (aic31xx
->p_div
<< 4) | 0x01);
811 snd_soc_write(codec
, AIC31XX_PLLJ
, aic31xx_divs
[i
].pll_j
);
813 snd_soc_write(codec
, AIC31XX_PLLDMSB
,
814 aic31xx_divs
[i
].pll_d
>> 8);
815 snd_soc_write(codec
, AIC31XX_PLLDLSB
,
816 aic31xx_divs
[i
].pll_d
& 0xff);
818 /* DAC dividers configuration */
819 snd_soc_update_bits(codec
, AIC31XX_NDAC
, AIC31XX_PLL_MASK
,
820 aic31xx_divs
[i
].ndac
);
821 snd_soc_update_bits(codec
, AIC31XX_MDAC
, AIC31XX_PLL_MASK
,
822 aic31xx_divs
[i
].mdac
);
824 snd_soc_write(codec
, AIC31XX_DOSRMSB
, aic31xx_divs
[i
].dosr
>> 8);
825 snd_soc_write(codec
, AIC31XX_DOSRLSB
, aic31xx_divs
[i
].dosr
& 0xff);
827 /* ADC dividers configuration. Write reset value 1 if not used. */
828 snd_soc_update_bits(codec
, AIC31XX_NADC
, AIC31XX_PLL_MASK
,
829 aic31xx_divs
[i
].nadc
? aic31xx_divs
[i
].nadc
: 1);
830 snd_soc_update_bits(codec
, AIC31XX_MADC
, AIC31XX_PLL_MASK
,
831 aic31xx_divs
[i
].madc
? aic31xx_divs
[i
].madc
: 1);
833 snd_soc_write(codec
, AIC31XX_AOSR
, aic31xx_divs
[i
].aosr
);
835 /* Bit clock divider configuration. */
836 snd_soc_update_bits(codec
, AIC31XX_BCLKN
,
837 AIC31XX_PLL_MASK
, bclk_n
);
839 aic31xx
->rate_div_line
= i
;
842 "pll %d.%04d/%d dosr %d n %d m %d aosr %d n %d m %d bclk_n %d\n",
843 aic31xx_divs
[i
].pll_j
, aic31xx_divs
[i
].pll_d
,
844 aic31xx
->p_div
, aic31xx_divs
[i
].dosr
,
845 aic31xx_divs
[i
].ndac
, aic31xx_divs
[i
].mdac
,
846 aic31xx_divs
[i
].aosr
, aic31xx_divs
[i
].nadc
,
847 aic31xx_divs
[i
].madc
, bclk_n
);
852 static int aic31xx_hw_params(struct snd_pcm_substream
*substream
,
853 struct snd_pcm_hw_params
*params
,
854 struct snd_soc_dai
*dai
)
856 struct snd_soc_codec
*codec
= dai
->codec
;
859 dev_dbg(codec
->dev
, "## %s: width %d rate %d\n",
860 __func__
, params_width(params
),
861 params_rate(params
));
863 switch (params_width(params
)) {
867 data
= (AIC31XX_WORD_LEN_20BITS
<<
868 AIC31XX_IFACE1_DATALEN_SHIFT
);
871 data
= (AIC31XX_WORD_LEN_24BITS
<<
872 AIC31XX_IFACE1_DATALEN_SHIFT
);
875 data
= (AIC31XX_WORD_LEN_32BITS
<<
876 AIC31XX_IFACE1_DATALEN_SHIFT
);
879 dev_err(codec
->dev
, "%s: Unsupported width %d\n",
880 __func__
, params_width(params
));
884 snd_soc_update_bits(codec
, AIC31XX_IFACE1
,
885 AIC31XX_IFACE1_DATALEN_MASK
,
888 return aic31xx_setup_pll(codec
, params
);
891 static int aic31xx_dac_mute(struct snd_soc_dai
*codec_dai
, int mute
)
893 struct snd_soc_codec
*codec
= codec_dai
->codec
;
896 snd_soc_update_bits(codec
, AIC31XX_DACMUTE
,
897 AIC31XX_DACMUTE_MASK
,
898 AIC31XX_DACMUTE_MASK
);
900 snd_soc_update_bits(codec
, AIC31XX_DACMUTE
,
901 AIC31XX_DACMUTE_MASK
, 0x0);
907 static int aic31xx_set_dai_fmt(struct snd_soc_dai
*codec_dai
,
910 struct snd_soc_codec
*codec
= codec_dai
->codec
;
915 dev_dbg(codec
->dev
, "## %s: fmt = 0x%x\n", __func__
, fmt
);
917 /* set master/slave audio interface */
918 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
919 case SND_SOC_DAIFMT_CBM_CFM
:
920 iface_reg1
|= AIC31XX_BCLK_MASTER
| AIC31XX_WCLK_MASTER
;
923 dev_alert(codec
->dev
, "Invalid DAI master/slave interface\n");
927 /* interface format */
928 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
929 case SND_SOC_DAIFMT_I2S
:
931 case SND_SOC_DAIFMT_DSP_A
:
933 case SND_SOC_DAIFMT_DSP_B
:
934 /* NOTE: BCLKINV bit value 1 equas NB and 0 equals IB */
935 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
936 case SND_SOC_DAIFMT_NB_NF
:
937 iface_reg2
|= AIC31XX_BCLKINV_MASK
;
939 case SND_SOC_DAIFMT_IB_NF
:
944 iface_reg1
|= (AIC31XX_DSP_MODE
<<
945 AIC31XX_IFACE1_DATATYPE_SHIFT
);
947 case SND_SOC_DAIFMT_RIGHT_J
:
948 iface_reg1
|= (AIC31XX_RIGHT_JUSTIFIED_MODE
<<
949 AIC31XX_IFACE1_DATATYPE_SHIFT
);
951 case SND_SOC_DAIFMT_LEFT_J
:
952 iface_reg1
|= (AIC31XX_LEFT_JUSTIFIED_MODE
<<
953 AIC31XX_IFACE1_DATATYPE_SHIFT
);
956 dev_err(codec
->dev
, "Invalid DAI interface format\n");
960 snd_soc_update_bits(codec
, AIC31XX_IFACE1
,
961 AIC31XX_IFACE1_DATATYPE_MASK
|
962 AIC31XX_IFACE1_MASTER_MASK
,
964 snd_soc_update_bits(codec
, AIC31XX_DATA_OFFSET
,
965 AIC31XX_DATA_OFFSET_MASK
,
967 snd_soc_update_bits(codec
, AIC31XX_IFACE2
,
968 AIC31XX_BCLKINV_MASK
,
974 static int aic31xx_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
975 int clk_id
, unsigned int freq
, int dir
)
977 struct snd_soc_codec
*codec
= codec_dai
->codec
;
978 struct aic31xx_priv
*aic31xx
= snd_soc_codec_get_drvdata(codec
);
981 dev_dbg(codec
->dev
, "## %s: clk_id = %d, freq = %d, dir = %d\n",
982 __func__
, clk_id
, freq
, dir
);
984 for (i
= 1; freq
/i
> 20000000 && i
< 8; i
++)
986 if (freq
/i
> 20000000) {
987 dev_err(aic31xx
->dev
, "%s: Too high mclk frequency %u\n",
993 for (i
= 0; i
< ARRAY_SIZE(aic31xx_divs
) &&
994 aic31xx_divs
[i
].mclk_p
!= freq
/aic31xx
->p_div
; i
++)
996 if (i
== ARRAY_SIZE(aic31xx_divs
)) {
997 dev_err(aic31xx
->dev
, "%s: Unsupported frequency %d\n",
1002 /* set clock on MCLK, BCLK, or GPIO1 as PLL input */
1003 snd_soc_update_bits(codec
, AIC31XX_CLKMUX
, AIC31XX_PLL_CLKIN_MASK
,
1004 clk_id
<< AIC31XX_PLL_CLKIN_SHIFT
);
1006 aic31xx
->sysclk
= freq
;
1010 static int aic31xx_regulator_event(struct notifier_block
*nb
,
1011 unsigned long event
, void *data
)
1013 struct aic31xx_disable_nb
*disable_nb
=
1014 container_of(nb
, struct aic31xx_disable_nb
, nb
);
1015 struct aic31xx_priv
*aic31xx
= disable_nb
->aic31xx
;
1017 if (event
& REGULATOR_EVENT_DISABLE
) {
1019 * Put codec to reset and as at least one of the
1020 * supplies was disabled.
1022 if (gpio_is_valid(aic31xx
->pdata
.gpio_reset
))
1023 gpio_set_value(aic31xx
->pdata
.gpio_reset
, 0);
1025 regcache_mark_dirty(aic31xx
->regmap
);
1026 dev_dbg(aic31xx
->dev
, "## %s: DISABLE received\n", __func__
);
1032 static void aic31xx_clk_on(struct snd_soc_codec
*codec
)
1034 struct aic31xx_priv
*aic31xx
= snd_soc_codec_get_drvdata(codec
);
1035 u8 mask
= AIC31XX_PM_MASK
;
1036 u8 on
= AIC31XX_PM_MASK
;
1038 dev_dbg(codec
->dev
, "codec clock -> on (rate %d)\n",
1039 aic31xx_divs
[aic31xx
->rate_div_line
].rate
);
1040 snd_soc_update_bits(codec
, AIC31XX_PLLPR
, mask
, on
);
1042 snd_soc_update_bits(codec
, AIC31XX_NDAC
, mask
, on
);
1043 snd_soc_update_bits(codec
, AIC31XX_MDAC
, mask
, on
);
1044 if (aic31xx_divs
[aic31xx
->rate_div_line
].nadc
)
1045 snd_soc_update_bits(codec
, AIC31XX_NADC
, mask
, on
);
1046 if (aic31xx_divs
[aic31xx
->rate_div_line
].madc
)
1047 snd_soc_update_bits(codec
, AIC31XX_MADC
, mask
, on
);
1048 snd_soc_update_bits(codec
, AIC31XX_BCLKN
, mask
, on
);
1051 static void aic31xx_clk_off(struct snd_soc_codec
*codec
)
1053 u8 mask
= AIC31XX_PM_MASK
;
1056 dev_dbg(codec
->dev
, "codec clock -> off\n");
1057 snd_soc_update_bits(codec
, AIC31XX_BCLKN
, mask
, off
);
1058 snd_soc_update_bits(codec
, AIC31XX_MADC
, mask
, off
);
1059 snd_soc_update_bits(codec
, AIC31XX_NADC
, mask
, off
);
1060 snd_soc_update_bits(codec
, AIC31XX_MDAC
, mask
, off
);
1061 snd_soc_update_bits(codec
, AIC31XX_NDAC
, mask
, off
);
1062 snd_soc_update_bits(codec
, AIC31XX_PLLPR
, mask
, off
);
1065 static int aic31xx_power_on(struct snd_soc_codec
*codec
)
1067 struct aic31xx_priv
*aic31xx
= snd_soc_codec_get_drvdata(codec
);
1070 ret
= regulator_bulk_enable(ARRAY_SIZE(aic31xx
->supplies
),
1075 if (gpio_is_valid(aic31xx
->pdata
.gpio_reset
)) {
1076 gpio_set_value(aic31xx
->pdata
.gpio_reset
, 1);
1079 regcache_cache_only(aic31xx
->regmap
, false);
1080 ret
= regcache_sync(aic31xx
->regmap
);
1083 "Failed to restore cache: %d\n", ret
);
1084 regcache_cache_only(aic31xx
->regmap
, true);
1085 regulator_bulk_disable(ARRAY_SIZE(aic31xx
->supplies
),
1092 static int aic31xx_power_off(struct snd_soc_codec
*codec
)
1094 struct aic31xx_priv
*aic31xx
= snd_soc_codec_get_drvdata(codec
);
1097 regcache_cache_only(aic31xx
->regmap
, true);
1098 ret
= regulator_bulk_disable(ARRAY_SIZE(aic31xx
->supplies
),
1104 static int aic31xx_set_bias_level(struct snd_soc_codec
*codec
,
1105 enum snd_soc_bias_level level
)
1107 dev_dbg(codec
->dev
, "## %s: %d -> %d\n", __func__
,
1108 snd_soc_codec_get_bias_level(codec
), level
);
1111 case SND_SOC_BIAS_ON
:
1113 case SND_SOC_BIAS_PREPARE
:
1114 if (snd_soc_codec_get_bias_level(codec
) == SND_SOC_BIAS_STANDBY
)
1115 aic31xx_clk_on(codec
);
1117 case SND_SOC_BIAS_STANDBY
:
1118 switch (snd_soc_codec_get_bias_level(codec
)) {
1119 case SND_SOC_BIAS_OFF
:
1120 aic31xx_power_on(codec
);
1122 case SND_SOC_BIAS_PREPARE
:
1123 aic31xx_clk_off(codec
);
1129 case SND_SOC_BIAS_OFF
:
1130 if (snd_soc_codec_get_bias_level(codec
) == SND_SOC_BIAS_STANDBY
)
1131 aic31xx_power_off(codec
);
1138 static int aic31xx_codec_probe(struct snd_soc_codec
*codec
)
1141 struct aic31xx_priv
*aic31xx
= snd_soc_codec_get_drvdata(codec
);
1144 dev_dbg(aic31xx
->dev
, "## %s\n", __func__
);
1146 aic31xx
= snd_soc_codec_get_drvdata(codec
);
1148 aic31xx
->codec
= codec
;
1150 for (i
= 0; i
< ARRAY_SIZE(aic31xx
->supplies
); i
++) {
1151 aic31xx
->disable_nb
[i
].nb
.notifier_call
=
1152 aic31xx_regulator_event
;
1153 aic31xx
->disable_nb
[i
].aic31xx
= aic31xx
;
1154 ret
= regulator_register_notifier(aic31xx
->supplies
[i
].consumer
,
1155 &aic31xx
->disable_nb
[i
].nb
);
1158 "Failed to request regulator notifier: %d\n",
1164 regcache_cache_only(aic31xx
->regmap
, true);
1165 regcache_mark_dirty(aic31xx
->regmap
);
1167 ret
= aic31xx_add_controls(codec
);
1171 ret
= aic31xx_add_widgets(codec
);
1176 static int aic31xx_codec_remove(struct snd_soc_codec
*codec
)
1178 struct aic31xx_priv
*aic31xx
= snd_soc_codec_get_drvdata(codec
);
1181 for (i
= 0; i
< ARRAY_SIZE(aic31xx
->supplies
); i
++)
1182 regulator_unregister_notifier(aic31xx
->supplies
[i
].consumer
,
1183 &aic31xx
->disable_nb
[i
].nb
);
1188 static const struct snd_soc_codec_driver soc_codec_driver_aic31xx
= {
1189 .probe
= aic31xx_codec_probe
,
1190 .remove
= aic31xx_codec_remove
,
1191 .set_bias_level
= aic31xx_set_bias_level
,
1192 .suspend_bias_off
= true,
1194 .component_driver
= {
1195 .controls
= common31xx_snd_controls
,
1196 .num_controls
= ARRAY_SIZE(common31xx_snd_controls
),
1197 .dapm_widgets
= common31xx_dapm_widgets
,
1198 .num_dapm_widgets
= ARRAY_SIZE(common31xx_dapm_widgets
),
1199 .dapm_routes
= common31xx_audio_map
,
1200 .num_dapm_routes
= ARRAY_SIZE(common31xx_audio_map
),
1204 static const struct snd_soc_dai_ops aic31xx_dai_ops
= {
1205 .hw_params
= aic31xx_hw_params
,
1206 .set_sysclk
= aic31xx_set_dai_sysclk
,
1207 .set_fmt
= aic31xx_set_dai_fmt
,
1208 .digital_mute
= aic31xx_dac_mute
,
1211 static struct snd_soc_dai_driver dac31xx_dai_driver
[] = {
1213 .name
= "tlv320dac31xx-hifi",
1215 .stream_name
= "Playback",
1218 .rates
= AIC31XX_RATES
,
1219 .formats
= AIC31XX_FORMATS
,
1221 .ops
= &aic31xx_dai_ops
,
1222 .symmetric_rates
= 1,
1226 static struct snd_soc_dai_driver aic31xx_dai_driver
[] = {
1228 .name
= "tlv320aic31xx-hifi",
1230 .stream_name
= "Playback",
1233 .rates
= AIC31XX_RATES
,
1234 .formats
= AIC31XX_FORMATS
,
1237 .stream_name
= "Capture",
1240 .rates
= AIC31XX_RATES
,
1241 .formats
= AIC31XX_FORMATS
,
1243 .ops
= &aic31xx_dai_ops
,
1244 .symmetric_rates
= 1,
1248 #if defined(CONFIG_OF)
1249 static const struct of_device_id tlv320aic31xx_of_match
[] = {
1250 { .compatible
= "ti,tlv320aic310x" },
1251 { .compatible
= "ti,tlv320aic311x" },
1252 { .compatible
= "ti,tlv320aic3100" },
1253 { .compatible
= "ti,tlv320aic3110" },
1254 { .compatible
= "ti,tlv320aic3120" },
1255 { .compatible
= "ti,tlv320aic3111" },
1256 { .compatible
= "ti,tlv320dac3100" },
1257 { .compatible
= "ti,tlv320dac3101" },
1260 MODULE_DEVICE_TABLE(of
, tlv320aic31xx_of_match
);
1262 static void aic31xx_pdata_from_of(struct aic31xx_priv
*aic31xx
)
1264 struct device_node
*np
= aic31xx
->dev
->of_node
;
1265 unsigned int value
= MICBIAS_2_0V
;
1268 of_property_read_u32(np
, "ai31xx-micbias-vg", &value
);
1273 aic31xx
->pdata
.micbias_vg
= value
;
1276 dev_err(aic31xx
->dev
,
1277 "Bad ai31xx-micbias-vg value %d DT\n",
1279 aic31xx
->pdata
.micbias_vg
= MICBIAS_2_0V
;
1282 ret
= of_get_named_gpio(np
, "gpio-reset", 0);
1284 aic31xx
->pdata
.gpio_reset
= ret
;
1286 #else /* CONFIG_OF */
1287 static void aic31xx_pdata_from_of(struct aic31xx_priv
*aic31xx
)
1290 #endif /* CONFIG_OF */
1292 static int aic31xx_device_init(struct aic31xx_priv
*aic31xx
)
1296 dev_set_drvdata(aic31xx
->dev
, aic31xx
);
1298 if (dev_get_platdata(aic31xx
->dev
))
1299 memcpy(&aic31xx
->pdata
, dev_get_platdata(aic31xx
->dev
),
1300 sizeof(aic31xx
->pdata
));
1301 else if (aic31xx
->dev
->of_node
)
1302 aic31xx_pdata_from_of(aic31xx
);
1304 if (aic31xx
->pdata
.gpio_reset
) {
1305 ret
= devm_gpio_request_one(aic31xx
->dev
,
1306 aic31xx
->pdata
.gpio_reset
,
1307 GPIOF_OUT_INIT_HIGH
,
1308 "aic31xx-reset-pin");
1310 dev_err(aic31xx
->dev
, "not able to acquire gpio\n");
1315 for (i
= 0; i
< ARRAY_SIZE(aic31xx
->supplies
); i
++)
1316 aic31xx
->supplies
[i
].supply
= aic31xx_supply_names
[i
];
1318 ret
= devm_regulator_bulk_get(aic31xx
->dev
,
1319 ARRAY_SIZE(aic31xx
->supplies
),
1322 dev_err(aic31xx
->dev
, "Failed to request supplies: %d\n", ret
);
1327 static int aic31xx_i2c_probe(struct i2c_client
*i2c
,
1328 const struct i2c_device_id
*id
)
1330 struct aic31xx_priv
*aic31xx
;
1332 const struct regmap_config
*regmap_config
;
1334 dev_dbg(&i2c
->dev
, "## %s: %s codec_type = %d\n", __func__
,
1335 id
->name
, (int) id
->driver_data
);
1337 regmap_config
= &aic31xx_i2c_regmap
;
1339 aic31xx
= devm_kzalloc(&i2c
->dev
, sizeof(*aic31xx
), GFP_KERNEL
);
1340 if (aic31xx
== NULL
)
1343 aic31xx
->regmap
= devm_regmap_init_i2c(i2c
, regmap_config
);
1344 if (IS_ERR(aic31xx
->regmap
)) {
1345 ret
= PTR_ERR(aic31xx
->regmap
);
1346 dev_err(&i2c
->dev
, "Failed to allocate register map: %d\n",
1350 aic31xx
->dev
= &i2c
->dev
;
1352 aic31xx
->pdata
.codec_type
= id
->driver_data
;
1354 ret
= aic31xx_device_init(aic31xx
);
1358 if (aic31xx
->pdata
.codec_type
& DAC31XX_BIT
)
1359 return snd_soc_register_codec(&i2c
->dev
,
1360 &soc_codec_driver_aic31xx
,
1362 ARRAY_SIZE(dac31xx_dai_driver
));
1364 return snd_soc_register_codec(&i2c
->dev
,
1365 &soc_codec_driver_aic31xx
,
1367 ARRAY_SIZE(aic31xx_dai_driver
));
1370 static int aic31xx_i2c_remove(struct i2c_client
*i2c
)
1372 snd_soc_unregister_codec(&i2c
->dev
);
1376 static const struct i2c_device_id aic31xx_i2c_id
[] = {
1377 { "tlv320aic310x", AIC3100
},
1378 { "tlv320aic311x", AIC3110
},
1379 { "tlv320aic3100", AIC3100
},
1380 { "tlv320aic3110", AIC3110
},
1381 { "tlv320aic3120", AIC3120
},
1382 { "tlv320aic3111", AIC3111
},
1383 { "tlv320dac3100", DAC3100
},
1384 { "tlv320dac3101", DAC3101
},
1387 MODULE_DEVICE_TABLE(i2c
, aic31xx_i2c_id
);
1390 static const struct acpi_device_id aic31xx_acpi_match
[] = {
1394 MODULE_DEVICE_TABLE(acpi
, aic31xx_acpi_match
);
1397 static struct i2c_driver aic31xx_i2c_driver
= {
1399 .name
= "tlv320aic31xx-codec",
1400 .of_match_table
= of_match_ptr(tlv320aic31xx_of_match
),
1401 .acpi_match_table
= ACPI_PTR(aic31xx_acpi_match
),
1403 .probe
= aic31xx_i2c_probe
,
1404 .remove
= aic31xx_i2c_remove
,
1405 .id_table
= aic31xx_i2c_id
,
1408 module_i2c_driver(aic31xx_i2c_driver
);
1410 MODULE_DESCRIPTION("ASoC TLV320AIC3111 codec driver");
1411 MODULE_AUTHOR("Jyri Sarha");
1412 MODULE_LICENSE("GPL");