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x86/speculation/mds: Fix documentation typo
[linux/fpc-iii.git] / sound / soc / codecs / wm8960.c
blob9ed4557009542b8773806875dbcbc63ee3a8cac5
1 /*
2 * wm8960.c -- WM8960 ALSA SoC Audio driver
3 *
4 * Copyright 2007-11 Wolfson Microelectronics, plc
5 *
6 * Author: Liam Girdwood
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/pm.h>
18 #include <linux/clk.h>
19 #include <linux/i2c.h>
20 #include <linux/slab.h>
21 #include <sound/core.h>
22 #include <sound/pcm.h>
23 #include <sound/pcm_params.h>
24 #include <sound/soc.h>
25 #include <sound/initval.h>
26 #include <sound/tlv.h>
27 #include <sound/wm8960.h>
28
29 #include "wm8960.h"
30
31 /* R25 - Power 1 */
32 #define WM8960_VMID_MASK 0x180
33 #define WM8960_VREF 0x40
34
35 /* R26 - Power 2 */
36 #define WM8960_PWR2_LOUT1 0x40
37 #define WM8960_PWR2_ROUT1 0x20
38 #define WM8960_PWR2_OUT3 0x02
39
40 /* R28 - Anti-pop 1 */
41 #define WM8960_POBCTRL 0x80
42 #define WM8960_BUFDCOPEN 0x10
43 #define WM8960_BUFIOEN 0x08
44 #define WM8960_SOFT_ST 0x04
45 #define WM8960_HPSTBY 0x01
46
47 /* R29 - Anti-pop 2 */
48 #define WM8960_DISOP 0x40
49 #define WM8960_DRES_MASK 0x30
50
51 static bool is_pll_freq_available(unsigned int source, unsigned int target);
52 static int wm8960_set_pll(struct snd_soc_codec *codec,
53 unsigned int freq_in, unsigned int freq_out);
54 /*
55 * wm8960 register cache
56 * We can't read the WM8960 register space when we are
57 * using 2 wire for device control, so we cache them instead.
58 */
59 static const struct reg_default wm8960_reg_defaults[] = {
60 { 0x0, 0x00a7 },
61 { 0x1, 0x00a7 },
62 { 0x2, 0x0000 },
63 { 0x3, 0x0000 },
64 { 0x4, 0x0000 },
65 { 0x5, 0x0008 },
66 { 0x6, 0x0000 },
67 { 0x7, 0x000a },
68 { 0x8, 0x01c0 },
69 { 0x9, 0x0000 },
70 { 0xa, 0x00ff },
71 { 0xb, 0x00ff },
72
73 { 0x10, 0x0000 },
74 { 0x11, 0x007b },
75 { 0x12, 0x0100 },
76 { 0x13, 0x0032 },
77 { 0x14, 0x0000 },
78 { 0x15, 0x00c3 },
79 { 0x16, 0x00c3 },
80 { 0x17, 0x01c0 },
81 { 0x18, 0x0000 },
82 { 0x19, 0x0000 },
83 { 0x1a, 0x0000 },
84 { 0x1b, 0x0000 },
85 { 0x1c, 0x0000 },
86 { 0x1d, 0x0000 },
87
88 { 0x20, 0x0100 },
89 { 0x21, 0x0100 },
90 { 0x22, 0x0050 },
91
92 { 0x25, 0x0050 },
93 { 0x26, 0x0000 },
94 { 0x27, 0x0000 },
95 { 0x28, 0x0000 },
96 { 0x29, 0x0000 },
97 { 0x2a, 0x0040 },
98 { 0x2b, 0x0000 },
99 { 0x2c, 0x0000 },
100 { 0x2d, 0x0050 },
101 { 0x2e, 0x0050 },
102 { 0x2f, 0x0000 },
103 { 0x30, 0x0002 },
104 { 0x31, 0x0037 },
105
106 { 0x33, 0x0080 },
107 { 0x34, 0x0008 },
108 { 0x35, 0x0031 },
109 { 0x36, 0x0026 },
110 { 0x37, 0x00e9 },
111 };
112
113 static bool wm8960_volatile(struct device *dev, unsigned int reg)
114 {
115 switch (reg) {
116 case WM8960_RESET:
117 return true;
118 default:
119 return false;
120 }
121 }
122
123 struct wm8960_priv {
124 struct clk *mclk;
125 struct regmap *regmap;
126 int (*set_bias_level)(struct snd_soc_codec *,
127 enum snd_soc_bias_level level);
128 struct snd_soc_dapm_widget *lout1;
129 struct snd_soc_dapm_widget *rout1;
130 struct snd_soc_dapm_widget *out3;
131 bool deemph;
132 int lrclk;
133 int bclk;
134 int sysclk;
135 int clk_id;
136 int freq_in;
137 bool is_stream_in_use[2];
138 struct wm8960_data pdata;
139 };
140
141 #define wm8960_reset(c) regmap_write(c, WM8960_RESET, 0)
142
143 /* enumerated controls */
144 static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
145 "Right Inverted", "Stereo Inversion"};
146 static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
147 static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
148 static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
149 static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
150 static const char *wm8960_adc_data_output_sel[] = {
151 "Left Data = Left ADC; Right Data = Right ADC",
152 "Left Data = Left ADC; Right Data = Left ADC",
153 "Left Data = Right ADC; Right Data = Right ADC",
154 "Left Data = Right ADC; Right Data = Left ADC",
155 };
156 static const char *wm8960_dmonomix[] = {"Stereo", "Mono"};
157
158 static const struct soc_enum wm8960_enum[] = {
159 SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
160 SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
161 SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
162 SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
163 SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
164 SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
165 SOC_ENUM_SINGLE(WM8960_ADDCTL1, 2, 4, wm8960_adc_data_output_sel),
166 SOC_ENUM_SINGLE(WM8960_ADDCTL1, 4, 2, wm8960_dmonomix),
167 };
168
169 static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
170
171 static int wm8960_set_deemph(struct snd_soc_codec *codec)
172 {
173 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
174 int val, i, best;
175
176 /* If we're using deemphasis select the nearest available sample
177 * rate.
178 */
179 if (wm8960->deemph) {
180 best = 1;
181 for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
182 if (abs(deemph_settings[i] - wm8960->lrclk) <
183 abs(deemph_settings[best] - wm8960->lrclk))
184 best = i;
185 }
186
187 val = best << 1;
188 } else {
189 val = 0;
190 }
191
192 dev_dbg(codec->dev, "Set deemphasis %d\n", val);
193
194 return snd_soc_update_bits(codec, WM8960_DACCTL1,
195 0x6, val);
196 }
197
198 static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
199 struct snd_ctl_elem_value *ucontrol)
200 {
201 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
202 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
203
204 ucontrol->value.integer.value[0] = wm8960->deemph;
205 return 0;
206 }
207
208 static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
209 struct snd_ctl_elem_value *ucontrol)
210 {
211 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
212 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
213 unsigned int deemph = ucontrol->value.integer.value[0];
214
215 if (deemph > 1)
216 return -EINVAL;
217
218 wm8960->deemph = deemph;
219
220 return wm8960_set_deemph(codec);
221 }
222
223 static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
224 static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1725, 75, 0);
225 static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
226 static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
227 static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
228 static const DECLARE_TLV_DB_SCALE(lineinboost_tlv, -1500, 300, 1);
229 static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(micboost_tlv,
230 0, 1, TLV_DB_SCALE_ITEM(0, 1300, 0),
231 2, 3, TLV_DB_SCALE_ITEM(2000, 900, 0),
232 );
233
234 static const struct snd_kcontrol_new wm8960_snd_controls[] = {
235 SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
236 0, 63, 0, inpga_tlv),
237 SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
238 6, 1, 0),
239 SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
240 7, 1, 1),
241
242 SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT3 Volume",
243 WM8960_INBMIX1, 4, 7, 0, lineinboost_tlv),
244 SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT2 Volume",
245 WM8960_INBMIX1, 1, 7, 0, lineinboost_tlv),
246 SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT3 Volume",
247 WM8960_INBMIX2, 4, 7, 0, lineinboost_tlv),
248 SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT2 Volume",
249 WM8960_INBMIX2, 1, 7, 0, lineinboost_tlv),
250 SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT1 Volume",
251 WM8960_RINPATH, 4, 3, 0, micboost_tlv),
252 SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT1 Volume",
253 WM8960_LINPATH, 4, 3, 0, micboost_tlv),
254
255 SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
256 0, 255, 0, dac_tlv),
257
258 SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
259 0, 127, 0, out_tlv),
260 SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
261 7, 1, 0),
262
263 SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
264 0, 127, 0, out_tlv),
265 SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
266 7, 1, 0),
267 SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
268 SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
269
270 SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
271 SOC_ENUM("ADC Polarity", wm8960_enum[0]),
272 SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
273
274 SOC_ENUM("DAC Polarity", wm8960_enum[1]),
275 SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
276 wm8960_get_deemph, wm8960_put_deemph),
277
278 SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
279 SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
280 SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
281 SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
282
283 SOC_ENUM("ALC Function", wm8960_enum[4]),
284 SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
285 SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
286 SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
287 SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
288 SOC_ENUM("ALC Mode", wm8960_enum[5]),
289 SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
290 SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
291
292 SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
293 SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
294
295 SOC_DOUBLE_R_TLV("ADC PCM Capture Volume", WM8960_LADC, WM8960_RADC,
296 0, 255, 0, adc_tlv),
297
298 SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
299 WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
300 SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
301 WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
302 SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
303 WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
304 SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
305 WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
306
307 SOC_ENUM("ADC Data Output Select", wm8960_enum[6]),
308 SOC_ENUM("DAC Mono Mix", wm8960_enum[7]),
309 };
310
311 static const struct snd_kcontrol_new wm8960_lin_boost[] = {
312 SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
313 SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
314 SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
315 };
316
317 static const struct snd_kcontrol_new wm8960_lin[] = {
318 SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
319 };
320
321 static const struct snd_kcontrol_new wm8960_rin_boost[] = {
322 SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
323 SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
324 SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
325 };
326
327 static const struct snd_kcontrol_new wm8960_rin[] = {
328 SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
329 };
330
331 static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
332 SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
333 SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
334 SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
335 };
336
337 static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
338 SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
339 SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
340 SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
341 };
342
343 static const struct snd_kcontrol_new wm8960_mono_out[] = {
344 SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
345 SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
346 };
347
348 static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
349 SND_SOC_DAPM_INPUT("LINPUT1"),
350 SND_SOC_DAPM_INPUT("RINPUT1"),
351 SND_SOC_DAPM_INPUT("LINPUT2"),
352 SND_SOC_DAPM_INPUT("RINPUT2"),
353 SND_SOC_DAPM_INPUT("LINPUT3"),
354 SND_SOC_DAPM_INPUT("RINPUT3"),
355
356 SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0),
357
358 SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
359 wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
360 SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
361 wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
362
363 SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
364 wm8960_lin, ARRAY_SIZE(wm8960_lin)),
365 SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
366 wm8960_rin, ARRAY_SIZE(wm8960_rin)),
367
368 SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER1, 3, 0),
369 SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER1, 2, 0),
370
371 SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
372 SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
373
374 SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
375 &wm8960_loutput_mixer[0],
376 ARRAY_SIZE(wm8960_loutput_mixer)),
377 SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
378 &wm8960_routput_mixer[0],
379 ARRAY_SIZE(wm8960_routput_mixer)),
380
381 SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
382 SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
383
384 SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
385 SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
386
387 SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
388 SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
389
390 SND_SOC_DAPM_OUTPUT("SPK_LP"),
391 SND_SOC_DAPM_OUTPUT("SPK_LN"),
392 SND_SOC_DAPM_OUTPUT("HP_L"),
393 SND_SOC_DAPM_OUTPUT("HP_R"),
394 SND_SOC_DAPM_OUTPUT("SPK_RP"),
395 SND_SOC_DAPM_OUTPUT("SPK_RN"),
396 SND_SOC_DAPM_OUTPUT("OUT3"),
397 };
398
399 static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
400 SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
401 &wm8960_mono_out[0],
402 ARRAY_SIZE(wm8960_mono_out)),
403 };
404
405 /* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
406 static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
407 SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
408 };
409
410 static const struct snd_soc_dapm_route audio_paths[] = {
411 { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
412 { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
413 { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
414
415 { "Left Input Mixer", "Boost Switch", "Left Boost Mixer" },
416 { "Left Input Mixer", "Boost Switch", "LINPUT1" }, /* Really Boost Switch */
417 { "Left Input Mixer", NULL, "LINPUT2" },
418 { "Left Input Mixer", NULL, "LINPUT3" },
419
420 { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
421 { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
422 { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
423
424 { "Right Input Mixer", "Boost Switch", "Right Boost Mixer" },
425 { "Right Input Mixer", "Boost Switch", "RINPUT1" }, /* Really Boost Switch */
426 { "Right Input Mixer", NULL, "RINPUT2" },
427 { "Right Input Mixer", NULL, "RINPUT3" },
428
429 { "Left ADC", NULL, "Left Input Mixer" },
430 { "Right ADC", NULL, "Right Input Mixer" },
431
432 { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
433 { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer" },
434 { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
435
436 { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
437 { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" },
438 { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
439
440 { "LOUT1 PGA", NULL, "Left Output Mixer" },
441 { "ROUT1 PGA", NULL, "Right Output Mixer" },
442
443 { "HP_L", NULL, "LOUT1 PGA" },
444 { "HP_R", NULL, "ROUT1 PGA" },
445
446 { "Left Speaker PGA", NULL, "Left Output Mixer" },
447 { "Right Speaker PGA", NULL, "Right Output Mixer" },
448
449 { "Left Speaker Output", NULL, "Left Speaker PGA" },
450 { "Right Speaker Output", NULL, "Right Speaker PGA" },
451
452 { "SPK_LN", NULL, "Left Speaker Output" },
453 { "SPK_LP", NULL, "Left Speaker Output" },
454 { "SPK_RN", NULL, "Right Speaker Output" },
455 { "SPK_RP", NULL, "Right Speaker Output" },
456 };
457
458 static const struct snd_soc_dapm_route audio_paths_out3[] = {
459 { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
460 { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
461
462 { "OUT3", NULL, "Mono Output Mixer", }
463 };
464
465 static const struct snd_soc_dapm_route audio_paths_capless[] = {
466 { "HP_L", NULL, "OUT3 VMID" },
467 { "HP_R", NULL, "OUT3 VMID" },
468
469 { "OUT3 VMID", NULL, "Left Output Mixer" },
470 { "OUT3 VMID", NULL, "Right Output Mixer" },
471 };
472
473 static int wm8960_add_widgets(struct snd_soc_codec *codec)
474 {
475 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
476 struct wm8960_data *pdata = &wm8960->pdata;
477 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
478 struct snd_soc_dapm_widget *w;
479
480 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
481 ARRAY_SIZE(wm8960_dapm_widgets));
482
483 snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
484
485 /* In capless mode OUT3 is used to provide VMID for the
486 * headphone outputs, otherwise it is used as a mono mixer.
487 */
488 if (pdata && pdata->capless) {
489 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
490 ARRAY_SIZE(wm8960_dapm_widgets_capless));
491
492 snd_soc_dapm_add_routes(dapm, audio_paths_capless,
493 ARRAY_SIZE(audio_paths_capless));
494 } else {
495 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
496 ARRAY_SIZE(wm8960_dapm_widgets_out3));
497
498 snd_soc_dapm_add_routes(dapm, audio_paths_out3,
499 ARRAY_SIZE(audio_paths_out3));
500 }
501
502 /* We need to power up the headphone output stage out of
503 * sequence for capless mode. To save scanning the widget
504 * list each time to find the desired power state do so now
505 * and save the result.
506 */
507 list_for_each_entry(w, &codec->component.card->widgets, list) {
508 if (w->dapm != dapm)
509 continue;
510 if (strcmp(w->name, "LOUT1 PGA") == 0)
511 wm8960->lout1 = w;
512 if (strcmp(w->name, "ROUT1 PGA") == 0)
513 wm8960->rout1 = w;
514 if (strcmp(w->name, "OUT3 VMID") == 0)
515 wm8960->out3 = w;
516 }
517
518 return 0;
519 }
520
521 static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
522 unsigned int fmt)
523 {
524 struct snd_soc_codec *codec = codec_dai->codec;
525 u16 iface = 0;
526
527 /* set master/slave audio interface */
528 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
529 case SND_SOC_DAIFMT_CBM_CFM:
530 iface |= 0x0040;
531 break;
532 case SND_SOC_DAIFMT_CBS_CFS:
533 break;
534 default:
535 return -EINVAL;
536 }
537
538 /* interface format */
539 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
540 case SND_SOC_DAIFMT_I2S:
541 iface |= 0x0002;
542 break;
543 case SND_SOC_DAIFMT_RIGHT_J:
544 break;
545 case SND_SOC_DAIFMT_LEFT_J:
546 iface |= 0x0001;
547 break;
548 case SND_SOC_DAIFMT_DSP_A:
549 iface |= 0x0003;
550 break;
551 case SND_SOC_DAIFMT_DSP_B:
552 iface |= 0x0013;
553 break;
554 default:
555 return -EINVAL;
556 }
557
558 /* clock inversion */
559 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
560 case SND_SOC_DAIFMT_NB_NF:
561 break;
562 case SND_SOC_DAIFMT_IB_IF:
563 iface |= 0x0090;
564 break;
565 case SND_SOC_DAIFMT_IB_NF:
566 iface |= 0x0080;
567 break;
568 case SND_SOC_DAIFMT_NB_IF:
569 iface |= 0x0010;
570 break;
571 default:
572 return -EINVAL;
573 }
574
575 /* set iface */
576 snd_soc_write(codec, WM8960_IFACE1, iface);
577 return 0;
578 }
579
580 static struct {
581 int rate;
582 unsigned int val;
583 } alc_rates[] = {
584 { 48000, 0 },
585 { 44100, 0 },
586 { 32000, 1 },
587 { 22050, 2 },
588 { 24000, 2 },
589 { 16000, 3 },
590 { 11025, 4 },
591 { 12000, 4 },
592 { 8000, 5 },
593 };
594
595 /* -1 for reserved value */
596 static const int sysclk_divs[] = { 1, -1, 2, -1 };
597
598 /* Multiply 256 for internal 256 div */
599 static const int dac_divs[] = { 256, 384, 512, 768, 1024, 1408, 1536 };
600
601 /* Multiply 10 to eliminate decimials */
602 static const int bclk_divs[] = {
603 10, 15, 20, 30, 40, 55, 60, 80, 110,
604 120, 160, 220, 240, 320, 320, 320
605 };
606
607 /**
608 * wm8960_configure_sysclk - checks if there is a sysclk frequency available
609 * The sysclk must be chosen such that:
610 * - sysclk = MCLK / sysclk_divs
611 * - lrclk = sysclk / dac_divs
612 * - 10 * bclk = sysclk / bclk_divs
613 *
614 * If we cannot find an exact match for (sysclk, lrclk, bclk)
615 * triplet, we relax the bclk such that bclk is chosen as the
616 * closest available frequency greater than expected bclk.
617 *
618 * @wm8960_priv: wm8960 codec private data
619 * @mclk: MCLK used to derive sysclk
620 * @sysclk_idx: sysclk_divs index for found sysclk
621 * @dac_idx: dac_divs index for found lrclk
622 * @bclk_idx: bclk_divs index for found bclk
623 *
624 * Returns:
625 * -1, in case no sysclk frequency available found
626 * >=0, in case we could derive bclk and lrclk from sysclk using
627 * (@sysclk_idx, @dac_idx, @bclk_idx) dividers
628 */
629 static
630 int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk,
631 int *sysclk_idx, int *dac_idx, int *bclk_idx)
632 {
633 int sysclk, bclk, lrclk;
634 int i, j, k;
635 int diff, closest = mclk;
636
637 /* marker for no match */
638 *bclk_idx = -1;
639
640 bclk = wm8960->bclk;
641 lrclk = wm8960->lrclk;
642
643 /* check if the sysclk frequency is available. */
644 for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
645 if (sysclk_divs[i] == -1)
646 continue;
647 sysclk = mclk / sysclk_divs[i];
648 for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
649 if (sysclk != dac_divs[j] * lrclk)
650 continue;
651 for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
652 diff = sysclk - bclk * bclk_divs[k] / 10;
653 if (diff == 0) {
654 *sysclk_idx = i;
655 *dac_idx = j;
656 *bclk_idx = k;
657 break;
658 }
659 if (diff > 0 && closest > diff) {
660 *sysclk_idx = i;
661 *dac_idx = j;
662 *bclk_idx = k;
663 closest = diff;
664 }
665 }
666 if (k != ARRAY_SIZE(bclk_divs))
667 break;
668 }
669 if (j != ARRAY_SIZE(dac_divs))
670 break;
671 }
672 return *bclk_idx;
673 }
674
675 /**
676 * wm8960_configure_pll - checks if there is a PLL out frequency available
677 * The PLL out frequency must be chosen such that:
678 * - sysclk = lrclk * dac_divs
679 * - freq_out = sysclk * sysclk_divs
680 * - 10 * sysclk = bclk * bclk_divs
681 *
682 * If we cannot find an exact match for (sysclk, lrclk, bclk)
683 * triplet, we relax the bclk such that bclk is chosen as the
684 * closest available frequency greater than expected bclk.
685 *
686 * @codec: codec structure
687 * @freq_in: input frequency used to derive freq out via PLL
688 * @sysclk_idx: sysclk_divs index for found sysclk
689 * @dac_idx: dac_divs index for found lrclk
690 * @bclk_idx: bclk_divs index for found bclk
691 *
692 * Returns:
693 * < 0, in case no PLL frequency out available was found
694 * >=0, in case we could derive bclk, lrclk, sysclk from PLL out using
695 * (@sysclk_idx, @dac_idx, @bclk_idx) dividers
696 */
697 static
698 int wm8960_configure_pll(struct snd_soc_codec *codec, int freq_in,
699 int *sysclk_idx, int *dac_idx, int *bclk_idx)
700 {
701 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
702 int sysclk, bclk, lrclk, freq_out;
703 int diff, closest, best_freq_out;
704 int i, j, k;
705
706 bclk = wm8960->bclk;
707 lrclk = wm8960->lrclk;
708 closest = freq_in;
709
710 best_freq_out = -EINVAL;
711 *sysclk_idx = *dac_idx = *bclk_idx = -1;
712
713 for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
714 if (sysclk_divs[i] == -1)
715 continue;
716 for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
717 sysclk = lrclk * dac_divs[j];
718 freq_out = sysclk * sysclk_divs[i];
719
720 for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
721 if (!is_pll_freq_available(freq_in, freq_out))
722 continue;
723
724 diff = sysclk - bclk * bclk_divs[k] / 10;
725 if (diff == 0) {
726 *sysclk_idx = i;
727 *dac_idx = j;
728 *bclk_idx = k;
729 return freq_out;
730 }
731 if (diff > 0 && closest > diff) {
732 *sysclk_idx = i;
733 *dac_idx = j;
734 *bclk_idx = k;
735 closest = diff;
736 best_freq_out = freq_out;
737 }
738 }
739 }
740 }
741
742 return best_freq_out;
743 }
744 static int wm8960_configure_clocking(struct snd_soc_codec *codec)
745 {
746 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
747 int freq_out, freq_in;
748 u16 iface1 = snd_soc_read(codec, WM8960_IFACE1);
749 int i, j, k;
750 int ret;
751
752 if (!(iface1 & (1<<6))) {
753 dev_dbg(codec->dev,
754 "Codec is slave mode, no need to configure clock\n");
755 return 0;
756 }
757
758 if (wm8960->clk_id != WM8960_SYSCLK_MCLK && !wm8960->freq_in) {
759 dev_err(codec->dev, "No MCLK configured\n");
760 return -EINVAL;
761 }
762
763 freq_in = wm8960->freq_in;
764 /*
765 * If it's sysclk auto mode, check if the MCLK can provide sysclk or
766 * not. If MCLK can provide sysclk, using MCLK to provide sysclk
767 * directly. Otherwise, auto select a available pll out frequency
768 * and set PLL.
769 */
770 if (wm8960->clk_id == WM8960_SYSCLK_AUTO) {
771 /* disable the PLL and using MCLK to provide sysclk */
772 wm8960_set_pll(codec, 0, 0);
773 freq_out = freq_in;
774 } else if (wm8960->sysclk) {
775 freq_out = wm8960->sysclk;
776 } else {
777 dev_err(codec->dev, "No SYSCLK configured\n");
778 return -EINVAL;
779 }
780
781 if (wm8960->clk_id != WM8960_SYSCLK_PLL) {
782 ret = wm8960_configure_sysclk(wm8960, freq_out, &i, &j, &k);
783 if (ret >= 0) {
784 goto configure_clock;
785 } else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
786 dev_err(codec->dev, "failed to configure clock\n");
787 return -EINVAL;
788 }
789 }
790
791 freq_out = wm8960_configure_pll(codec, freq_in, &i, &j, &k);
792 if (freq_out < 0) {
793 dev_err(codec->dev, "failed to configure clock via PLL\n");
794 return freq_out;
795 }
796 wm8960_set_pll(codec, freq_in, freq_out);
797
798 configure_clock:
799 /* configure sysclk clock */
800 snd_soc_update_bits(codec, WM8960_CLOCK1, 3 << 1, i << 1);
801
802 /* configure frame clock */
803 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x7 << 3, j << 3);
804 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x7 << 6, j << 6);
805
806 /* configure bit clock */
807 snd_soc_update_bits(codec, WM8960_CLOCK2, 0xf, k);
808
809 return 0;
810 }
811
812 static int wm8960_hw_params(struct snd_pcm_substream *substream,
813 struct snd_pcm_hw_params *params,
814 struct snd_soc_dai *dai)
815 {
816 struct snd_soc_codec *codec = dai->codec;
817 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
818 u16 iface = snd_soc_read(codec, WM8960_IFACE1) & 0xfff3;
819 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
820 int i;
821
822 wm8960->bclk = snd_soc_params_to_bclk(params);
823 if (params_channels(params) == 1)
824 wm8960->bclk *= 2;
825
826 /* bit size */
827 switch (params_width(params)) {
828 case 16:
829 break;
830 case 20:
831 iface |= 0x0004;
832 break;
833 case 24:
834 iface |= 0x0008;
835 break;
836 case 32:
837 /* right justify mode does not support 32 word length */
838 if ((iface & 0x3) != 0) {
839 iface |= 0x000c;
840 break;
841 }
842 default:
843 dev_err(codec->dev, "unsupported width %d\n",
844 params_width(params));
845 return -EINVAL;
846 }
847
848 wm8960->lrclk = params_rate(params);
849 /* Update filters for the new rate */
850 if (tx) {
851 wm8960_set_deemph(codec);
852 } else {
853 for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
854 if (alc_rates[i].rate == params_rate(params))
855 snd_soc_update_bits(codec,
856 WM8960_ADDCTL3, 0x7,
857 alc_rates[i].val);
858 }
859
860 /* set iface */
861 snd_soc_write(codec, WM8960_IFACE1, iface);
862
863 wm8960->is_stream_in_use[tx] = true;
864
865 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_ON &&
866 !wm8960->is_stream_in_use[!tx])
867 return wm8960_configure_clocking(codec);
868
869 return 0;
870 }
871
872 static int wm8960_hw_free(struct snd_pcm_substream *substream,
873 struct snd_soc_dai *dai)
874 {
875 struct snd_soc_codec *codec = dai->codec;
876 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
877 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
878
879 wm8960->is_stream_in_use[tx] = false;
880
881 return 0;
882 }
883
884 static int wm8960_mute(struct snd_soc_dai *dai, int mute)
885 {
886 struct snd_soc_codec *codec = dai->codec;
887
888 if (mute)
889 snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0x8);
890 else
891 snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0);
892 return 0;
893 }
894
895 static int wm8960_set_bias_level_out3(struct snd_soc_codec *codec,
896 enum snd_soc_bias_level level)
897 {
898 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
899 u16 pm2 = snd_soc_read(codec, WM8960_POWER2);
900 int ret;
901
902 switch (level) {
903 case SND_SOC_BIAS_ON:
904 break;
905
906 case SND_SOC_BIAS_PREPARE:
907 switch (snd_soc_codec_get_bias_level(codec)) {
908 case SND_SOC_BIAS_STANDBY:
909 if (!IS_ERR(wm8960->mclk)) {
910 ret = clk_prepare_enable(wm8960->mclk);
911 if (ret) {
912 dev_err(codec->dev,
913 "Failed to enable MCLK: %d\n",
914 ret);
915 return ret;
916 }
917 }
918
919 ret = wm8960_configure_clocking(codec);
920 if (ret)
921 return ret;
922
923 /* Set VMID to 2x50k */
924 snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x80);
925 break;
926
927 case SND_SOC_BIAS_ON:
928 /*
929 * If it's sysclk auto mode, and the pll is enabled,
930 * disable the pll
931 */
932 if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
933 wm8960_set_pll(codec, 0, 0);
934
935 if (!IS_ERR(wm8960->mclk))
936 clk_disable_unprepare(wm8960->mclk);
937 break;
938
939 default:
940 break;
941 }
942
943 break;
944
945 case SND_SOC_BIAS_STANDBY:
946 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
947 regcache_sync(wm8960->regmap);
948
949 /* Enable anti-pop features */
950 snd_soc_write(codec, WM8960_APOP1,
951 WM8960_POBCTRL | WM8960_SOFT_ST |
952 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
953
954 /* Enable & ramp VMID at 2x50k */
955 snd_soc_update_bits(codec, WM8960_POWER1, 0x80, 0x80);
956 msleep(100);
957
958 /* Enable VREF */
959 snd_soc_update_bits(codec, WM8960_POWER1, WM8960_VREF,
960 WM8960_VREF);
961
962 /* Disable anti-pop features */
963 snd_soc_write(codec, WM8960_APOP1, WM8960_BUFIOEN);
964 }
965
966 /* Set VMID to 2x250k */
967 snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x100);
968 break;
969
970 case SND_SOC_BIAS_OFF:
971 /* Enable anti-pop features */
972 snd_soc_write(codec, WM8960_APOP1,
973 WM8960_POBCTRL | WM8960_SOFT_ST |
974 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
975
976 /* Disable VMID and VREF, let them discharge */
977 snd_soc_write(codec, WM8960_POWER1, 0);
978 msleep(600);
979 break;
980 }
981
982 return 0;
983 }
984
985 static int wm8960_set_bias_level_capless(struct snd_soc_codec *codec,
986 enum snd_soc_bias_level level)
987 {
988 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
989 u16 pm2 = snd_soc_read(codec, WM8960_POWER2);
990 int reg, ret;
991
992 switch (level) {
993 case SND_SOC_BIAS_ON:
994 break;
995
996 case SND_SOC_BIAS_PREPARE:
997 switch (snd_soc_codec_get_bias_level(codec)) {
998 case SND_SOC_BIAS_STANDBY:
999 /* Enable anti pop mode */
1000 snd_soc_update_bits(codec, WM8960_APOP1,
1001 WM8960_POBCTRL | WM8960_SOFT_ST |
1002 WM8960_BUFDCOPEN,
1003 WM8960_POBCTRL | WM8960_SOFT_ST |
1004 WM8960_BUFDCOPEN);
1005
1006 /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
1007 reg = 0;
1008 if (wm8960->lout1 && wm8960->lout1->power)
1009 reg |= WM8960_PWR2_LOUT1;
1010 if (wm8960->rout1 && wm8960->rout1->power)
1011 reg |= WM8960_PWR2_ROUT1;
1012 if (wm8960->out3 && wm8960->out3->power)
1013 reg |= WM8960_PWR2_OUT3;
1014 snd_soc_update_bits(codec, WM8960_POWER2,
1015 WM8960_PWR2_LOUT1 |
1016 WM8960_PWR2_ROUT1 |
1017 WM8960_PWR2_OUT3, reg);
1018
1019 /* Enable VMID at 2*50k */
1020 snd_soc_update_bits(codec, WM8960_POWER1,
1021 WM8960_VMID_MASK, 0x80);
1022
1023 /* Ramp */
1024 msleep(100);
1025
1026 /* Enable VREF */
1027 snd_soc_update_bits(codec, WM8960_POWER1,
1028 WM8960_VREF, WM8960_VREF);
1029
1030 msleep(100);
1031
1032 if (!IS_ERR(wm8960->mclk)) {
1033 ret = clk_prepare_enable(wm8960->mclk);
1034 if (ret) {
1035 dev_err(codec->dev,
1036 "Failed to enable MCLK: %d\n",
1037 ret);
1038 return ret;
1039 }
1040 }
1041
1042 ret = wm8960_configure_clocking(codec);
1043 if (ret)
1044 return ret;
1045
1046 break;
1047
1048 case SND_SOC_BIAS_ON:
1049 /*
1050 * If it's sysclk auto mode, and the pll is enabled,
1051 * disable the pll
1052 */
1053 if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
1054 wm8960_set_pll(codec, 0, 0);
1055
1056 if (!IS_ERR(wm8960->mclk))
1057 clk_disable_unprepare(wm8960->mclk);
1058
1059 /* Enable anti-pop mode */
1060 snd_soc_update_bits(codec, WM8960_APOP1,
1061 WM8960_POBCTRL | WM8960_SOFT_ST |
1062 WM8960_BUFDCOPEN,
1063 WM8960_POBCTRL | WM8960_SOFT_ST |
1064 WM8960_BUFDCOPEN);
1065
1066 /* Disable VMID and VREF */
1067 snd_soc_update_bits(codec, WM8960_POWER1,
1068 WM8960_VREF | WM8960_VMID_MASK, 0);
1069 break;
1070
1071 case SND_SOC_BIAS_OFF:
1072 regcache_sync(wm8960->regmap);
1073 break;
1074 default:
1075 break;
1076 }
1077 break;
1078
1079 case SND_SOC_BIAS_STANDBY:
1080 switch (snd_soc_codec_get_bias_level(codec)) {
1081 case SND_SOC_BIAS_PREPARE:
1082 /* Disable HP discharge */
1083 snd_soc_update_bits(codec, WM8960_APOP2,
1084 WM8960_DISOP | WM8960_DRES_MASK,
1085 0);
1086
1087 /* Disable anti-pop features */
1088 snd_soc_update_bits(codec, WM8960_APOP1,
1089 WM8960_POBCTRL | WM8960_SOFT_ST |
1090 WM8960_BUFDCOPEN,
1091 WM8960_POBCTRL | WM8960_SOFT_ST |
1092 WM8960_BUFDCOPEN);
1093 break;
1094
1095 default:
1096 break;
1097 }
1098 break;
1099
1100 case SND_SOC_BIAS_OFF:
1101 break;
1102 }
1103
1104 return 0;
1105 }
1106
1107 /* PLL divisors */
1108 struct _pll_div {
1109 u32 pre_div:1;
1110 u32 n:4;
1111 u32 k:24;
1112 };
1113
1114 static bool is_pll_freq_available(unsigned int source, unsigned int target)
1115 {
1116 unsigned int Ndiv;
1117
1118 if (source == 0 || target == 0)
1119 return false;
1120
1121 /* Scale up target to PLL operating frequency */
1122 target *= 4;
1123 Ndiv = target / source;
1124
1125 if (Ndiv < 6) {
1126 source >>= 1;
1127 Ndiv = target / source;
1128 }
1129
1130 if ((Ndiv < 6) || (Ndiv > 12))
1131 return false;
1132
1133 return true;
1134 }
1135
1136 /* The size in bits of the pll divide multiplied by 10
1137 * to allow rounding later */
1138 #define FIXED_PLL_SIZE ((1 << 24) * 10)
1139
1140 static int pll_factors(unsigned int source, unsigned int target,
1141 struct _pll_div *pll_div)
1142 {
1143 unsigned long long Kpart;
1144 unsigned int K, Ndiv, Nmod;
1145
1146 pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
1147
1148 /* Scale up target to PLL operating frequency */
1149 target *= 4;
1150
1151 Ndiv = target / source;
1152 if (Ndiv < 6) {
1153 source >>= 1;
1154 pll_div->pre_div = 1;
1155 Ndiv = target / source;
1156 } else
1157 pll_div->pre_div = 0;
1158
1159 if ((Ndiv < 6) || (Ndiv > 12)) {
1160 pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
1161 return -EINVAL;
1162 }
1163
1164 pll_div->n = Ndiv;
1165 Nmod = target % source;
1166 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
1167
1168 do_div(Kpart, source);
1169
1170 K = Kpart & 0xFFFFFFFF;
1171
1172 /* Check if we need to round */
1173 if ((K % 10) >= 5)
1174 K += 5;
1175
1176 /* Move down to proper range now rounding is done */
1177 K /= 10;
1178
1179 pll_div->k = K;
1180
1181 pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
1182 pll_div->n, pll_div->k, pll_div->pre_div);
1183
1184 return 0;
1185 }
1186
1187 static int wm8960_set_pll(struct snd_soc_codec *codec,
1188 unsigned int freq_in, unsigned int freq_out)
1189 {
1190 u16 reg;
1191 static struct _pll_div pll_div;
1192 int ret;
1193
1194 if (freq_in && freq_out) {
1195 ret = pll_factors(freq_in, freq_out, &pll_div);
1196 if (ret != 0)
1197 return ret;
1198 }
1199
1200 /* Disable the PLL: even if we are changing the frequency the
1201 * PLL needs to be disabled while we do so. */
1202 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0);
1203 snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0);
1204
1205 if (!freq_in || !freq_out)
1206 return 0;
1207
1208 reg = snd_soc_read(codec, WM8960_PLL1) & ~0x3f;
1209 reg |= pll_div.pre_div << 4;
1210 reg |= pll_div.n;
1211
1212 if (pll_div.k) {
1213 reg |= 0x20;
1214
1215 snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 16) & 0xff);
1216 snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 8) & 0xff);
1217 snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0xff);
1218 }
1219 snd_soc_write(codec, WM8960_PLL1, reg);
1220
1221 /* Turn it on */
1222 snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0x1);
1223 msleep(250);
1224 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0x1);
1225
1226 return 0;
1227 }
1228
1229 static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1230 int source, unsigned int freq_in, unsigned int freq_out)
1231 {
1232 struct snd_soc_codec *codec = codec_dai->codec;
1233 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
1234
1235 wm8960->freq_in = freq_in;
1236
1237 if (pll_id == WM8960_SYSCLK_AUTO)
1238 return 0;
1239
1240 return wm8960_set_pll(codec, freq_in, freq_out);
1241 }
1242
1243 static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1244 int div_id, int div)
1245 {
1246 struct snd_soc_codec *codec = codec_dai->codec;
1247 u16 reg;
1248
1249 switch (div_id) {
1250 case WM8960_SYSCLKDIV:
1251 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1f9;
1252 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
1253 break;
1254 case WM8960_DACDIV:
1255 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1c7;
1256 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
1257 break;
1258 case WM8960_OPCLKDIV:
1259 reg = snd_soc_read(codec, WM8960_PLL1) & 0x03f;
1260 snd_soc_write(codec, WM8960_PLL1, reg | div);
1261 break;
1262 case WM8960_DCLKDIV:
1263 reg = snd_soc_read(codec, WM8960_CLOCK2) & 0x03f;
1264 snd_soc_write(codec, WM8960_CLOCK2, reg | div);
1265 break;
1266 case WM8960_TOCLKSEL:
1267 reg = snd_soc_read(codec, WM8960_ADDCTL1) & 0x1fd;
1268 snd_soc_write(codec, WM8960_ADDCTL1, reg | div);
1269 break;
1270 default:
1271 return -EINVAL;
1272 }
1273
1274 return 0;
1275 }
1276
1277 static int wm8960_set_bias_level(struct snd_soc_codec *codec,
1278 enum snd_soc_bias_level level)
1279 {
1280 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
1281
1282 return wm8960->set_bias_level(codec, level);
1283 }
1284
1285 static int wm8960_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
1286 unsigned int freq, int dir)
1287 {
1288 struct snd_soc_codec *codec = dai->codec;
1289 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
1290
1291 switch (clk_id) {
1292 case WM8960_SYSCLK_MCLK:
1293 snd_soc_update_bits(codec, WM8960_CLOCK1,
1294 0x1, WM8960_SYSCLK_MCLK);
1295 break;
1296 case WM8960_SYSCLK_PLL:
1297 snd_soc_update_bits(codec, WM8960_CLOCK1,
1298 0x1, WM8960_SYSCLK_PLL);
1299 break;
1300 case WM8960_SYSCLK_AUTO:
1301 break;
1302 default:
1303 return -EINVAL;
1304 }
1305
1306 wm8960->sysclk = freq;
1307 wm8960->clk_id = clk_id;
1308
1309 return 0;
1310 }
1311
1312 #define WM8960_RATES SNDRV_PCM_RATE_8000_48000
1313
1314 #define WM8960_FORMATS \
1315 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1316 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1317
1318 static const struct snd_soc_dai_ops wm8960_dai_ops = {
1319 .hw_params = wm8960_hw_params,
1320 .hw_free = wm8960_hw_free,
1321 .digital_mute = wm8960_mute,
1322 .set_fmt = wm8960_set_dai_fmt,
1323 .set_clkdiv = wm8960_set_dai_clkdiv,
1324 .set_pll = wm8960_set_dai_pll,
1325 .set_sysclk = wm8960_set_dai_sysclk,
1326 };
1327
1328 static struct snd_soc_dai_driver wm8960_dai = {
1329 .name = "wm8960-hifi",
1330 .playback = {
1331 .stream_name = "Playback",
1332 .channels_min = 1,
1333 .channels_max = 2,
1334 .rates = WM8960_RATES,
1335 .formats = WM8960_FORMATS,},
1336 .capture = {
1337 .stream_name = "Capture",
1338 .channels_min = 1,
1339 .channels_max = 2,
1340 .rates = WM8960_RATES,
1341 .formats = WM8960_FORMATS,},
1342 .ops = &wm8960_dai_ops,
1343 .symmetric_rates = 1,
1344 };
1345
1346 static int wm8960_probe(struct snd_soc_codec *codec)
1347 {
1348 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
1349 struct wm8960_data *pdata = &wm8960->pdata;
1350
1351 if (pdata->capless)
1352 wm8960->set_bias_level = wm8960_set_bias_level_capless;
1353 else
1354 wm8960->set_bias_level = wm8960_set_bias_level_out3;
1355
1356 snd_soc_add_codec_controls(codec, wm8960_snd_controls,
1357 ARRAY_SIZE(wm8960_snd_controls));
1358 wm8960_add_widgets(codec);
1359
1360 return 0;
1361 }
1362
1363 static const struct snd_soc_codec_driver soc_codec_dev_wm8960 = {
1364 .probe = wm8960_probe,
1365 .set_bias_level = wm8960_set_bias_level,
1366 .suspend_bias_off = true,
1367 };
1368
1369 static const struct regmap_config wm8960_regmap = {
1370 .reg_bits = 7,
1371 .val_bits = 9,
1372 .max_register = WM8960_PLL4,
1373
1374 .reg_defaults = wm8960_reg_defaults,
1375 .num_reg_defaults = ARRAY_SIZE(wm8960_reg_defaults),
1376 .cache_type = REGCACHE_RBTREE,
1377
1378 .volatile_reg = wm8960_volatile,
1379 };
1380
1381 static void wm8960_set_pdata_from_of(struct i2c_client *i2c,
1382 struct wm8960_data *pdata)
1383 {
1384 const struct device_node *np = i2c->dev.of_node;
1385
1386 if (of_property_read_bool(np, "wlf,capless"))
1387 pdata->capless = true;
1388
1389 if (of_property_read_bool(np, "wlf,shared-lrclk"))
1390 pdata->shared_lrclk = true;
1391 }
1392
1393 static int wm8960_i2c_probe(struct i2c_client *i2c,
1394 const struct i2c_device_id *id)
1395 {
1396 struct wm8960_data *pdata = dev_get_platdata(&i2c->dev);
1397 struct wm8960_priv *wm8960;
1398 int ret;
1399
1400 wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv),
1401 GFP_KERNEL);
1402 if (wm8960 == NULL)
1403 return -ENOMEM;
1404
1405 wm8960->mclk = devm_clk_get(&i2c->dev, "mclk");
1406 if (IS_ERR(wm8960->mclk)) {
1407 if (PTR_ERR(wm8960->mclk) == -EPROBE_DEFER)
1408 return -EPROBE_DEFER;
1409 }
1410
1411 wm8960->regmap = devm_regmap_init_i2c(i2c, &wm8960_regmap);
1412 if (IS_ERR(wm8960->regmap))
1413 return PTR_ERR(wm8960->regmap);
1414
1415 if (pdata)
1416 memcpy(&wm8960->pdata, pdata, sizeof(struct wm8960_data));
1417 else if (i2c->dev.of_node)
1418 wm8960_set_pdata_from_of(i2c, &wm8960->pdata);
1419
1420 ret = wm8960_reset(wm8960->regmap);
1421 if (ret != 0) {
1422 dev_err(&i2c->dev, "Failed to issue reset\n");
1423 return ret;
1424 }
1425
1426 if (wm8960->pdata.shared_lrclk) {
1427 ret = regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2,
1428 0x4, 0x4);
1429 if (ret != 0) {
1430 dev_err(&i2c->dev, "Failed to enable LRCM: %d\n",
1431 ret);
1432 return ret;
1433 }
1434 }
1435
1436 /* Latch the update bits */
1437 regmap_update_bits(wm8960->regmap, WM8960_LINVOL, 0x100, 0x100);
1438 regmap_update_bits(wm8960->regmap, WM8960_RINVOL, 0x100, 0x100);
1439 regmap_update_bits(wm8960->regmap, WM8960_LADC, 0x100, 0x100);
1440 regmap_update_bits(wm8960->regmap, WM8960_RADC, 0x100, 0x100);
1441 regmap_update_bits(wm8960->regmap, WM8960_LDAC, 0x100, 0x100);
1442 regmap_update_bits(wm8960->regmap, WM8960_RDAC, 0x100, 0x100);
1443 regmap_update_bits(wm8960->regmap, WM8960_LOUT1, 0x100, 0x100);
1444 regmap_update_bits(wm8960->regmap, WM8960_ROUT1, 0x100, 0x100);
1445 regmap_update_bits(wm8960->regmap, WM8960_LOUT2, 0x100, 0x100);
1446 regmap_update_bits(wm8960->regmap, WM8960_ROUT2, 0x100, 0x100);
1447
1448 i2c_set_clientdata(i2c, wm8960);
1449
1450 ret = snd_soc_register_codec(&i2c->dev,
1451 &soc_codec_dev_wm8960, &wm8960_dai, 1);
1452
1453 return ret;
1454 }
1455
1456 static int wm8960_i2c_remove(struct i2c_client *client)
1457 {
1458 snd_soc_unregister_codec(&client->dev);
1459 return 0;
1460 }
1461
1462 static const struct i2c_device_id wm8960_i2c_id[] = {
1463 { "wm8960", 0 },
1464 { }
1465 };
1466 MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
1467
1468 static const struct of_device_id wm8960_of_match[] = {
1469 { .compatible = "wlf,wm8960", },
1470 { }
1471 };
1472 MODULE_DEVICE_TABLE(of, wm8960_of_match);
1473
1474 static struct i2c_driver wm8960_i2c_driver = {
1475 .driver = {
1476 .name = "wm8960",
1477 .of_match_table = wm8960_of_match,
1478 },
1479 .probe = wm8960_i2c_probe,
1480 .remove = wm8960_i2c_remove,
1481 .id_table = wm8960_i2c_id,
1482 };
1483
1484 module_i2c_driver(wm8960_i2c_driver);
1485
1486 MODULE_DESCRIPTION("ASoC WM8960 driver");
1487 MODULE_AUTHOR("Liam Girdwood");
1488 MODULE_LICENSE("GPL");
Linux with added FPC-III support