drm/amdgpu: Fix undue fallthroughs in golden registers initialization
[linux/fpc-iii.git] / arch / m68k / hp300 / time.c
blob749543b425a4b2c6b547485af5fe55c02583f933
1 /*
2 * linux/arch/m68k/hp300/time.c
4 * Copyright (C) 1998 Philip Blundell <philb@gnu.org>
6 * This file contains the HP300-specific time handling code.
7 */
9 #include <asm/ptrace.h>
10 #include <linux/types.h>
11 #include <linux/init.h>
12 #include <linux/sched.h>
13 #include <linux/kernel_stat.h>
14 #include <linux/interrupt.h>
15 #include <asm/machdep.h>
16 #include <asm/irq.h>
17 #include <asm/io.h>
18 #include <asm/traps.h>
19 #include <asm/blinken.h>
21 /* Clock hardware definitions */
23 #define CLOCKBASE 0xf05f8000
25 #define CLKCR1 0x1
26 #define CLKCR2 0x3
27 #define CLKCR3 CLKCR1
28 #define CLKSR CLKCR2
29 #define CLKMSB1 0x5
30 #define CLKMSB2 0x9
31 #define CLKMSB3 0xD
33 /* This is for machines which generate the exact clock. */
34 #define USECS_PER_JIFFY (1000000/HZ)
36 #define INTVAL ((10000 / 4) - 1)
38 static irqreturn_t hp300_tick(int irq, void *dev_id)
40 unsigned long tmp;
41 irq_handler_t vector = dev_id;
42 in_8(CLOCKBASE + CLKSR);
43 asm volatile ("movpw %1@(5),%0" : "=d" (tmp) : "a" (CLOCKBASE));
44 /* Turn off the network and SCSI leds */
45 blinken_leds(0, 0xe0);
46 return vector(irq, NULL);
49 u32 hp300_gettimeoffset(void)
51 /* Read current timer 1 value */
52 unsigned char lsb, msb1, msb2;
53 unsigned short ticks;
55 msb1 = in_8(CLOCKBASE + 5);
56 lsb = in_8(CLOCKBASE + 7);
57 msb2 = in_8(CLOCKBASE + 5);
58 if (msb1 != msb2)
59 /* A carry happened while we were reading. Read it again */
60 lsb = in_8(CLOCKBASE + 7);
61 ticks = INTVAL - ((msb2 << 8) | lsb);
62 return ((USECS_PER_JIFFY * ticks) / INTVAL) * 1000;
65 void __init hp300_sched_init(irq_handler_t vector)
67 out_8(CLOCKBASE + CLKCR2, 0x1); /* select CR1 */
68 out_8(CLOCKBASE + CLKCR1, 0x1); /* reset */
70 asm volatile(" movpw %0,%1@(5)" : : "d" (INTVAL), "a" (CLOCKBASE));
72 if (request_irq(IRQ_AUTO_6, hp300_tick, 0, "timer tick", vector))
73 pr_err("Couldn't register timer interrupt\n");
75 out_8(CLOCKBASE + CLKCR2, 0x1); /* select CR1 */
76 out_8(CLOCKBASE + CLKCR1, 0x40); /* enable irq */