2 * Copyright (C) 2012 ARM Ltd.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 #ifndef __ASM_SPINLOCK_H
17 #define __ASM_SPINLOCK_H
20 #include <asm/spinlock_types.h>
21 #include <asm/processor.h>
24 * Spinlock implementation.
26 * The memory barriers are implicit with the load-acquire and store-release
30 static inline void arch_spin_lock(arch_spinlock_t
*lock
)
33 arch_spinlock_t lockval
, newval
;
36 /* Atomically increment the next ticket. */
37 ARM64_LSE_ATOMIC_INSN(
39 " prfm pstl1strm, %3\n"
41 " add %w1, %w0, %w5\n"
42 " stxr %w2, %w1, %3\n"
46 " ldadda %w2, %w0, %3\n"
50 /* Did we get the lock? */
51 " eor %w1, %w0, %w0, ror #16\n"
54 * No: spin on the owner. Send a local event to avoid missing an
55 * unlock before the exclusive load.
60 " eor %w1, %w2, %w0, lsr #16\n"
62 /* We got the lock. Critical section starts here. */
64 : "=&r" (lockval
), "=&r" (newval
), "=&r" (tmp
), "+Q" (*lock
)
65 : "Q" (lock
->owner
), "I" (1 << TICKET_SHIFT
)
69 static inline int arch_spin_trylock(arch_spinlock_t
*lock
)
72 arch_spinlock_t lockval
;
74 asm volatile(ARM64_LSE_ATOMIC_INSN(
76 " prfm pstl1strm, %2\n"
78 " eor %w1, %w0, %w0, ror #16\n"
81 " stxr %w1, %w0, %2\n"
86 " eor %w1, %w0, %w0, ror #16\n"
89 " casa %w0, %w1, %2\n"
91 " eor %w1, %w1, %w0\n"
93 : "=&r" (lockval
), "=&r" (tmp
), "+Q" (*lock
)
94 : "I" (1 << TICKET_SHIFT
)
100 static inline void arch_spin_unlock(arch_spinlock_t
*lock
)
104 asm volatile(ARM64_LSE_ATOMIC_INSN(
107 " add %w1, %w1, #1\n"
113 : "=Q" (lock
->owner
), "=&r" (tmp
)
118 static inline int arch_spin_value_unlocked(arch_spinlock_t lock
)
120 return lock
.owner
== lock
.next
;
123 static inline int arch_spin_is_locked(arch_spinlock_t
*lock
)
125 return !arch_spin_value_unlocked(READ_ONCE(*lock
));
128 static inline int arch_spin_is_contended(arch_spinlock_t
*lock
)
130 arch_spinlock_t lockval
= READ_ONCE(*lock
);
131 return (lockval
.next
- lockval
.owner
) > 1;
133 #define arch_spin_is_contended arch_spin_is_contended
135 #include <asm/qrwlock.h>
137 /* See include/linux/spinlock.h */
138 #define smp_mb__after_spinlock() smp_mb()
140 #endif /* __ASM_SPINLOCK_H */