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Linux 4.18.10
[linux/fpc-iii.git] / arch / arm64 / net / bpf_jit_comp.c
bloba6fdaea07c6339cf2754d582765747ee5d8b2ff5
1 /*
2 * BPF JIT compiler for ARM64
3 *
4 * Copyright (C) 2014-2016 Zi Shen Lim <zlim.lnx@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
17 */
18
19 #define pr_fmt(fmt) "bpf_jit: " fmt
20
21 #include <linux/bpf.h>
22 #include <linux/filter.h>
23 #include <linux/printk.h>
24 #include <linux/slab.h>
25
26 #include <asm/byteorder.h>
27 #include <asm/cacheflush.h>
28 #include <asm/debug-monitors.h>
29 #include <asm/set_memory.h>
30
31 #include "bpf_jit.h"
32
33 #define TMP_REG_1 (MAX_BPF_JIT_REG + 0)
34 #define TMP_REG_2 (MAX_BPF_JIT_REG + 1)
35 #define TCALL_CNT (MAX_BPF_JIT_REG + 2)
36 #define TMP_REG_3 (MAX_BPF_JIT_REG + 3)
37
38 /* Map BPF registers to A64 registers */
39 static const int bpf2a64[] = {
40 /* return value from in-kernel function, and exit value from eBPF */
41 [BPF_REG_0] = A64_R(7),
42 /* arguments from eBPF program to in-kernel function */
43 [BPF_REG_1] = A64_R(0),
44 [BPF_REG_2] = A64_R(1),
45 [BPF_REG_3] = A64_R(2),
46 [BPF_REG_4] = A64_R(3),
47 [BPF_REG_5] = A64_R(4),
48 /* callee saved registers that in-kernel function will preserve */
49 [BPF_REG_6] = A64_R(19),
50 [BPF_REG_7] = A64_R(20),
51 [BPF_REG_8] = A64_R(21),
52 [BPF_REG_9] = A64_R(22),
53 /* read-only frame pointer to access stack */
54 [BPF_REG_FP] = A64_R(25),
55 /* temporary registers for internal BPF JIT */
56 [TMP_REG_1] = A64_R(10),
57 [TMP_REG_2] = A64_R(11),
58 [TMP_REG_3] = A64_R(12),
59 /* tail_call_cnt */
60 [TCALL_CNT] = A64_R(26),
61 /* temporary register for blinding constants */
62 [BPF_REG_AX] = A64_R(9),
63 };
64
65 struct jit_ctx {
66 const struct bpf_prog *prog;
67 int idx;
68 int epilogue_offset;
69 int *offset;
70 __le32 *image;
71 u32 stack_size;
72 };
73
74 static inline void emit(const u32 insn, struct jit_ctx *ctx)
75 {
76 if (ctx->image != NULL)
77 ctx->image[ctx->idx] = cpu_to_le32(insn);
78
79 ctx->idx++;
80 }
81
82 static inline void emit_a64_mov_i(const int is64, const int reg,
83 const s32 val, struct jit_ctx *ctx)
84 {
85 u16 hi = val >> 16;
86 u16 lo = val & 0xffff;
87
88 if (hi & 0x8000) {
89 if (hi == 0xffff) {
90 emit(A64_MOVN(is64, reg, (u16)~lo, 0), ctx);
91 } else {
92 emit(A64_MOVN(is64, reg, (u16)~hi, 16), ctx);
93 if (lo != 0xffff)
94 emit(A64_MOVK(is64, reg, lo, 0), ctx);
95 }
96 } else {
97 emit(A64_MOVZ(is64, reg, lo, 0), ctx);
98 if (hi)
99 emit(A64_MOVK(is64, reg, hi, 16), ctx);
100 }
101 }
102
103 static int i64_i16_blocks(const u64 val, bool inverse)
104 {
105 return (((val >> 0) & 0xffff) != (inverse ? 0xffff : 0x0000)) +
106 (((val >> 16) & 0xffff) != (inverse ? 0xffff : 0x0000)) +
107 (((val >> 32) & 0xffff) != (inverse ? 0xffff : 0x0000)) +
108 (((val >> 48) & 0xffff) != (inverse ? 0xffff : 0x0000));
109 }
110
111 static inline void emit_a64_mov_i64(const int reg, const u64 val,
112 struct jit_ctx *ctx)
113 {
114 u64 nrm_tmp = val, rev_tmp = ~val;
115 bool inverse;
116 int shift;
117
118 if (!(nrm_tmp >> 32))
119 return emit_a64_mov_i(0, reg, (u32)val, ctx);
120
121 inverse = i64_i16_blocks(nrm_tmp, true) < i64_i16_blocks(nrm_tmp, false);
122 shift = max(round_down((inverse ? (fls64(rev_tmp) - 1) :
123 (fls64(nrm_tmp) - 1)), 16), 0);
124 if (inverse)
125 emit(A64_MOVN(1, reg, (rev_tmp >> shift) & 0xffff, shift), ctx);
126 else
127 emit(A64_MOVZ(1, reg, (nrm_tmp >> shift) & 0xffff, shift), ctx);
128 shift -= 16;
129 while (shift >= 0) {
130 if (((nrm_tmp >> shift) & 0xffff) != (inverse ? 0xffff : 0x0000))
131 emit(A64_MOVK(1, reg, (nrm_tmp >> shift) & 0xffff, shift), ctx);
132 shift -= 16;
133 }
134 }
135
136 /*
137 * This is an unoptimized 64 immediate emission used for BPF to BPF call
138 * addresses. It will always do a full 64 bit decomposition as otherwise
139 * more complexity in the last extra pass is required since we previously
140 * reserved 4 instructions for the address.
141 */
142 static inline void emit_addr_mov_i64(const int reg, const u64 val,
143 struct jit_ctx *ctx)
144 {
145 u64 tmp = val;
146 int shift = 0;
147
148 emit(A64_MOVZ(1, reg, tmp & 0xffff, shift), ctx);
149 for (;shift < 48;) {
150 tmp >>= 16;
151 shift += 16;
152 emit(A64_MOVK(1, reg, tmp & 0xffff, shift), ctx);
153 }
154 }
155
156 static inline int bpf2a64_offset(int bpf_to, int bpf_from,
157 const struct jit_ctx *ctx)
158 {
159 int to = ctx->offset[bpf_to];
160 /* -1 to account for the Branch instruction */
161 int from = ctx->offset[bpf_from] - 1;
162
163 return to - from;
164 }
165
166 static void jit_fill_hole(void *area, unsigned int size)
167 {
168 __le32 *ptr;
169 /* We are guaranteed to have aligned memory. */
170 for (ptr = area; size >= sizeof(u32); size -= sizeof(u32))
171 *ptr++ = cpu_to_le32(AARCH64_BREAK_FAULT);
172 }
173
174 static inline int epilogue_offset(const struct jit_ctx *ctx)
175 {
176 int to = ctx->epilogue_offset;
177 int from = ctx->idx;
178
179 return to - from;
180 }
181
182 /* Stack must be multiples of 16B */
183 #define STACK_ALIGN(sz) (((sz) + 15) & ~15)
184
185 /* Tail call offset to jump into */
186 #define PROLOGUE_OFFSET 7
187
188 static int build_prologue(struct jit_ctx *ctx, bool ebpf_from_cbpf)
189 {
190 const struct bpf_prog *prog = ctx->prog;
191 const u8 r6 = bpf2a64[BPF_REG_6];
192 const u8 r7 = bpf2a64[BPF_REG_7];
193 const u8 r8 = bpf2a64[BPF_REG_8];
194 const u8 r9 = bpf2a64[BPF_REG_9];
195 const u8 fp = bpf2a64[BPF_REG_FP];
196 const u8 tcc = bpf2a64[TCALL_CNT];
197 const int idx0 = ctx->idx;
198 int cur_offset;
199
200 /*
201 * BPF prog stack layout
202 *
203 * high
204 * original A64_SP => 0:+-----+ BPF prologue
205 * |FP/LR|
206 * current A64_FP => -16:+-----+
207 * | ... | callee saved registers
208 * BPF fp register => -64:+-----+ <= (BPF_FP)
209 * | |
210 * | ... | BPF prog stack
211 * | |
212 * +-----+ <= (BPF_FP - prog->aux->stack_depth)
213 * |RSVD | padding
214 * current A64_SP => +-----+ <= (BPF_FP - ctx->stack_size)
215 * | |
216 * | ... | Function call stack
217 * | |
218 * +-----+
219 * low
220 *
221 */
222
223 /* Save FP and LR registers to stay align with ARM64 AAPCS */
224 emit(A64_PUSH(A64_FP, A64_LR, A64_SP), ctx);
225 emit(A64_MOV(1, A64_FP, A64_SP), ctx);
226
227 /* Save callee-saved registers */
228 emit(A64_PUSH(r6, r7, A64_SP), ctx);
229 emit(A64_PUSH(r8, r9, A64_SP), ctx);
230 emit(A64_PUSH(fp, tcc, A64_SP), ctx);
231
232 /* Set up BPF prog stack base register */
233 emit(A64_MOV(1, fp, A64_SP), ctx);
234
235 if (!ebpf_from_cbpf) {
236 /* Initialize tail_call_cnt */
237 emit(A64_MOVZ(1, tcc, 0, 0), ctx);
238
239 cur_offset = ctx->idx - idx0;
240 if (cur_offset != PROLOGUE_OFFSET) {
241 pr_err_once("PROLOGUE_OFFSET = %d, expected %d!\n",
242 cur_offset, PROLOGUE_OFFSET);
243 return -1;
244 }
245 }
246
247 ctx->stack_size = STACK_ALIGN(prog->aux->stack_depth);
248
249 /* Set up function call stack */
250 emit(A64_SUB_I(1, A64_SP, A64_SP, ctx->stack_size), ctx);
251 return 0;
252 }
253
254 static int out_offset = -1; /* initialized on the first pass of build_body() */
255 static int emit_bpf_tail_call(struct jit_ctx *ctx)
256 {
257 /* bpf_tail_call(void *prog_ctx, struct bpf_array *array, u64 index) */
258 const u8 r2 = bpf2a64[BPF_REG_2];
259 const u8 r3 = bpf2a64[BPF_REG_3];
260
261 const u8 tmp = bpf2a64[TMP_REG_1];
262 const u8 prg = bpf2a64[TMP_REG_2];
263 const u8 tcc = bpf2a64[TCALL_CNT];
264 const int idx0 = ctx->idx;
265 #define cur_offset (ctx->idx - idx0)
266 #define jmp_offset (out_offset - (cur_offset))
267 size_t off;
268
269 /* if (index >= array->map.max_entries)
270 * goto out;
271 */
272 off = offsetof(struct bpf_array, map.max_entries);
273 emit_a64_mov_i64(tmp, off, ctx);
274 emit(A64_LDR32(tmp, r2, tmp), ctx);
275 emit(A64_MOV(0, r3, r3), ctx);
276 emit(A64_CMP(0, r3, tmp), ctx);
277 emit(A64_B_(A64_COND_CS, jmp_offset), ctx);
278
279 /* if (tail_call_cnt > MAX_TAIL_CALL_CNT)
280 * goto out;
281 * tail_call_cnt++;
282 */
283 emit_a64_mov_i64(tmp, MAX_TAIL_CALL_CNT, ctx);
284 emit(A64_CMP(1, tcc, tmp), ctx);
285 emit(A64_B_(A64_COND_HI, jmp_offset), ctx);
286 emit(A64_ADD_I(1, tcc, tcc, 1), ctx);
287
288 /* prog = array->ptrs[index];
289 * if (prog == NULL)
290 * goto out;
291 */
292 off = offsetof(struct bpf_array, ptrs);
293 emit_a64_mov_i64(tmp, off, ctx);
294 emit(A64_ADD(1, tmp, r2, tmp), ctx);
295 emit(A64_LSL(1, prg, r3, 3), ctx);
296 emit(A64_LDR64(prg, tmp, prg), ctx);
297 emit(A64_CBZ(1, prg, jmp_offset), ctx);
298
299 /* goto *(prog->bpf_func + prologue_offset); */
300 off = offsetof(struct bpf_prog, bpf_func);
301 emit_a64_mov_i64(tmp, off, ctx);
302 emit(A64_LDR64(tmp, prg, tmp), ctx);
303 emit(A64_ADD_I(1, tmp, tmp, sizeof(u32) * PROLOGUE_OFFSET), ctx);
304 emit(A64_ADD_I(1, A64_SP, A64_SP, ctx->stack_size), ctx);
305 emit(A64_BR(tmp), ctx);
306
307 /* out: */
308 if (out_offset == -1)
309 out_offset = cur_offset;
310 if (cur_offset != out_offset) {
311 pr_err_once("tail_call out_offset = %d, expected %d!\n",
312 cur_offset, out_offset);
313 return -1;
314 }
315 return 0;
316 #undef cur_offset
317 #undef jmp_offset
318 }
319
320 static void build_epilogue(struct jit_ctx *ctx)
321 {
322 const u8 r0 = bpf2a64[BPF_REG_0];
323 const u8 r6 = bpf2a64[BPF_REG_6];
324 const u8 r7 = bpf2a64[BPF_REG_7];
325 const u8 r8 = bpf2a64[BPF_REG_8];
326 const u8 r9 = bpf2a64[BPF_REG_9];
327 const u8 fp = bpf2a64[BPF_REG_FP];
328
329 /* We're done with BPF stack */
330 emit(A64_ADD_I(1, A64_SP, A64_SP, ctx->stack_size), ctx);
331
332 /* Restore fs (x25) and x26 */
333 emit(A64_POP(fp, A64_R(26), A64_SP), ctx);
334
335 /* Restore callee-saved register */
336 emit(A64_POP(r8, r9, A64_SP), ctx);
337 emit(A64_POP(r6, r7, A64_SP), ctx);
338
339 /* Restore FP/LR registers */
340 emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx);
341
342 /* Set return value */
343 emit(A64_MOV(1, A64_R(0), r0), ctx);
344
345 emit(A64_RET(A64_LR), ctx);
346 }
347
348 /* JITs an eBPF instruction.
349 * Returns:
350 * 0 - successfully JITed an 8-byte eBPF instruction.
351 * >0 - successfully JITed a 16-byte eBPF instruction.
352 * <0 - failed to JIT.
353 */
354 static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
355 {
356 const u8 code = insn->code;
357 const u8 dst = bpf2a64[insn->dst_reg];
358 const u8 src = bpf2a64[insn->src_reg];
359 const u8 tmp = bpf2a64[TMP_REG_1];
360 const u8 tmp2 = bpf2a64[TMP_REG_2];
361 const u8 tmp3 = bpf2a64[TMP_REG_3];
362 const s16 off = insn->off;
363 const s32 imm = insn->imm;
364 const int i = insn - ctx->prog->insnsi;
365 const bool is64 = BPF_CLASS(code) == BPF_ALU64;
366 const bool isdw = BPF_SIZE(code) == BPF_DW;
367 u8 jmp_cond;
368 s32 jmp_offset;
369
370 #define check_imm(bits, imm) do { \
371 if ((((imm) > 0) && ((imm) >> (bits))) || \
372 (((imm) < 0) && (~(imm) >> (bits)))) { \
373 pr_info("[%2d] imm=%d(0x%x) out of range\n", \
374 i, imm, imm); \
375 return -EINVAL; \
376 } \
377 } while (0)
378 #define check_imm19(imm) check_imm(19, imm)
379 #define check_imm26(imm) check_imm(26, imm)
380
381 switch (code) {
382 /* dst = src */
383 case BPF_ALU | BPF_MOV | BPF_X:
384 case BPF_ALU64 | BPF_MOV | BPF_X:
385 emit(A64_MOV(is64, dst, src), ctx);
386 break;
387 /* dst = dst OP src */
388 case BPF_ALU | BPF_ADD | BPF_X:
389 case BPF_ALU64 | BPF_ADD | BPF_X:
390 emit(A64_ADD(is64, dst, dst, src), ctx);
391 break;
392 case BPF_ALU | BPF_SUB | BPF_X:
393 case BPF_ALU64 | BPF_SUB | BPF_X:
394 emit(A64_SUB(is64, dst, dst, src), ctx);
395 break;
396 case BPF_ALU | BPF_AND | BPF_X:
397 case BPF_ALU64 | BPF_AND | BPF_X:
398 emit(A64_AND(is64, dst, dst, src), ctx);
399 break;
400 case BPF_ALU | BPF_OR | BPF_X:
401 case BPF_ALU64 | BPF_OR | BPF_X:
402 emit(A64_ORR(is64, dst, dst, src), ctx);
403 break;
404 case BPF_ALU | BPF_XOR | BPF_X:
405 case BPF_ALU64 | BPF_XOR | BPF_X:
406 emit(A64_EOR(is64, dst, dst, src), ctx);
407 break;
408 case BPF_ALU | BPF_MUL | BPF_X:
409 case BPF_ALU64 | BPF_MUL | BPF_X:
410 emit(A64_MUL(is64, dst, dst, src), ctx);
411 break;
412 case BPF_ALU | BPF_DIV | BPF_X:
413 case BPF_ALU64 | BPF_DIV | BPF_X:
414 case BPF_ALU | BPF_MOD | BPF_X:
415 case BPF_ALU64 | BPF_MOD | BPF_X:
416 switch (BPF_OP(code)) {
417 case BPF_DIV:
418 emit(A64_UDIV(is64, dst, dst, src), ctx);
419 break;
420 case BPF_MOD:
421 emit(A64_UDIV(is64, tmp, dst, src), ctx);
422 emit(A64_MUL(is64, tmp, tmp, src), ctx);
423 emit(A64_SUB(is64, dst, dst, tmp), ctx);
424 break;
425 }
426 break;
427 case BPF_ALU | BPF_LSH | BPF_X:
428 case BPF_ALU64 | BPF_LSH | BPF_X:
429 emit(A64_LSLV(is64, dst, dst, src), ctx);
430 break;
431 case BPF_ALU | BPF_RSH | BPF_X:
432 case BPF_ALU64 | BPF_RSH | BPF_X:
433 emit(A64_LSRV(is64, dst, dst, src), ctx);
434 break;
435 case BPF_ALU | BPF_ARSH | BPF_X:
436 case BPF_ALU64 | BPF_ARSH | BPF_X:
437 emit(A64_ASRV(is64, dst, dst, src), ctx);
438 break;
439 /* dst = -dst */
440 case BPF_ALU | BPF_NEG:
441 case BPF_ALU64 | BPF_NEG:
442 emit(A64_NEG(is64, dst, dst), ctx);
443 break;
444 /* dst = BSWAP##imm(dst) */
445 case BPF_ALU | BPF_END | BPF_FROM_LE:
446 case BPF_ALU | BPF_END | BPF_FROM_BE:
447 #ifdef CONFIG_CPU_BIG_ENDIAN
448 if (BPF_SRC(code) == BPF_FROM_BE)
449 goto emit_bswap_uxt;
450 #else /* !CONFIG_CPU_BIG_ENDIAN */
451 if (BPF_SRC(code) == BPF_FROM_LE)
452 goto emit_bswap_uxt;
453 #endif
454 switch (imm) {
455 case 16:
456 emit(A64_REV16(is64, dst, dst), ctx);
457 /* zero-extend 16 bits into 64 bits */
458 emit(A64_UXTH(is64, dst, dst), ctx);
459 break;
460 case 32:
461 emit(A64_REV32(is64, dst, dst), ctx);
462 /* upper 32 bits already cleared */
463 break;
464 case 64:
465 emit(A64_REV64(dst, dst), ctx);
466 break;
467 }
468 break;
469 emit_bswap_uxt:
470 switch (imm) {
471 case 16:
472 /* zero-extend 16 bits into 64 bits */
473 emit(A64_UXTH(is64, dst, dst), ctx);
474 break;
475 case 32:
476 /* zero-extend 32 bits into 64 bits */
477 emit(A64_UXTW(is64, dst, dst), ctx);
478 break;
479 case 64:
480 /* nop */
481 break;
482 }
483 break;
484 /* dst = imm */
485 case BPF_ALU | BPF_MOV | BPF_K:
486 case BPF_ALU64 | BPF_MOV | BPF_K:
487 emit_a64_mov_i(is64, dst, imm, ctx);
488 break;
489 /* dst = dst OP imm */
490 case BPF_ALU | BPF_ADD | BPF_K:
491 case BPF_ALU64 | BPF_ADD | BPF_K:
492 emit_a64_mov_i(is64, tmp, imm, ctx);
493 emit(A64_ADD(is64, dst, dst, tmp), ctx);
494 break;
495 case BPF_ALU | BPF_SUB | BPF_K:
496 case BPF_ALU64 | BPF_SUB | BPF_K:
497 emit_a64_mov_i(is64, tmp, imm, ctx);
498 emit(A64_SUB(is64, dst, dst, tmp), ctx);
499 break;
500 case BPF_ALU | BPF_AND | BPF_K:
501 case BPF_ALU64 | BPF_AND | BPF_K:
502 emit_a64_mov_i(is64, tmp, imm, ctx);
503 emit(A64_AND(is64, dst, dst, tmp), ctx);
504 break;
505 case BPF_ALU | BPF_OR | BPF_K:
506 case BPF_ALU64 | BPF_OR | BPF_K:
507 emit_a64_mov_i(is64, tmp, imm, ctx);
508 emit(A64_ORR(is64, dst, dst, tmp), ctx);
509 break;
510 case BPF_ALU | BPF_XOR | BPF_K:
511 case BPF_ALU64 | BPF_XOR | BPF_K:
512 emit_a64_mov_i(is64, tmp, imm, ctx);
513 emit(A64_EOR(is64, dst, dst, tmp), ctx);
514 break;
515 case BPF_ALU | BPF_MUL | BPF_K:
516 case BPF_ALU64 | BPF_MUL | BPF_K:
517 emit_a64_mov_i(is64, tmp, imm, ctx);
518 emit(A64_MUL(is64, dst, dst, tmp), ctx);
519 break;
520 case BPF_ALU | BPF_DIV | BPF_K:
521 case BPF_ALU64 | BPF_DIV | BPF_K:
522 emit_a64_mov_i(is64, tmp, imm, ctx);
523 emit(A64_UDIV(is64, dst, dst, tmp), ctx);
524 break;
525 case BPF_ALU | BPF_MOD | BPF_K:
526 case BPF_ALU64 | BPF_MOD | BPF_K:
527 emit_a64_mov_i(is64, tmp2, imm, ctx);
528 emit(A64_UDIV(is64, tmp, dst, tmp2), ctx);
529 emit(A64_MUL(is64, tmp, tmp, tmp2), ctx);
530 emit(A64_SUB(is64, dst, dst, tmp), ctx);
531 break;
532 case BPF_ALU | BPF_LSH | BPF_K:
533 case BPF_ALU64 | BPF_LSH | BPF_K:
534 emit(A64_LSL(is64, dst, dst, imm), ctx);
535 break;
536 case BPF_ALU | BPF_RSH | BPF_K:
537 case BPF_ALU64 | BPF_RSH | BPF_K:
538 emit(A64_LSR(is64, dst, dst, imm), ctx);
539 break;
540 case BPF_ALU | BPF_ARSH | BPF_K:
541 case BPF_ALU64 | BPF_ARSH | BPF_K:
542 emit(A64_ASR(is64, dst, dst, imm), ctx);
543 break;
544
545 /* JUMP off */
546 case BPF_JMP | BPF_JA:
547 jmp_offset = bpf2a64_offset(i + off, i, ctx);
548 check_imm26(jmp_offset);
549 emit(A64_B(jmp_offset), ctx);
550 break;
551 /* IF (dst COND src) JUMP off */
552 case BPF_JMP | BPF_JEQ | BPF_X:
553 case BPF_JMP | BPF_JGT | BPF_X:
554 case BPF_JMP | BPF_JLT | BPF_X:
555 case BPF_JMP | BPF_JGE | BPF_X:
556 case BPF_JMP | BPF_JLE | BPF_X:
557 case BPF_JMP | BPF_JNE | BPF_X:
558 case BPF_JMP | BPF_JSGT | BPF_X:
559 case BPF_JMP | BPF_JSLT | BPF_X:
560 case BPF_JMP | BPF_JSGE | BPF_X:
561 case BPF_JMP | BPF_JSLE | BPF_X:
562 emit(A64_CMP(1, dst, src), ctx);
563 emit_cond_jmp:
564 jmp_offset = bpf2a64_offset(i + off, i, ctx);
565 check_imm19(jmp_offset);
566 switch (BPF_OP(code)) {
567 case BPF_JEQ:
568 jmp_cond = A64_COND_EQ;
569 break;
570 case BPF_JGT:
571 jmp_cond = A64_COND_HI;
572 break;
573 case BPF_JLT:
574 jmp_cond = A64_COND_CC;
575 break;
576 case BPF_JGE:
577 jmp_cond = A64_COND_CS;
578 break;
579 case BPF_JLE:
580 jmp_cond = A64_COND_LS;
581 break;
582 case BPF_JSET:
583 case BPF_JNE:
584 jmp_cond = A64_COND_NE;
585 break;
586 case BPF_JSGT:
587 jmp_cond = A64_COND_GT;
588 break;
589 case BPF_JSLT:
590 jmp_cond = A64_COND_LT;
591 break;
592 case BPF_JSGE:
593 jmp_cond = A64_COND_GE;
594 break;
595 case BPF_JSLE:
596 jmp_cond = A64_COND_LE;
597 break;
598 default:
599 return -EFAULT;
600 }
601 emit(A64_B_(jmp_cond, jmp_offset), ctx);
602 break;
603 case BPF_JMP | BPF_JSET | BPF_X:
604 emit(A64_TST(1, dst, src), ctx);
605 goto emit_cond_jmp;
606 /* IF (dst COND imm) JUMP off */
607 case BPF_JMP | BPF_JEQ | BPF_K:
608 case BPF_JMP | BPF_JGT | BPF_K:
609 case BPF_JMP | BPF_JLT | BPF_K:
610 case BPF_JMP | BPF_JGE | BPF_K:
611 case BPF_JMP | BPF_JLE | BPF_K:
612 case BPF_JMP | BPF_JNE | BPF_K:
613 case BPF_JMP | BPF_JSGT | BPF_K:
614 case BPF_JMP | BPF_JSLT | BPF_K:
615 case BPF_JMP | BPF_JSGE | BPF_K:
616 case BPF_JMP | BPF_JSLE | BPF_K:
617 emit_a64_mov_i(1, tmp, imm, ctx);
618 emit(A64_CMP(1, dst, tmp), ctx);
619 goto emit_cond_jmp;
620 case BPF_JMP | BPF_JSET | BPF_K:
621 emit_a64_mov_i(1, tmp, imm, ctx);
622 emit(A64_TST(1, dst, tmp), ctx);
623 goto emit_cond_jmp;
624 /* function call */
625 case BPF_JMP | BPF_CALL:
626 {
627 const u8 r0 = bpf2a64[BPF_REG_0];
628 const u64 func = (u64)__bpf_call_base + imm;
629
630 if (ctx->prog->is_func)
631 emit_addr_mov_i64(tmp, func, ctx);
632 else
633 emit_a64_mov_i64(tmp, func, ctx);
634 emit(A64_BLR(tmp), ctx);
635 emit(A64_MOV(1, r0, A64_R(0)), ctx);
636 break;
637 }
638 /* tail call */
639 case BPF_JMP | BPF_TAIL_CALL:
640 if (emit_bpf_tail_call(ctx))
641 return -EFAULT;
642 break;
643 /* function return */
644 case BPF_JMP | BPF_EXIT:
645 /* Optimization: when last instruction is EXIT,
646 simply fallthrough to epilogue. */
647 if (i == ctx->prog->len - 1)
648 break;
649 jmp_offset = epilogue_offset(ctx);
650 check_imm26(jmp_offset);
651 emit(A64_B(jmp_offset), ctx);
652 break;
653
654 /* dst = imm64 */
655 case BPF_LD | BPF_IMM | BPF_DW:
656 {
657 const struct bpf_insn insn1 = insn[1];
658 u64 imm64;
659
660 imm64 = (u64)insn1.imm << 32 | (u32)imm;
661 emit_a64_mov_i64(dst, imm64, ctx);
662
663 return 1;
664 }
665
666 /* LDX: dst = *(size *)(src + off) */
667 case BPF_LDX | BPF_MEM | BPF_W:
668 case BPF_LDX | BPF_MEM | BPF_H:
669 case BPF_LDX | BPF_MEM | BPF_B:
670 case BPF_LDX | BPF_MEM | BPF_DW:
671 emit_a64_mov_i(1, tmp, off, ctx);
672 switch (BPF_SIZE(code)) {
673 case BPF_W:
674 emit(A64_LDR32(dst, src, tmp), ctx);
675 break;
676 case BPF_H:
677 emit(A64_LDRH(dst, src, tmp), ctx);
678 break;
679 case BPF_B:
680 emit(A64_LDRB(dst, src, tmp), ctx);
681 break;
682 case BPF_DW:
683 emit(A64_LDR64(dst, src, tmp), ctx);
684 break;
685 }
686 break;
687
688 /* ST: *(size *)(dst + off) = imm */
689 case BPF_ST | BPF_MEM | BPF_W:
690 case BPF_ST | BPF_MEM | BPF_H:
691 case BPF_ST | BPF_MEM | BPF_B:
692 case BPF_ST | BPF_MEM | BPF_DW:
693 /* Load imm to a register then store it */
694 emit_a64_mov_i(1, tmp2, off, ctx);
695 emit_a64_mov_i(1, tmp, imm, ctx);
696 switch (BPF_SIZE(code)) {
697 case BPF_W:
698 emit(A64_STR32(tmp, dst, tmp2), ctx);
699 break;
700 case BPF_H:
701 emit(A64_STRH(tmp, dst, tmp2), ctx);
702 break;
703 case BPF_B:
704 emit(A64_STRB(tmp, dst, tmp2), ctx);
705 break;
706 case BPF_DW:
707 emit(A64_STR64(tmp, dst, tmp2), ctx);
708 break;
709 }
710 break;
711
712 /* STX: *(size *)(dst + off) = src */
713 case BPF_STX | BPF_MEM | BPF_W:
714 case BPF_STX | BPF_MEM | BPF_H:
715 case BPF_STX | BPF_MEM | BPF_B:
716 case BPF_STX | BPF_MEM | BPF_DW:
717 emit_a64_mov_i(1, tmp, off, ctx);
718 switch (BPF_SIZE(code)) {
719 case BPF_W:
720 emit(A64_STR32(src, dst, tmp), ctx);
721 break;
722 case BPF_H:
723 emit(A64_STRH(src, dst, tmp), ctx);
724 break;
725 case BPF_B:
726 emit(A64_STRB(src, dst, tmp), ctx);
727 break;
728 case BPF_DW:
729 emit(A64_STR64(src, dst, tmp), ctx);
730 break;
731 }
732 break;
733 /* STX XADD: lock *(u32 *)(dst + off) += src */
734 case BPF_STX | BPF_XADD | BPF_W:
735 /* STX XADD: lock *(u64 *)(dst + off) += src */
736 case BPF_STX | BPF_XADD | BPF_DW:
737 emit_a64_mov_i(1, tmp, off, ctx);
738 emit(A64_ADD(1, tmp, tmp, dst), ctx);
739 emit(A64_PRFM(tmp, PST, L1, STRM), ctx);
740 emit(A64_LDXR(isdw, tmp2, tmp), ctx);
741 emit(A64_ADD(isdw, tmp2, tmp2, src), ctx);
742 emit(A64_STXR(isdw, tmp2, tmp, tmp3), ctx);
743 jmp_offset = -3;
744 check_imm19(jmp_offset);
745 emit(A64_CBNZ(0, tmp3, jmp_offset), ctx);
746 break;
747
748 default:
749 pr_err_once("unknown opcode %02x\n", code);
750 return -EINVAL;
751 }
752
753 return 0;
754 }
755
756 static int build_body(struct jit_ctx *ctx)
757 {
758 const struct bpf_prog *prog = ctx->prog;
759 int i;
760
761 for (i = 0; i < prog->len; i++) {
762 const struct bpf_insn *insn = &prog->insnsi[i];
763 int ret;
764
765 ret = build_insn(insn, ctx);
766 if (ret > 0) {
767 i++;
768 if (ctx->image == NULL)
769 ctx->offset[i] = ctx->idx;
770 continue;
771 }
772 if (ctx->image == NULL)
773 ctx->offset[i] = ctx->idx;
774 if (ret)
775 return ret;
776 }
777
778 return 0;
779 }
780
781 static int validate_code(struct jit_ctx *ctx)
782 {
783 int i;
784
785 for (i = 0; i < ctx->idx; i++) {
786 u32 a64_insn = le32_to_cpu(ctx->image[i]);
787
788 if (a64_insn == AARCH64_BREAK_FAULT)
789 return -1;
790 }
791
792 return 0;
793 }
794
795 static inline void bpf_flush_icache(void *start, void *end)
796 {
797 flush_icache_range((unsigned long)start, (unsigned long)end);
798 }
799
800 struct arm64_jit_data {
801 struct bpf_binary_header *header;
802 u8 *image;
803 struct jit_ctx ctx;
804 };
805
806 struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
807 {
808 struct bpf_prog *tmp, *orig_prog = prog;
809 struct bpf_binary_header *header;
810 struct arm64_jit_data *jit_data;
811 bool was_classic = bpf_prog_was_classic(prog);
812 bool tmp_blinded = false;
813 bool extra_pass = false;
814 struct jit_ctx ctx;
815 int image_size;
816 u8 *image_ptr;
817
818 if (!prog->jit_requested)
819 return orig_prog;
820
821 tmp = bpf_jit_blind_constants(prog);
822 /* If blinding was requested and we failed during blinding,
823 * we must fall back to the interpreter.
824 */
825 if (IS_ERR(tmp))
826 return orig_prog;
827 if (tmp != prog) {
828 tmp_blinded = true;
829 prog = tmp;
830 }
831
832 jit_data = prog->aux->jit_data;
833 if (!jit_data) {
834 jit_data = kzalloc(sizeof(*jit_data), GFP_KERNEL);
835 if (!jit_data) {
836 prog = orig_prog;
837 goto out;
838 }
839 prog->aux->jit_data = jit_data;
840 }
841 if (jit_data->ctx.offset) {
842 ctx = jit_data->ctx;
843 image_ptr = jit_data->image;
844 header = jit_data->header;
845 extra_pass = true;
846 image_size = sizeof(u32) * ctx.idx;
847 goto skip_init_ctx;
848 }
849 memset(&ctx, 0, sizeof(ctx));
850 ctx.prog = prog;
851
852 ctx.offset = kcalloc(prog->len, sizeof(int), GFP_KERNEL);
853 if (ctx.offset == NULL) {
854 prog = orig_prog;
855 goto out_off;
856 }
857
858 /* 1. Initial fake pass to compute ctx->idx. */
859
860 /* Fake pass to fill in ctx->offset. */
861 if (build_body(&ctx)) {
862 prog = orig_prog;
863 goto out_off;
864 }
865
866 if (build_prologue(&ctx, was_classic)) {
867 prog = orig_prog;
868 goto out_off;
869 }
870
871 ctx.epilogue_offset = ctx.idx;
872 build_epilogue(&ctx);
873
874 /* Now we know the actual image size. */
875 image_size = sizeof(u32) * ctx.idx;
876 header = bpf_jit_binary_alloc(image_size, &image_ptr,
877 sizeof(u32), jit_fill_hole);
878 if (header == NULL) {
879 prog = orig_prog;
880 goto out_off;
881 }
882
883 /* 2. Now, the actual pass. */
884
885 ctx.image = (__le32 *)image_ptr;
886 skip_init_ctx:
887 ctx.idx = 0;
888
889 build_prologue(&ctx, was_classic);
890
891 if (build_body(&ctx)) {
892 bpf_jit_binary_free(header);
893 prog = orig_prog;
894 goto out_off;
895 }
896
897 build_epilogue(&ctx);
898
899 /* 3. Extra pass to validate JITed code. */
900 if (validate_code(&ctx)) {
901 bpf_jit_binary_free(header);
902 prog = orig_prog;
903 goto out_off;
904 }
905
906 /* And we're done. */
907 if (bpf_jit_enable > 1)
908 bpf_jit_dump(prog->len, image_size, 2, ctx.image);
909
910 bpf_flush_icache(header, ctx.image + ctx.idx);
911
912 if (!prog->is_func || extra_pass) {
913 if (extra_pass && ctx.idx != jit_data->ctx.idx) {
914 pr_err_once("multi-func JIT bug %d != %d\n",
915 ctx.idx, jit_data->ctx.idx);
916 bpf_jit_binary_free(header);
917 prog->bpf_func = NULL;
918 prog->jited = 0;
919 goto out_off;
920 }
921 bpf_jit_binary_lock_ro(header);
922 } else {
923 jit_data->ctx = ctx;
924 jit_data->image = image_ptr;
925 jit_data->header = header;
926 }
927 prog->bpf_func = (void *)ctx.image;
928 prog->jited = 1;
929 prog->jited_len = image_size;
930
931 if (!prog->is_func || extra_pass) {
932 out_off:
933 kfree(ctx.offset);
934 kfree(jit_data);
935 prog->aux->jit_data = NULL;
936 }
937 out:
938 if (tmp_blinded)
939 bpf_jit_prog_release_other(prog, prog == orig_prog ?
940 tmp : orig_prog);
941 return prog;
942 }
Linux with added FPC-III support