Linux 4.18.10
[linux/fpc-iii.git] / arch / parisc / kernel / processor.c
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1 /*
2 * Initial setup-routines for HP 9000 based hardware.
4 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
5 * Modifications for PA-RISC (C) 1999-2008 Helge Deller <deller@gmx.de>
6 * Modifications copyright 1999 SuSE GmbH (Philipp Rumpf)
7 * Modifications copyright 2000 Martin K. Petersen <mkp@mkp.net>
8 * Modifications copyright 2000 Philipp Rumpf <prumpf@tux.org>
9 * Modifications copyright 2001 Ryan Bradetich <rbradetich@uswest.net>
11 * Initial PA-RISC Version: 04-23-1999 by Helge Deller
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2, or (at your option)
16 * any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 #include <linux/delay.h>
29 #include <linux/init.h>
30 #include <linux/mm.h>
31 #include <linux/module.h>
32 #include <linux/seq_file.h>
33 #include <linux/random.h>
34 #include <linux/slab.h>
35 #include <linux/cpu.h>
36 #include <asm/param.h>
37 #include <asm/cache.h>
38 #include <asm/hardware.h> /* for register_parisc_driver() stuff */
39 #include <asm/processor.h>
40 #include <asm/page.h>
41 #include <asm/pdc.h>
42 #include <asm/pdcpat.h>
43 #include <asm/irq.h> /* for struct irq_region */
44 #include <asm/parisc-device.h>
46 struct system_cpuinfo_parisc boot_cpu_data __read_mostly;
47 EXPORT_SYMBOL(boot_cpu_data);
48 #ifdef CONFIG_PA8X00
49 int _parisc_requires_coherency __read_mostly;
50 EXPORT_SYMBOL(_parisc_requires_coherency);
51 #endif
53 DEFINE_PER_CPU(struct cpuinfo_parisc, cpu_data);
56 ** PARISC CPU driver - claim "device" and initialize CPU data structures.
58 ** Consolidate per CPU initialization into (mostly) one module.
59 ** Monarch CPU will initialize boot_cpu_data which shouldn't
60 ** change once the system has booted.
62 ** The callback *should* do per-instance initialization of
63 ** everything including the monarch. "Per CPU" init code in
64 ** setup.c:start_parisc() has migrated here and start_parisc()
65 ** will call register_parisc_driver(&cpu_driver) before calling do_inventory().
67 ** The goal of consolidating CPU initialization into one place is
68 ** to make sure all CPUs get initialized the same way.
69 ** The code path not shared is how PDC hands control of the CPU to the OS.
70 ** The initialization of OS data structures is the same (done below).
73 /**
74 * init_cpu_profiler - enable/setup per cpu profiling hooks.
75 * @cpunum: The processor instance.
77 * FIXME: doesn't do much yet...
79 static void
80 init_percpu_prof(unsigned long cpunum)
85 /**
86 * processor_probe - Determine if processor driver should claim this device.
87 * @dev: The device which has been found.
89 * Determine if processor driver should claim this chip (return 0) or not
90 * (return 1). If so, initialize the chip and tell other partners in crime
91 * they have work to do.
93 static int __init processor_probe(struct parisc_device *dev)
95 unsigned long txn_addr;
96 unsigned long cpuid;
97 struct cpuinfo_parisc *p;
98 struct pdc_pat_cpu_num cpu_info = { };
100 #ifdef CONFIG_SMP
101 if (num_online_cpus() >= nr_cpu_ids) {
102 printk(KERN_INFO "num_online_cpus() >= nr_cpu_ids\n");
103 return 1;
105 #else
106 if (boot_cpu_data.cpu_count > 0) {
107 printk(KERN_INFO "CONFIG_SMP=n ignoring additional CPUs\n");
108 return 1;
110 #endif
112 /* logical CPU ID and update global counter
113 * May get overwritten by PAT code.
115 cpuid = boot_cpu_data.cpu_count;
116 txn_addr = dev->hpa.start; /* for legacy PDC */
117 cpu_info.cpu_num = cpu_info.cpu_loc = cpuid;
119 #ifdef CONFIG_64BIT
120 if (is_pdc_pat()) {
121 ulong status;
122 unsigned long bytecnt;
123 pdc_pat_cell_mod_maddr_block_t *pa_pdc_cell;
125 pa_pdc_cell = kmalloc(sizeof (*pa_pdc_cell), GFP_KERNEL);
126 if (!pa_pdc_cell)
127 panic("couldn't allocate memory for PDC_PAT_CELL!");
129 status = pdc_pat_cell_module(&bytecnt, dev->pcell_loc,
130 dev->mod_index, PA_VIEW, pa_pdc_cell);
132 BUG_ON(PDC_OK != status);
134 /* verify it's the same as what do_pat_inventory() found */
135 BUG_ON(dev->mod_info != pa_pdc_cell->mod_info);
136 BUG_ON(dev->pmod_loc != pa_pdc_cell->mod_location);
138 txn_addr = pa_pdc_cell->mod[0]; /* id_eid for IO sapic */
140 kfree(pa_pdc_cell);
142 /* get the cpu number */
143 status = pdc_pat_cpu_get_number(&cpu_info, dev->hpa.start);
144 BUG_ON(PDC_OK != status);
146 pr_info("Logical CPU #%lu is physical cpu #%lu at location "
147 "0x%lx with hpa %pa\n",
148 cpuid, cpu_info.cpu_num, cpu_info.cpu_loc,
149 &dev->hpa.start);
151 #undef USE_PAT_CPUID
152 #ifdef USE_PAT_CPUID
153 /* We need contiguous numbers for cpuid. Firmware's notion
154 * of cpuid is for physical CPUs and we just don't care yet.
155 * We'll care when we need to query PAT PDC about a CPU *after*
156 * boot time (ie shutdown a CPU from an OS perspective).
158 if (cpu_info.cpu_num >= NR_CPUS) {
159 printk(KERN_WARNING "IGNORING CPU at %pa,"
160 " cpu_slot_id > NR_CPUS"
161 " (%ld > %d)\n",
162 &dev->hpa.start, cpu_info.cpu_num, NR_CPUS);
163 /* Ignore CPU since it will only crash */
164 boot_cpu_data.cpu_count--;
165 return 1;
166 } else {
167 cpuid = cpu_info.cpu_num;
169 #endif
171 #endif
173 p = &per_cpu(cpu_data, cpuid);
174 boot_cpu_data.cpu_count++;
176 /* initialize counters - CPU 0 gets it_value set in time_init() */
177 if (cpuid)
178 memset(p, 0, sizeof(struct cpuinfo_parisc));
180 p->loops_per_jiffy = loops_per_jiffy;
181 p->dev = dev; /* Save IODC data in case we need it */
182 p->hpa = dev->hpa.start; /* save CPU hpa */
183 p->cpuid = cpuid; /* save CPU id */
184 p->txn_addr = txn_addr; /* save CPU IRQ address */
185 p->cpu_num = cpu_info.cpu_num;
186 p->cpu_loc = cpu_info.cpu_loc;
188 store_cpu_topology(cpuid);
190 #ifdef CONFIG_SMP
192 ** FIXME: review if any other initialization is clobbered
193 ** for boot_cpu by the above memset().
195 init_percpu_prof(cpuid);
196 #endif
199 ** CONFIG_SMP: init_smp_config() will attempt to get CPUs into
200 ** OS control. RENDEZVOUS is the default state - see mem_set above.
201 ** p->state = STATE_RENDEZVOUS;
204 #if 0
205 /* CPU 0 IRQ table is statically allocated/initialized */
206 if (cpuid) {
207 struct irqaction actions[];
210 ** itimer and ipi IRQ handlers are statically initialized in
211 ** arch/parisc/kernel/irq.c. ie Don't need to register them.
213 actions = kmalloc(sizeof(struct irqaction)*MAX_CPU_IRQ, GFP_ATOMIC);
214 if (!actions) {
215 /* not getting it's own table, share with monarch */
216 actions = cpu_irq_actions[0];
219 cpu_irq_actions[cpuid] = actions;
221 #endif
224 * Bring this CPU up now! (ignore bootstrap cpuid == 0)
226 #ifdef CONFIG_SMP
227 if (cpuid) {
228 set_cpu_present(cpuid, true);
229 cpu_up(cpuid);
231 #endif
233 return 0;
237 * collect_boot_cpu_data - Fill the boot_cpu_data structure.
239 * This function collects and stores the generic processor information
240 * in the boot_cpu_data structure.
242 void __init collect_boot_cpu_data(void)
244 unsigned long cr16_seed;
246 memset(&boot_cpu_data, 0, sizeof(boot_cpu_data));
248 cr16_seed = get_cycles();
249 add_device_randomness(&cr16_seed, sizeof(cr16_seed));
251 boot_cpu_data.cpu_hz = 100 * PAGE0->mem_10msec; /* Hz of this PARISC */
253 /* get CPU-Model Information... */
254 #define p ((unsigned long *)&boot_cpu_data.pdc.model)
255 if (pdc_model_info(&boot_cpu_data.pdc.model) == PDC_OK) {
256 printk(KERN_INFO
257 "model %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
258 p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]);
260 add_device_randomness(&boot_cpu_data.pdc.model,
261 sizeof(boot_cpu_data.pdc.model));
263 #undef p
265 if (pdc_model_versions(&boot_cpu_data.pdc.versions, 0) == PDC_OK) {
266 printk(KERN_INFO "vers %08lx\n",
267 boot_cpu_data.pdc.versions);
269 add_device_randomness(&boot_cpu_data.pdc.versions,
270 sizeof(boot_cpu_data.pdc.versions));
273 if (pdc_model_cpuid(&boot_cpu_data.pdc.cpuid) == PDC_OK) {
274 printk(KERN_INFO "CPUID vers %ld rev %ld (0x%08lx)\n",
275 (boot_cpu_data.pdc.cpuid >> 5) & 127,
276 boot_cpu_data.pdc.cpuid & 31,
277 boot_cpu_data.pdc.cpuid);
279 add_device_randomness(&boot_cpu_data.pdc.cpuid,
280 sizeof(boot_cpu_data.pdc.cpuid));
283 if (pdc_model_capabilities(&boot_cpu_data.pdc.capabilities) == PDC_OK)
284 printk(KERN_INFO "capabilities 0x%lx\n",
285 boot_cpu_data.pdc.capabilities);
287 if (pdc_model_sysmodel(boot_cpu_data.pdc.sys_model_name) == PDC_OK)
288 printk(KERN_INFO "model %s\n",
289 boot_cpu_data.pdc.sys_model_name);
291 boot_cpu_data.hversion = boot_cpu_data.pdc.model.hversion;
292 boot_cpu_data.sversion = boot_cpu_data.pdc.model.sversion;
294 boot_cpu_data.cpu_type = parisc_get_cpu_type(boot_cpu_data.hversion);
295 boot_cpu_data.cpu_name = cpu_name_version[boot_cpu_data.cpu_type][0];
296 boot_cpu_data.family_name = cpu_name_version[boot_cpu_data.cpu_type][1];
298 #ifdef CONFIG_PA8X00
299 _parisc_requires_coherency = (boot_cpu_data.cpu_type == mako) ||
300 (boot_cpu_data.cpu_type == mako2);
301 #endif
306 * init_per_cpu - Handle individual processor initializations.
307 * @cpunum: logical processor number.
309 * This function handles initialization for *every* CPU
310 * in the system:
312 * o Set "default" CPU width for trap handlers
314 * o Enable FP coprocessor
315 * REVISIT: this could be done in the "code 22" trap handler.
316 * (frowands idea - that way we know which processes need FP
317 * registers saved on the interrupt stack.)
318 * NEWS FLASH: wide kernels need FP coprocessor enabled to handle
319 * formatted printing of %lx for example (double divides I think)
321 * o Enable CPU profiling hooks.
323 int __init init_per_cpu(int cpunum)
325 int ret;
326 struct pdc_coproc_cfg coproc_cfg;
328 set_firmware_width();
329 ret = pdc_coproc_cfg(&coproc_cfg);
331 store_cpu_topology(cpunum);
333 if(ret >= 0 && coproc_cfg.ccr_functional) {
334 mtctl(coproc_cfg.ccr_functional, 10); /* 10 == Coprocessor Control Reg */
336 /* FWIW, FP rev/model is a more accurate way to determine
337 ** CPU type. CPU rev/model has some ambiguous cases.
339 per_cpu(cpu_data, cpunum).fp_rev = coproc_cfg.revision;
340 per_cpu(cpu_data, cpunum).fp_model = coproc_cfg.model;
342 if (cpunum == 0)
343 printk(KERN_INFO "FP[%d] enabled: Rev %ld Model %ld\n",
344 cpunum, coproc_cfg.revision, coproc_cfg.model);
347 ** store status register to stack (hopefully aligned)
348 ** and clear the T-bit.
350 asm volatile ("fstd %fr0,8(%sp)");
352 } else {
353 printk(KERN_WARNING "WARNING: No FP CoProcessor?!"
354 " (coproc_cfg.ccr_functional == 0x%lx, expected 0xc0)\n"
355 #ifdef CONFIG_64BIT
356 "Halting Machine - FP required\n"
357 #endif
358 , coproc_cfg.ccr_functional);
359 #ifdef CONFIG_64BIT
360 mdelay(100); /* previous chars get pushed to console */
361 panic("FP CoProc not reported");
362 #endif
365 /* FUTURE: Enable Performance Monitor : ccr bit 0x20 */
366 init_percpu_prof(cpunum);
368 return ret;
372 * Display CPU info for all CPUs.
375 show_cpuinfo (struct seq_file *m, void *v)
377 unsigned long cpu;
379 for_each_online_cpu(cpu) {
380 const struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu);
381 #ifdef CONFIG_SMP
382 if (0 == cpuinfo->hpa)
383 continue;
384 #endif
385 seq_printf(m, "processor\t: %lu\n"
386 "cpu family\t: PA-RISC %s\n",
387 cpu, boot_cpu_data.family_name);
389 seq_printf(m, "cpu\t\t: %s\n", boot_cpu_data.cpu_name );
391 /* cpu MHz */
392 seq_printf(m, "cpu MHz\t\t: %d.%06d\n",
393 boot_cpu_data.cpu_hz / 1000000,
394 boot_cpu_data.cpu_hz % 1000000 );
396 #ifdef CONFIG_PARISC_CPU_TOPOLOGY
397 seq_printf(m, "physical id\t: %d\n",
398 topology_physical_package_id(cpu));
399 seq_printf(m, "siblings\t: %d\n",
400 cpumask_weight(topology_core_cpumask(cpu)));
401 seq_printf(m, "core id\t\t: %d\n", topology_core_id(cpu));
402 #endif
404 seq_printf(m, "capabilities\t:");
405 if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS32)
406 seq_puts(m, " os32");
407 if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS64)
408 seq_puts(m, " os64");
409 if (boot_cpu_data.pdc.capabilities & PDC_MODEL_IOPDIR_FDC)
410 seq_puts(m, " iopdir_fdc");
411 switch (boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) {
412 case PDC_MODEL_NVA_SUPPORTED:
413 seq_puts(m, " nva_supported");
414 break;
415 case PDC_MODEL_NVA_SLOW:
416 seq_puts(m, " nva_slow");
417 break;
418 case PDC_MODEL_NVA_UNSUPPORTED:
419 seq_puts(m, " needs_equivalent_aliasing");
420 break;
422 seq_printf(m, " (0x%02lx)\n", boot_cpu_data.pdc.capabilities);
424 seq_printf(m, "model\t\t: %s\n"
425 "model name\t: %s\n",
426 boot_cpu_data.pdc.sys_model_name,
427 cpuinfo->dev ?
428 cpuinfo->dev->name : "Unknown");
430 seq_printf(m, "hversion\t: 0x%08x\n"
431 "sversion\t: 0x%08x\n",
432 boot_cpu_data.hversion,
433 boot_cpu_data.sversion );
435 /* print cachesize info */
436 show_cache_info(m);
438 seq_printf(m, "bogomips\t: %lu.%02lu\n",
439 cpuinfo->loops_per_jiffy / (500000 / HZ),
440 (cpuinfo->loops_per_jiffy / (5000 / HZ)) % 100);
442 seq_printf(m, "software id\t: %ld\n\n",
443 boot_cpu_data.pdc.model.sw_id);
445 return 0;
448 static const struct parisc_device_id processor_tbl[] __initconst = {
449 { HPHW_NPROC, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, SVERSION_ANY_ID },
450 { 0, }
453 static struct parisc_driver cpu_driver __refdata = {
454 .name = "CPU",
455 .id_table = processor_tbl,
456 .probe = processor_probe
460 * processor_init - Processor initialization procedure.
462 * Register this driver.
464 void __init processor_init(void)
466 register_parisc_driver(&cpu_driver);