1 // SPDX-License-Identifier: GPL-2.0
3 * Intel PCONFIG instruction support.
5 * Copyright (C) 2017 Intel Corporation
8 * Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
11 #include <asm/cpufeature.h>
12 #include <asm/intel_pconfig.h>
14 #define PCONFIG_CPUID 0x1b
16 #define PCONFIG_CPUID_SUBLEAF_MASK ((1 << 12) - 1)
18 /* Subleaf type (EAX) for PCONFIG CPUID leaf (0x1B) */
20 PCONFIG_CPUID_SUBLEAF_INVALID
= 0,
21 PCONFIG_CPUID_SUBLEAF_TARGETID
= 1,
24 /* Bitmask of supported targets */
25 static u64 targets_supported __read_mostly
;
27 int pconfig_target_supported(enum pconfig_target target
)
30 * We would need to re-think the implementation once we get > 64
31 * PCONFIG targets. Spec allows up to 2^32 targets.
33 BUILD_BUG_ON(PCONFIG_TARGET_NR
>= 64);
35 if (WARN_ON_ONCE(target
>= 64))
37 return targets_supported
& (1ULL << target
);
40 static int __init
intel_pconfig_init(void)
44 if (!boot_cpu_has(X86_FEATURE_PCONFIG
))
48 * Scan subleafs of PCONFIG CPUID leaf.
50 * Subleafs of the same type need not to be consecutive.
52 * Stop on the first invalid subleaf type. All subleafs after the first
53 * invalid are invalid too.
55 for (subleaf
= 0; subleaf
< INT_MAX
; subleaf
++) {
56 struct cpuid_regs regs
;
58 cpuid_count(PCONFIG_CPUID
, subleaf
,
59 ®s
.eax
, ®s
.ebx
, ®s
.ecx
, ®s
.edx
);
61 switch (regs
.eax
& PCONFIG_CPUID_SUBLEAF_MASK
) {
62 case PCONFIG_CPUID_SUBLEAF_INVALID
:
63 /* Stop on the first invalid subleaf */
65 case PCONFIG_CPUID_SUBLEAF_TARGETID
:
66 /* Mark supported PCONFIG targets */
68 targets_supported
|= (1ULL << regs
.ebx
);
70 targets_supported
|= (1ULL << regs
.ecx
);
72 targets_supported
|= (1ULL << regs
.edx
);
75 /* Unknown CPUID.PCONFIG subleaf: ignore */
82 arch_initcall(intel_pconfig_init
);