1 // SPDX-License-Identifier: GPL-2.0
4 #include <linux/hugetlb.h>
5 #include <asm/pgalloc.h>
6 #include <asm/pgtable.h>
8 #include <asm/fixmap.h>
11 #ifdef CONFIG_DYNAMIC_PHYSICAL_MASK
12 phys_addr_t physical_mask __ro_after_init
= (1ULL << __PHYSICAL_MASK_SHIFT
) - 1;
13 EXPORT_SYMBOL(physical_mask
);
16 #define PGALLOC_GFP (GFP_KERNEL_ACCOUNT | __GFP_ZERO)
19 #define PGALLOC_USER_GFP __GFP_HIGHMEM
21 #define PGALLOC_USER_GFP 0
24 gfp_t __userpte_alloc_gfp
= PGALLOC_GFP
| PGALLOC_USER_GFP
;
26 pte_t
*pte_alloc_one_kernel(struct mm_struct
*mm
, unsigned long address
)
28 return (pte_t
*)__get_free_page(PGALLOC_GFP
& ~__GFP_ACCOUNT
);
31 pgtable_t
pte_alloc_one(struct mm_struct
*mm
, unsigned long address
)
35 pte
= alloc_pages(__userpte_alloc_gfp
, 0);
38 if (!pgtable_page_ctor(pte
)) {
45 static int __init
setup_userpte(char *arg
)
51 * "userpte=nohigh" disables allocation of user pagetables in
54 if (strcmp(arg
, "nohigh") == 0)
55 __userpte_alloc_gfp
&= ~__GFP_HIGHMEM
;
60 early_param("userpte", setup_userpte
);
62 void ___pte_free_tlb(struct mmu_gather
*tlb
, struct page
*pte
)
64 pgtable_page_dtor(pte
);
65 paravirt_release_pte(page_to_pfn(pte
));
66 tlb_remove_table(tlb
, pte
);
69 #if CONFIG_PGTABLE_LEVELS > 2
70 void ___pmd_free_tlb(struct mmu_gather
*tlb
, pmd_t
*pmd
)
72 struct page
*page
= virt_to_page(pmd
);
73 paravirt_release_pmd(__pa(pmd
) >> PAGE_SHIFT
);
75 * NOTE! For PAE, any changes to the top page-directory-pointer-table
76 * entries need a full cr3 reload to flush.
79 tlb
->need_flush_all
= 1;
81 pgtable_pmd_page_dtor(page
);
82 tlb_remove_table(tlb
, page
);
85 #if CONFIG_PGTABLE_LEVELS > 3
86 void ___pud_free_tlb(struct mmu_gather
*tlb
, pud_t
*pud
)
88 paravirt_release_pud(__pa(pud
) >> PAGE_SHIFT
);
89 tlb_remove_table(tlb
, virt_to_page(pud
));
92 #if CONFIG_PGTABLE_LEVELS > 4
93 void ___p4d_free_tlb(struct mmu_gather
*tlb
, p4d_t
*p4d
)
95 paravirt_release_p4d(__pa(p4d
) >> PAGE_SHIFT
);
96 tlb_remove_table(tlb
, virt_to_page(p4d
));
98 #endif /* CONFIG_PGTABLE_LEVELS > 4 */
99 #endif /* CONFIG_PGTABLE_LEVELS > 3 */
100 #endif /* CONFIG_PGTABLE_LEVELS > 2 */
102 static inline void pgd_list_add(pgd_t
*pgd
)
104 struct page
*page
= virt_to_page(pgd
);
106 list_add(&page
->lru
, &pgd_list
);
109 static inline void pgd_list_del(pgd_t
*pgd
)
111 struct page
*page
= virt_to_page(pgd
);
113 list_del(&page
->lru
);
116 #define UNSHARED_PTRS_PER_PGD \
117 (SHARED_KERNEL_PMD ? KERNEL_PGD_BOUNDARY : PTRS_PER_PGD)
120 static void pgd_set_mm(pgd_t
*pgd
, struct mm_struct
*mm
)
122 virt_to_page(pgd
)->pt_mm
= mm
;
125 struct mm_struct
*pgd_page_get_mm(struct page
*page
)
130 static void pgd_ctor(struct mm_struct
*mm
, pgd_t
*pgd
)
132 /* If the pgd points to a shared pagetable level (either the
133 ptes in non-PAE, or shared PMD in PAE), then just copy the
134 references from swapper_pg_dir. */
135 if (CONFIG_PGTABLE_LEVELS
== 2 ||
136 (CONFIG_PGTABLE_LEVELS
== 3 && SHARED_KERNEL_PMD
) ||
137 CONFIG_PGTABLE_LEVELS
>= 4) {
138 clone_pgd_range(pgd
+ KERNEL_PGD_BOUNDARY
,
139 swapper_pg_dir
+ KERNEL_PGD_BOUNDARY
,
143 /* list required to sync kernel mapping updates */
144 if (!SHARED_KERNEL_PMD
) {
150 static void pgd_dtor(pgd_t
*pgd
)
152 if (SHARED_KERNEL_PMD
)
155 spin_lock(&pgd_lock
);
157 spin_unlock(&pgd_lock
);
161 * List of all pgd's needed for non-PAE so it can invalidate entries
162 * in both cached and uncached pgd's; not needed for PAE since the
163 * kernel pmd is shared. If PAE were not to share the pmd a similar
164 * tactic would be needed. This is essentially codepath-based locking
165 * against pageattr.c; it is the unique case in which a valid change
166 * of kernel pagetables can't be lazily synchronized by vmalloc faults.
167 * vmalloc faults work because attached pagetables are never freed.
171 #ifdef CONFIG_X86_PAE
173 * In PAE mode, we need to do a cr3 reload (=tlb flush) when
174 * updating the top-level pagetable entries to guarantee the
175 * processor notices the update. Since this is expensive, and
176 * all 4 top-level entries are used almost immediately in a
177 * new process's life, we just pre-populate them here.
179 * Also, if we're in a paravirt environment where the kernel pmd is
180 * not shared between pagetables (!SHARED_KERNEL_PMDS), we allocate
181 * and initialize the kernel pmds here.
183 #define PREALLOCATED_PMDS UNSHARED_PTRS_PER_PGD
185 void pud_populate(struct mm_struct
*mm
, pud_t
*pudp
, pmd_t
*pmd
)
187 paravirt_alloc_pmd(mm
, __pa(pmd
) >> PAGE_SHIFT
);
189 /* Note: almost everything apart from _PAGE_PRESENT is
190 reserved at the pmd (PDPT) level. */
191 set_pud(pudp
, __pud(__pa(pmd
) | _PAGE_PRESENT
));
194 * According to Intel App note "TLBs, Paging-Structure Caches,
195 * and Their Invalidation", April 2007, document 317080-001,
196 * section 8.1: in PAE mode we explicitly have to flush the
197 * TLB via cr3 if the top-level pgd is changed...
201 #else /* !CONFIG_X86_PAE */
203 /* No need to prepopulate any pagetable entries in non-PAE modes. */
204 #define PREALLOCATED_PMDS 0
206 #endif /* CONFIG_X86_PAE */
208 static void free_pmds(struct mm_struct
*mm
, pmd_t
*pmds
[])
212 for(i
= 0; i
< PREALLOCATED_PMDS
; i
++)
214 pgtable_pmd_page_dtor(virt_to_page(pmds
[i
]));
215 free_page((unsigned long)pmds
[i
]);
220 static int preallocate_pmds(struct mm_struct
*mm
, pmd_t
*pmds
[])
224 gfp_t gfp
= PGALLOC_GFP
;
227 gfp
&= ~__GFP_ACCOUNT
;
229 for(i
= 0; i
< PREALLOCATED_PMDS
; i
++) {
230 pmd_t
*pmd
= (pmd_t
*)__get_free_page(gfp
);
233 if (pmd
&& !pgtable_pmd_page_ctor(virt_to_page(pmd
))) {
234 free_page((unsigned long)pmd
);
252 * Mop up any pmd pages which may still be attached to the pgd.
253 * Normally they will be freed by munmap/exit_mmap, but any pmd we
254 * preallocate which never got a corresponding vma will need to be
257 static void pgd_mop_up_pmds(struct mm_struct
*mm
, pgd_t
*pgdp
)
261 for(i
= 0; i
< PREALLOCATED_PMDS
; i
++) {
264 if (pgd_val(pgd
) != 0) {
265 pmd_t
*pmd
= (pmd_t
*)pgd_page_vaddr(pgd
);
267 pgdp
[i
] = native_make_pgd(0);
269 paravirt_release_pmd(pgd_val(pgd
) >> PAGE_SHIFT
);
276 static void pgd_prepopulate_pmd(struct mm_struct
*mm
, pgd_t
*pgd
, pmd_t
*pmds
[])
282 if (PREALLOCATED_PMDS
== 0) /* Work around gcc-3.4.x bug */
285 p4d
= p4d_offset(pgd
, 0);
286 pud
= pud_offset(p4d
, 0);
288 for (i
= 0; i
< PREALLOCATED_PMDS
; i
++, pud
++) {
289 pmd_t
*pmd
= pmds
[i
];
291 if (i
>= KERNEL_PGD_BOUNDARY
)
292 memcpy(pmd
, (pmd_t
*)pgd_page_vaddr(swapper_pg_dir
[i
]),
293 sizeof(pmd_t
) * PTRS_PER_PMD
);
295 pud_populate(mm
, pud
, pmd
);
300 * Xen paravirt assumes pgd table should be in one page. 64 bit kernel also
301 * assumes that pgd should be in one page.
303 * But kernel with PAE paging that is not running as a Xen domain
304 * only needs to allocate 32 bytes for pgd instead of one page.
306 #ifdef CONFIG_X86_PAE
308 #include <linux/slab.h>
310 #define PGD_SIZE (PTRS_PER_PGD * sizeof(pgd_t))
313 static struct kmem_cache
*pgd_cache
;
315 static int __init
pgd_cache_init(void)
318 * When PAE kernel is running as a Xen domain, it does not use
319 * shared kernel pmd. And this requires a whole page for pgd.
321 if (!SHARED_KERNEL_PMD
)
325 * when PAE kernel is not running as a Xen domain, it uses
326 * shared kernel pmd. Shared kernel pmd does not require a whole
327 * page for pgd. We are able to just allocate a 32-byte for pgd.
328 * During boot time, we create a 32-byte slab for pgd table allocation.
330 pgd_cache
= kmem_cache_create("pgd_cache", PGD_SIZE
, PGD_ALIGN
,
337 core_initcall(pgd_cache_init
);
339 static inline pgd_t
*_pgd_alloc(void)
342 * If no SHARED_KERNEL_PMD, PAE kernel is running as a Xen domain.
343 * We allocate one page for pgd.
345 if (!SHARED_KERNEL_PMD
)
346 return (pgd_t
*)__get_free_page(PGALLOC_GFP
);
349 * Now PAE kernel is not running as a Xen domain. We can allocate
350 * a 32-byte slab for pgd to save memory space.
352 return kmem_cache_alloc(pgd_cache
, PGALLOC_GFP
);
355 static inline void _pgd_free(pgd_t
*pgd
)
357 if (!SHARED_KERNEL_PMD
)
358 free_page((unsigned long)pgd
);
360 kmem_cache_free(pgd_cache
, pgd
);
364 static inline pgd_t
*_pgd_alloc(void)
366 return (pgd_t
*)__get_free_pages(PGALLOC_GFP
, PGD_ALLOCATION_ORDER
);
369 static inline void _pgd_free(pgd_t
*pgd
)
371 free_pages((unsigned long)pgd
, PGD_ALLOCATION_ORDER
);
373 #endif /* CONFIG_X86_PAE */
375 pgd_t
*pgd_alloc(struct mm_struct
*mm
)
378 pmd_t
*pmds
[PREALLOCATED_PMDS
];
387 if (preallocate_pmds(mm
, pmds
) != 0)
390 if (paravirt_pgd_alloc(mm
) != 0)
394 * Make sure that pre-populating the pmds is atomic with
395 * respect to anything walking the pgd_list, so that they
396 * never see a partially populated pgd.
398 spin_lock(&pgd_lock
);
401 pgd_prepopulate_pmd(mm
, pgd
, pmds
);
403 spin_unlock(&pgd_lock
);
415 void pgd_free(struct mm_struct
*mm
, pgd_t
*pgd
)
417 pgd_mop_up_pmds(mm
, pgd
);
419 paravirt_pgd_free(mm
, pgd
);
424 * Used to set accessed or dirty bits in the page table entries
425 * on other architectures. On x86, the accessed and dirty bits
426 * are tracked by hardware. However, do_wp_page calls this function
427 * to also make the pte writeable at the same time the dirty bit is
428 * set. In that case we do actually need to write the PTE.
430 int ptep_set_access_flags(struct vm_area_struct
*vma
,
431 unsigned long address
, pte_t
*ptep
,
432 pte_t entry
, int dirty
)
434 int changed
= !pte_same(*ptep
, entry
);
436 if (changed
&& dirty
)
442 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
443 int pmdp_set_access_flags(struct vm_area_struct
*vma
,
444 unsigned long address
, pmd_t
*pmdp
,
445 pmd_t entry
, int dirty
)
447 int changed
= !pmd_same(*pmdp
, entry
);
449 VM_BUG_ON(address
& ~HPAGE_PMD_MASK
);
451 if (changed
&& dirty
) {
454 * We had a write-protection fault here and changed the pmd
455 * to to more permissive. No need to flush the TLB for that,
456 * #PF is architecturally guaranteed to do that and in the
457 * worst-case we'll generate a spurious fault.
464 int pudp_set_access_flags(struct vm_area_struct
*vma
, unsigned long address
,
465 pud_t
*pudp
, pud_t entry
, int dirty
)
467 int changed
= !pud_same(*pudp
, entry
);
469 VM_BUG_ON(address
& ~HPAGE_PUD_MASK
);
471 if (changed
&& dirty
) {
474 * We had a write-protection fault here and changed the pud
475 * to to more permissive. No need to flush the TLB for that,
476 * #PF is architecturally guaranteed to do that and in the
477 * worst-case we'll generate a spurious fault.
485 int ptep_test_and_clear_young(struct vm_area_struct
*vma
,
486 unsigned long addr
, pte_t
*ptep
)
490 if (pte_young(*ptep
))
491 ret
= test_and_clear_bit(_PAGE_BIT_ACCESSED
,
492 (unsigned long *) &ptep
->pte
);
497 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
498 int pmdp_test_and_clear_young(struct vm_area_struct
*vma
,
499 unsigned long addr
, pmd_t
*pmdp
)
503 if (pmd_young(*pmdp
))
504 ret
= test_and_clear_bit(_PAGE_BIT_ACCESSED
,
505 (unsigned long *)pmdp
);
509 int pudp_test_and_clear_young(struct vm_area_struct
*vma
,
510 unsigned long addr
, pud_t
*pudp
)
514 if (pud_young(*pudp
))
515 ret
= test_and_clear_bit(_PAGE_BIT_ACCESSED
,
516 (unsigned long *)pudp
);
522 int ptep_clear_flush_young(struct vm_area_struct
*vma
,
523 unsigned long address
, pte_t
*ptep
)
526 * On x86 CPUs, clearing the accessed bit without a TLB flush
527 * doesn't cause data corruption. [ It could cause incorrect
528 * page aging and the (mistaken) reclaim of hot pages, but the
529 * chance of that should be relatively low. ]
531 * So as a performance optimization don't flush the TLB when
532 * clearing the accessed bit, it will eventually be flushed by
533 * a context switch or a VM operation anyway. [ In the rare
534 * event of it not getting flushed for a long time the delay
535 * shouldn't really matter because there's no real memory
536 * pressure for swapout to react to. ]
538 return ptep_test_and_clear_young(vma
, address
, ptep
);
541 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
542 int pmdp_clear_flush_young(struct vm_area_struct
*vma
,
543 unsigned long address
, pmd_t
*pmdp
)
547 VM_BUG_ON(address
& ~HPAGE_PMD_MASK
);
549 young
= pmdp_test_and_clear_young(vma
, address
, pmdp
);
551 flush_tlb_range(vma
, address
, address
+ HPAGE_PMD_SIZE
);
558 * reserve_top_address - reserves a hole in the top of kernel address space
559 * @reserve - size of hole to reserve
561 * Can be used to relocate the fixmap area and poke a hole in the top
562 * of kernel address space to make room for a hypervisor.
564 void __init
reserve_top_address(unsigned long reserve
)
567 BUG_ON(fixmaps_set
> 0);
568 __FIXADDR_TOP
= round_down(-reserve
, 1 << PMD_SHIFT
) - PAGE_SIZE
;
569 printk(KERN_INFO
"Reserving virtual address space above 0x%08lx (rounded to 0x%08lx)\n",
570 -reserve
, __FIXADDR_TOP
+ PAGE_SIZE
);
576 void __native_set_fixmap(enum fixed_addresses idx
, pte_t pte
)
578 unsigned long address
= __fix_to_virt(idx
);
580 if (idx
>= __end_of_fixed_addresses
) {
584 set_pte_vaddr(address
, pte
);
588 void native_set_fixmap(enum fixed_addresses idx
, phys_addr_t phys
,
591 /* Sanitize 'prot' against any unsupported bits: */
592 pgprot_val(flags
) &= __default_kernel_pte_mask
;
594 __native_set_fixmap(idx
, pfn_pte(phys
>> PAGE_SHIFT
, flags
));
597 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
598 #ifdef CONFIG_X86_5LEVEL
600 * p4d_set_huge - setup kernel P4D mapping
602 * No 512GB pages yet -- always return 0
604 int p4d_set_huge(p4d_t
*p4d
, phys_addr_t addr
, pgprot_t prot
)
610 * p4d_clear_huge - clear kernel P4D mapping when it is set
612 * No 512GB pages yet -- always return 0
614 int p4d_clear_huge(p4d_t
*p4d
)
621 * pud_set_huge - setup kernel PUD mapping
623 * MTRRs can override PAT memory types with 4KiB granularity. Therefore, this
624 * function sets up a huge page only if any of the following conditions are met:
626 * - MTRRs are disabled, or
628 * - MTRRs are enabled and the range is completely covered by a single MTRR, or
630 * - MTRRs are enabled and the corresponding MTRR memory type is WB, which
631 * has no effect on the requested PAT memory type.
633 * Callers should try to decrease page size (1GB -> 2MB -> 4K) if the bigger
634 * page mapping attempt fails.
636 * Returns 1 on success and 0 on failure.
638 int pud_set_huge(pud_t
*pud
, phys_addr_t addr
, pgprot_t prot
)
642 mtrr
= mtrr_type_lookup(addr
, addr
+ PUD_SIZE
, &uniform
);
643 if ((mtrr
!= MTRR_TYPE_INVALID
) && (!uniform
) &&
644 (mtrr
!= MTRR_TYPE_WRBACK
))
647 /* Bail out if we are we on a populated non-leaf entry: */
648 if (pud_present(*pud
) && !pud_huge(*pud
))
651 prot
= pgprot_4k_2_large(prot
);
653 set_pte((pte_t
*)pud
, pfn_pte(
654 (u64
)addr
>> PAGE_SHIFT
,
655 __pgprot(pgprot_val(prot
) | _PAGE_PSE
)));
661 * pmd_set_huge - setup kernel PMD mapping
663 * See text over pud_set_huge() above.
665 * Returns 1 on success and 0 on failure.
667 int pmd_set_huge(pmd_t
*pmd
, phys_addr_t addr
, pgprot_t prot
)
671 mtrr
= mtrr_type_lookup(addr
, addr
+ PMD_SIZE
, &uniform
);
672 if ((mtrr
!= MTRR_TYPE_INVALID
) && (!uniform
) &&
673 (mtrr
!= MTRR_TYPE_WRBACK
)) {
674 pr_warn_once("%s: Cannot satisfy [mem %#010llx-%#010llx] with a huge-page mapping due to MTRR override.\n",
675 __func__
, addr
, addr
+ PMD_SIZE
);
679 /* Bail out if we are we on a populated non-leaf entry: */
680 if (pmd_present(*pmd
) && !pmd_huge(*pmd
))
683 prot
= pgprot_4k_2_large(prot
);
685 set_pte((pte_t
*)pmd
, pfn_pte(
686 (u64
)addr
>> PAGE_SHIFT
,
687 __pgprot(pgprot_val(prot
) | _PAGE_PSE
)));
693 * pud_clear_huge - clear kernel PUD mapping when it is set
695 * Returns 1 on success and 0 on failure (no PUD map is found).
697 int pud_clear_huge(pud_t
*pud
)
699 if (pud_large(*pud
)) {
708 * pmd_clear_huge - clear kernel PMD mapping when it is set
710 * Returns 1 on success and 0 on failure (no PMD map is found).
712 int pmd_clear_huge(pmd_t
*pmd
)
714 if (pmd_large(*pmd
)) {
724 * pud_free_pmd_page - Clear pud entry and free pmd page.
725 * @pud: Pointer to a PUD.
726 * @addr: Virtual address associated with pud.
728 * Context: The pud range has been unmapped and TLB purged.
729 * Return: 1 if clearing the entry succeeded. 0 otherwise.
731 * NOTE: Callers must allow a single page allocation.
733 int pud_free_pmd_page(pud_t
*pud
, unsigned long addr
)
742 pmd
= (pmd_t
*)pud_page_vaddr(*pud
);
743 pmd_sv
= (pmd_t
*)__get_free_page(GFP_KERNEL
);
747 for (i
= 0; i
< PTRS_PER_PMD
; i
++) {
749 if (!pmd_none(pmd
[i
]))
755 /* INVLPG to clear all paging-structure caches */
756 flush_tlb_kernel_range(addr
, addr
+ PAGE_SIZE
-1);
758 for (i
= 0; i
< PTRS_PER_PMD
; i
++) {
759 if (!pmd_none(pmd_sv
[i
])) {
760 pte
= (pte_t
*)pmd_page_vaddr(pmd_sv
[i
]);
761 free_page((unsigned long)pte
);
765 free_page((unsigned long)pmd_sv
);
766 free_page((unsigned long)pmd
);
772 * pmd_free_pte_page - Clear pmd entry and free pte page.
773 * @pmd: Pointer to a PMD.
774 * @addr: Virtual address associated with pmd.
776 * Context: The pmd range has been unmapped and TLB purged.
777 * Return: 1 if clearing the entry succeeded. 0 otherwise.
779 int pmd_free_pte_page(pmd_t
*pmd
, unsigned long addr
)
786 pte
= (pte_t
*)pmd_page_vaddr(*pmd
);
789 /* INVLPG to clear all paging-structure caches */
790 flush_tlb_kernel_range(addr
, addr
+ PAGE_SIZE
-1);
792 free_page((unsigned long)pte
);
797 #else /* !CONFIG_X86_64 */
799 int pud_free_pmd_page(pud_t
*pud
, unsigned long addr
)
801 return pud_none(*pud
);
805 * Disable free page handling on x86-PAE. This assures that ioremap()
806 * does not update sync'd pmd entries. See vmalloc_sync_one().
808 int pmd_free_pte_page(pmd_t
*pmd
, unsigned long addr
)
810 return pmd_none(*pmd
);
813 #endif /* CONFIG_X86_64 */
814 #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */