2 * Low-Level PCI Support for PC
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
7 #include <linux/sched.h>
9 #include <linux/pci-acpi.h>
10 #include <linux/ioport.h>
11 #include <linux/init.h>
12 #include <linux/dmi.h>
13 #include <linux/slab.h>
16 #include <asm/segment.h>
19 #include <asm/pci_x86.h>
20 #include <asm/setup.h>
22 unsigned int pci_probe
= PCI_PROBE_BIOS
| PCI_PROBE_CONF1
| PCI_PROBE_CONF2
|
25 unsigned int pci_early_dump_regs
;
26 static int pci_bf_sort
;
29 #ifdef CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS
30 int noioapicreroute
= 0;
32 int noioapicreroute
= 1;
34 int pcibios_last_bus
= -1;
35 unsigned long pirq_table_addr
;
36 const struct pci_raw_ops
*__read_mostly raw_pci_ops
;
37 const struct pci_raw_ops
*__read_mostly raw_pci_ext_ops
;
39 int raw_pci_read(unsigned int domain
, unsigned int bus
, unsigned int devfn
,
40 int reg
, int len
, u32
*val
)
42 if (domain
== 0 && reg
< 256 && raw_pci_ops
)
43 return raw_pci_ops
->read(domain
, bus
, devfn
, reg
, len
, val
);
45 return raw_pci_ext_ops
->read(domain
, bus
, devfn
, reg
, len
, val
);
49 int raw_pci_write(unsigned int domain
, unsigned int bus
, unsigned int devfn
,
50 int reg
, int len
, u32 val
)
52 if (domain
== 0 && reg
< 256 && raw_pci_ops
)
53 return raw_pci_ops
->write(domain
, bus
, devfn
, reg
, len
, val
);
55 return raw_pci_ext_ops
->write(domain
, bus
, devfn
, reg
, len
, val
);
59 static int pci_read(struct pci_bus
*bus
, unsigned int devfn
, int where
, int size
, u32
*value
)
61 return raw_pci_read(pci_domain_nr(bus
), bus
->number
,
62 devfn
, where
, size
, value
);
65 static int pci_write(struct pci_bus
*bus
, unsigned int devfn
, int where
, int size
, u32 value
)
67 return raw_pci_write(pci_domain_nr(bus
), bus
->number
,
68 devfn
, where
, size
, value
);
71 struct pci_ops pci_root_ops
= {
77 * This interrupt-safe spinlock protects all accesses to PCI configuration
78 * space, except for the mmconfig (ECAM) based operations.
80 DEFINE_RAW_SPINLOCK(pci_config_lock
);
82 static int __init
can_skip_ioresource_align(const struct dmi_system_id
*d
)
84 pci_probe
|= PCI_CAN_SKIP_ISA_ALIGN
;
85 printk(KERN_INFO
"PCI: %s detected, can skip ISA alignment\n", d
->ident
);
89 static const struct dmi_system_id can_skip_pciprobe_dmi_table
[] __initconst
= {
91 * Systems where PCI IO resource ISA alignment can be skipped
92 * when the ISA enable bit in the bridge control is not set
95 .callback
= can_skip_ioresource_align
,
96 .ident
= "IBM System x3800",
98 DMI_MATCH(DMI_SYS_VENDOR
, "IBM"),
99 DMI_MATCH(DMI_PRODUCT_NAME
, "x3800"),
103 .callback
= can_skip_ioresource_align
,
104 .ident
= "IBM System x3850",
106 DMI_MATCH(DMI_SYS_VENDOR
, "IBM"),
107 DMI_MATCH(DMI_PRODUCT_NAME
, "x3850"),
111 .callback
= can_skip_ioresource_align
,
112 .ident
= "IBM System x3950",
114 DMI_MATCH(DMI_SYS_VENDOR
, "IBM"),
115 DMI_MATCH(DMI_PRODUCT_NAME
, "x3950"),
121 void __init
dmi_check_skip_isa_align(void)
123 dmi_check_system(can_skip_pciprobe_dmi_table
);
126 static void pcibios_fixup_device_resources(struct pci_dev
*dev
)
128 struct resource
*rom_r
= &dev
->resource
[PCI_ROM_RESOURCE
];
129 struct resource
*bar_r
;
132 if (pci_probe
& PCI_NOASSIGN_BARS
) {
134 * If the BIOS did not assign the BAR, zero out the
135 * resource so the kernel doesn't attempt to assign
136 * it later on in pci_assign_unassigned_resources
138 for (bar
= 0; bar
<= PCI_STD_RESOURCE_END
; bar
++) {
139 bar_r
= &dev
->resource
[bar
];
140 if (bar_r
->start
== 0 && bar_r
->end
!= 0) {
147 if (pci_probe
& PCI_NOASSIGN_ROMS
) {
151 /* we deal with BIOS assigned ROM later */
154 rom_r
->start
= rom_r
->end
= rom_r
->flags
= 0;
159 * Called after each bus is probed, but before its children
163 void pcibios_fixup_bus(struct pci_bus
*b
)
167 pci_read_bridge_bases(b
);
168 list_for_each_entry(dev
, &b
->devices
, bus_list
)
169 pcibios_fixup_device_resources(dev
);
172 void pcibios_add_bus(struct pci_bus
*bus
)
174 acpi_pci_add_bus(bus
);
177 void pcibios_remove_bus(struct pci_bus
*bus
)
179 acpi_pci_remove_bus(bus
);
183 * Only use DMI information to set this if nothing was passed
184 * on the kernel command line (which was parsed earlier).
187 static int __init
set_bf_sort(const struct dmi_system_id
*d
)
189 if (pci_bf_sort
== pci_bf_sort_default
) {
190 pci_bf_sort
= pci_dmi_bf
;
191 printk(KERN_INFO
"PCI: %s detected, enabling pci=bfsort.\n", d
->ident
);
196 static void __init
read_dmi_type_b1(const struct dmi_header
*dm
,
199 u8
*data
= (u8
*)dm
+ 4;
201 if (dm
->type
!= 0xB1)
203 if ((((*(u32
*)data
) >> 9) & 0x03) == 0x01)
204 set_bf_sort((const struct dmi_system_id
*)private_data
);
207 static int __init
find_sort_method(const struct dmi_system_id
*d
)
209 dmi_walk(read_dmi_type_b1
, (void *)d
);
214 * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
217 static int __init
assign_all_busses(const struct dmi_system_id
*d
)
219 pci_probe
|= PCI_ASSIGN_ALL_BUSSES
;
220 printk(KERN_INFO
"%s detected: enabling PCI bus# renumbering"
221 " (pci=assign-busses)\n", d
->ident
);
226 static int __init
set_scan_all(const struct dmi_system_id
*d
)
228 printk(KERN_INFO
"PCI: %s detected, enabling pci=pcie_scan_all\n",
230 pci_add_flags(PCI_SCAN_ALL_PCIE_DEVS
);
234 static const struct dmi_system_id pciprobe_dmi_table
[] __initconst
= {
237 * Laptops which need pci=assign-busses to see Cardbus cards
240 .callback
= assign_all_busses
,
241 .ident
= "Samsung X20 Laptop",
243 DMI_MATCH(DMI_SYS_VENDOR
, "Samsung Electronics"),
244 DMI_MATCH(DMI_PRODUCT_NAME
, "SX20S"),
247 #endif /* __i386__ */
249 .callback
= set_bf_sort
,
250 .ident
= "Dell PowerEdge 1950",
252 DMI_MATCH(DMI_SYS_VENDOR
, "Dell"),
253 DMI_MATCH(DMI_PRODUCT_NAME
, "PowerEdge 1950"),
257 .callback
= set_bf_sort
,
258 .ident
= "Dell PowerEdge 1955",
260 DMI_MATCH(DMI_SYS_VENDOR
, "Dell"),
261 DMI_MATCH(DMI_PRODUCT_NAME
, "PowerEdge 1955"),
265 .callback
= set_bf_sort
,
266 .ident
= "Dell PowerEdge 2900",
268 DMI_MATCH(DMI_SYS_VENDOR
, "Dell"),
269 DMI_MATCH(DMI_PRODUCT_NAME
, "PowerEdge 2900"),
273 .callback
= set_bf_sort
,
274 .ident
= "Dell PowerEdge 2950",
276 DMI_MATCH(DMI_SYS_VENDOR
, "Dell"),
277 DMI_MATCH(DMI_PRODUCT_NAME
, "PowerEdge 2950"),
281 .callback
= set_bf_sort
,
282 .ident
= "Dell PowerEdge R900",
284 DMI_MATCH(DMI_SYS_VENDOR
, "Dell"),
285 DMI_MATCH(DMI_PRODUCT_NAME
, "PowerEdge R900"),
289 .callback
= find_sort_method
,
290 .ident
= "Dell System",
292 DMI_MATCH(DMI_SYS_VENDOR
, "Dell Inc"),
296 .callback
= set_bf_sort
,
297 .ident
= "HP ProLiant BL20p G3",
299 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
300 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant BL20p G3"),
304 .callback
= set_bf_sort
,
305 .ident
= "HP ProLiant BL20p G4",
307 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
308 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant BL20p G4"),
312 .callback
= set_bf_sort
,
313 .ident
= "HP ProLiant BL30p G1",
315 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
316 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant BL30p G1"),
320 .callback
= set_bf_sort
,
321 .ident
= "HP ProLiant BL25p G1",
323 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
324 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant BL25p G1"),
328 .callback
= set_bf_sort
,
329 .ident
= "HP ProLiant BL35p G1",
331 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
332 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant BL35p G1"),
336 .callback
= set_bf_sort
,
337 .ident
= "HP ProLiant BL45p G1",
339 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
340 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant BL45p G1"),
344 .callback
= set_bf_sort
,
345 .ident
= "HP ProLiant BL45p G2",
347 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
348 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant BL45p G2"),
352 .callback
= set_bf_sort
,
353 .ident
= "HP ProLiant BL460c G1",
355 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
356 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant BL460c G1"),
360 .callback
= set_bf_sort
,
361 .ident
= "HP ProLiant BL465c G1",
363 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
364 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant BL465c G1"),
368 .callback
= set_bf_sort
,
369 .ident
= "HP ProLiant BL480c G1",
371 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
372 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant BL480c G1"),
376 .callback
= set_bf_sort
,
377 .ident
= "HP ProLiant BL685c G1",
379 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
380 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant BL685c G1"),
384 .callback
= set_bf_sort
,
385 .ident
= "HP ProLiant DL360",
387 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
388 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant DL360"),
392 .callback
= set_bf_sort
,
393 .ident
= "HP ProLiant DL380",
395 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
396 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant DL380"),
401 .callback
= assign_all_busses
,
402 .ident
= "Compaq EVO N800c",
404 DMI_MATCH(DMI_SYS_VENDOR
, "Compaq"),
405 DMI_MATCH(DMI_PRODUCT_NAME
, "EVO N800c"),
410 .callback
= set_bf_sort
,
411 .ident
= "HP ProLiant DL385 G2",
413 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
414 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant DL385 G2"),
418 .callback
= set_bf_sort
,
419 .ident
= "HP ProLiant DL585 G2",
421 DMI_MATCH(DMI_SYS_VENDOR
, "HP"),
422 DMI_MATCH(DMI_PRODUCT_NAME
, "ProLiant DL585 G2"),
426 .callback
= set_scan_all
,
427 .ident
= "Stratus/NEC ftServer",
429 DMI_MATCH(DMI_SYS_VENDOR
, "Stratus"),
430 DMI_MATCH(DMI_PRODUCT_NAME
, "ftServer"),
434 .callback
= set_scan_all
,
435 .ident
= "Stratus/NEC ftServer",
437 DMI_MATCH(DMI_SYS_VENDOR
, "NEC"),
438 DMI_MATCH(DMI_PRODUCT_NAME
, "Express5800/R32"),
442 .callback
= set_scan_all
,
443 .ident
= "Stratus/NEC ftServer",
445 DMI_MATCH(DMI_SYS_VENDOR
, "NEC"),
446 DMI_MATCH(DMI_PRODUCT_NAME
, "Express5800/R31"),
452 void __init
dmi_check_pciprobe(void)
454 dmi_check_system(pciprobe_dmi_table
);
457 void pcibios_scan_root(int busnum
)
460 struct pci_sysdata
*sd
;
461 LIST_HEAD(resources
);
463 sd
= kzalloc(sizeof(*sd
), GFP_KERNEL
);
465 printk(KERN_ERR
"PCI: OOM, skipping PCI bus %02x\n", busnum
);
468 sd
->node
= x86_pci_root_bus_node(busnum
);
469 x86_pci_root_bus_resources(busnum
, &resources
);
470 printk(KERN_DEBUG
"PCI: Probing PCI hardware (bus %02x)\n", busnum
);
471 bus
= pci_scan_root_bus(NULL
, busnum
, &pci_root_ops
, sd
, &resources
);
473 pci_free_resource_list(&resources
);
477 pci_bus_add_devices(bus
);
480 void __init
pcibios_set_cache_line_size(void)
482 struct cpuinfo_x86
*c
= &boot_cpu_data
;
485 * Set PCI cacheline size to that of the CPU if the CPU has reported it.
486 * (For older CPUs that don't support cpuid, we se it to 32 bytes
487 * It's also good for 386/486s (which actually have 16)
488 * as quite a few PCI devices do not support smaller values.
490 if (c
->x86_clflush_size
> 0) {
491 pci_dfl_cache_line_size
= c
->x86_clflush_size
>> 2;
492 printk(KERN_DEBUG
"PCI: pci_cache_line_size set to %d bytes\n",
493 pci_dfl_cache_line_size
<< 2);
495 pci_dfl_cache_line_size
= 32 >> 2;
496 printk(KERN_DEBUG
"PCI: Unknown cacheline size. Setting to 32 bytes\n");
500 int __init
pcibios_init(void)
502 if (!raw_pci_ops
&& !raw_pci_ext_ops
) {
503 printk(KERN_WARNING
"PCI: System does not support PCI\n");
507 pcibios_set_cache_line_size();
508 pcibios_resource_survey();
510 if (pci_bf_sort
>= pci_force_bf
)
511 pci_sort_breadthfirst();
515 char *__init
pcibios_setup(char *str
)
517 if (!strcmp(str
, "off")) {
520 } else if (!strcmp(str
, "bfsort")) {
521 pci_bf_sort
= pci_force_bf
;
523 } else if (!strcmp(str
, "nobfsort")) {
524 pci_bf_sort
= pci_force_nobf
;
527 #ifdef CONFIG_PCI_BIOS
528 else if (!strcmp(str
, "bios")) {
529 pci_probe
= PCI_PROBE_BIOS
;
531 } else if (!strcmp(str
, "nobios")) {
532 pci_probe
&= ~PCI_PROBE_BIOS
;
534 } else if (!strcmp(str
, "biosirq")) {
535 pci_probe
|= PCI_BIOS_IRQ_SCAN
;
537 } else if (!strncmp(str
, "pirqaddr=", 9)) {
538 pirq_table_addr
= simple_strtoul(str
+9, NULL
, 0);
542 #ifdef CONFIG_PCI_DIRECT
543 else if (!strcmp(str
, "conf1")) {
544 pci_probe
= PCI_PROBE_CONF1
| PCI_NO_CHECKS
;
547 else if (!strcmp(str
, "conf2")) {
548 pci_probe
= PCI_PROBE_CONF2
| PCI_NO_CHECKS
;
552 #ifdef CONFIG_PCI_MMCONFIG
553 else if (!strcmp(str
, "nommconf")) {
554 pci_probe
&= ~PCI_PROBE_MMCONF
;
557 else if (!strcmp(str
, "check_enable_amd_mmconf")) {
558 pci_probe
|= PCI_CHECK_ENABLE_AMD_MMCONF
;
562 else if (!strcmp(str
, "noacpi")) {
566 else if (!strcmp(str
, "noearly")) {
567 pci_probe
|= PCI_PROBE_NOEARLY
;
570 else if (!strcmp(str
, "usepirqmask")) {
571 pci_probe
|= PCI_USE_PIRQ_MASK
;
573 } else if (!strncmp(str
, "irqmask=", 8)) {
574 pcibios_irq_mask
= simple_strtol(str
+8, NULL
, 0);
576 } else if (!strncmp(str
, "lastbus=", 8)) {
577 pcibios_last_bus
= simple_strtol(str
+8, NULL
, 0);
579 } else if (!strcmp(str
, "rom")) {
580 pci_probe
|= PCI_ASSIGN_ROMS
;
582 } else if (!strcmp(str
, "norom")) {
583 pci_probe
|= PCI_NOASSIGN_ROMS
;
585 } else if (!strcmp(str
, "nobar")) {
586 pci_probe
|= PCI_NOASSIGN_BARS
;
588 } else if (!strcmp(str
, "assign-busses")) {
589 pci_probe
|= PCI_ASSIGN_ALL_BUSSES
;
591 } else if (!strcmp(str
, "use_crs")) {
592 pci_probe
|= PCI_USE__CRS
;
594 } else if (!strcmp(str
, "nocrs")) {
595 pci_probe
|= PCI_ROOT_NO_CRS
;
597 #ifdef CONFIG_PHYS_ADDR_T_64BIT
598 } else if (!strcmp(str
, "big_root_window")) {
599 pci_probe
|= PCI_BIG_ROOT_WINDOW
;
602 } else if (!strcmp(str
, "earlydump")) {
603 pci_early_dump_regs
= 1;
605 } else if (!strcmp(str
, "routeirq")) {
608 } else if (!strcmp(str
, "skip_isa_align")) {
609 pci_probe
|= PCI_CAN_SKIP_ISA_ALIGN
;
611 } else if (!strcmp(str
, "noioapicquirk")) {
614 } else if (!strcmp(str
, "ioapicreroute")) {
615 if (noioapicreroute
!= -1)
618 } else if (!strcmp(str
, "noioapicreroute")) {
619 if (noioapicreroute
!= -1)
626 unsigned int pcibios_assign_all_busses(void)
628 return (pci_probe
& PCI_ASSIGN_ALL_BUSSES
) ? 1 : 0;
631 #if defined(CONFIG_X86_DEV_DMA_OPS) && defined(CONFIG_PCI_DOMAINS)
632 static LIST_HEAD(dma_domain_list
);
633 static DEFINE_SPINLOCK(dma_domain_list_lock
);
635 void add_dma_domain(struct dma_domain
*domain
)
637 spin_lock(&dma_domain_list_lock
);
638 list_add(&domain
->node
, &dma_domain_list
);
639 spin_unlock(&dma_domain_list_lock
);
641 EXPORT_SYMBOL_GPL(add_dma_domain
);
643 void del_dma_domain(struct dma_domain
*domain
)
645 spin_lock(&dma_domain_list_lock
);
646 list_del(&domain
->node
);
647 spin_unlock(&dma_domain_list_lock
);
649 EXPORT_SYMBOL_GPL(del_dma_domain
);
651 static void set_dma_domain_ops(struct pci_dev
*pdev
)
653 struct dma_domain
*domain
;
655 spin_lock(&dma_domain_list_lock
);
656 list_for_each_entry(domain
, &dma_domain_list
, node
) {
657 if (pci_domain_nr(pdev
->bus
) == domain
->domain_nr
) {
658 pdev
->dev
.dma_ops
= domain
->dma_ops
;
662 spin_unlock(&dma_domain_list_lock
);
665 static void set_dma_domain_ops(struct pci_dev
*pdev
) {}
668 static void set_dev_domain_options(struct pci_dev
*pdev
)
670 if (is_vmd(pdev
->bus
))
671 pdev
->hotplug_user_indicators
= 1;
674 int pcibios_add_device(struct pci_dev
*dev
)
676 struct setup_data
*data
;
677 struct pci_setup_rom
*rom
;
680 pa_data
= boot_params
.hdr
.setup_data
;
682 data
= memremap(pa_data
, sizeof(*rom
), MEMREMAP_WB
);
686 if (data
->type
== SETUP_PCI
) {
687 rom
= (struct pci_setup_rom
*)data
;
689 if ((pci_domain_nr(dev
->bus
) == rom
->segment
) &&
690 (dev
->bus
->number
== rom
->bus
) &&
691 (PCI_SLOT(dev
->devfn
) == rom
->device
) &&
692 (PCI_FUNC(dev
->devfn
) == rom
->function
) &&
693 (dev
->vendor
== rom
->vendor
) &&
694 (dev
->device
== rom
->devid
)) {
696 offsetof(struct pci_setup_rom
, romdata
);
697 dev
->romlen
= rom
->pcilen
;
700 pa_data
= data
->next
;
703 set_dma_domain_ops(dev
);
704 set_dev_domain_options(dev
);
708 int pcibios_enable_device(struct pci_dev
*dev
, int mask
)
712 if ((err
= pci_enable_resources(dev
, mask
)) < 0)
715 if (!pci_dev_msi_enabled(dev
))
716 return pcibios_enable_irq(dev
);
720 void pcibios_disable_device (struct pci_dev
*dev
)
722 if (!pci_dev_msi_enabled(dev
) && pcibios_disable_irq
)
723 pcibios_disable_irq(dev
);
726 #ifdef CONFIG_ACPI_HOTPLUG_IOAPIC
727 void pcibios_release_device(struct pci_dev
*dev
)
729 if (atomic_dec_return(&dev
->enable_cnt
) >= 0)
730 pcibios_disable_device(dev
);
735 int pci_ext_cfg_avail(void)