2 * mfld.c: Intel Medfield platform setup code
4 * (C) Copyright 2013 Intel Corporation
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; version 2
12 #include <linux/init.h>
15 #include <asm/intel-mid.h>
16 #include <asm/intel_mid_vrtc.h>
18 #include "intel_mid_weak_decls.h"
20 static unsigned long __init
mfld_calibrate_tsc(void)
22 unsigned long fast_calibrate
;
23 u32 lo
, hi
, ratio
, fsb
;
25 rdmsr(MSR_IA32_PERF_STATUS
, lo
, hi
);
26 pr_debug("IA32 perf status is 0x%x, 0x%0x\n", lo
, hi
);
27 ratio
= (hi
>> 8) & 0x1f;
28 pr_debug("ratio is %d\n", ratio
);
30 pr_err("read a zero ratio, should be incorrect!\n");
31 pr_err("force tsc ratio to 16 ...\n");
34 rdmsr(MSR_FSB_FREQ
, lo
, hi
);
35 if ((lo
& 0x7) == 0x7)
38 fsb
= FSB_FREQ_100SKU
;
39 fast_calibrate
= ratio
* fsb
;
40 pr_debug("read penwell tsc %lu khz\n", fast_calibrate
);
41 lapic_timer_frequency
= fsb
* 1000 / HZ
;
44 * TSC on Intel Atom SoCs is reliable and of known frequency.
45 * See tsc_msr.c for details.
47 setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ
);
48 setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE
);
50 return fast_calibrate
;
53 static void __init
penwell_arch_setup(void)
55 x86_platform
.calibrate_tsc
= mfld_calibrate_tsc
;
58 static struct intel_mid_ops penwell_ops
= {
59 .arch_setup
= penwell_arch_setup
,
62 void *get_penwell_ops(void)
67 void *get_cloverview_ops(void)