2 * include/asm-xtensa/asmmacro.h
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
8 * Copyright (C) 2005 Tensilica Inc.
11 #ifndef _XTENSA_ASMMACRO_H
12 #define _XTENSA_ASMMACRO_H
14 #include <variant/core.h>
17 * Some little helpers for loops. Use zero-overhead-loops
18 * where applicable and if supported by the processor.
20 * __loopi ar, at, size, inc
21 * ar register initialized with the start address
22 * at scratch register used by macro
23 * size size immediate value
26 * __loops ar, as, at, inc_log2[, mask_log2][, cond][, ncond]
27 * ar register initialized with the start address
28 * as register initialized with the size
29 * at scratch register use by macro
30 * inc_log2 increment [in log2]
31 * mask_log2 mask [in log2]
32 * cond true condition (used in loop'cond')
33 * ncond false condition (used in b'ncond')
36 * restart loop. 'as' register must not have been modified!
38 * __endla ar, as, incr
39 * ar start address (modified)
40 * as scratch register used by __loops/__loopi macros or
41 * end address used by __loopt macro
46 * loop for given size as immediate
49 .macro __loopi ar
, at
, size
, incr
52 movi
\at
, ((\size
+ \incr
- 1) / (\incr
))
62 * loop for given size in register
65 .macro __loops ar
, as
, at
, incr_log2
, mask_log2
, cond
, ncond
69 addi
\at
, \as
, (1 << \incr_log2
) - 1
71 extui
\at
, \at
, \incr_log2
, \mask_log2
73 srli
\at
, \at
, \incr_log2
79 extui
\at
, \as
, \incr_log2
, \mask_log2
82 srli
\at
, \as
, \incr_log2
90 slli
\at
, \at
, \incr_log2
104 .macro __loopt ar
, as
, at
, incr_log2
109 addi
\at
, \at
, (1 << \incr_log2
) - 1
110 srli
\at
, \at
, \incr_log2
120 * restart loop. registers must be unchanged
134 * end of loop with no increment of the address.
138 #if !XCHAL_HAVE_LOOPS
145 * end of loop with increment of the address.
148 .macro __endla ar
, as
, incr
153 /* Load or store instructions that may cause exceptions use the EX macro. */
155 #define EX(handler) \
156 .section __ex_table, "a"; \
157 .word 97f, handler; \
163 * Extract unaligned word that is split between two registers w0 and w1
164 * into r regardless of machine endianness. SAR must be loaded with the
165 * starting bit of the word (see __ssa8).
168 .macro __src_b r
, w0
, w1
177 * Load 2 lowest address bits of r into SAR for __src_b to extract unaligned
178 * word starting at r from two registers loaded from consecutive aligned
179 * addresses covering r regardless of machine endianness.
194 #endif /* _XTENSA_ASMMACRO_H */