arch/xtensa/include/uapi/asm/swab.h

   1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
   2 /*
   3  * include/asm-xtensa/swab.h
   4  *
   5  * This file is subject to the terms and conditions of the GNU General Public
   6  * License.  See the file "COPYING" in the main directory of this archive
   7  * for more details.
   8  *
   9  * Copyright (C) 2001 - 2005 Tensilica Inc.
  10  */
  11
  12 #ifndef _XTENSA_SWAB_H
  13 #define _XTENSA_SWAB_H
  14
  15 #include <linux/types.h>
  16 #include <linux/compiler.h>
  17
  18 #define __SWAB_64_THRU_32__
  19
  20 static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
  21 {
  22     __u32 res;
  23     /* instruction sequence from Xtensa ISA release 2/2000 */
  24     __asm__("ssai     8           \n\t"
  25             "srli     %0, %1, 16  \n\t"
  26             "src      %0, %0, %1  \n\t"
  27             "src      %0, %0, %0  \n\t"
  28             "src      %0, %1, %0  \n"
  29             : "=&a" (res)
  30             : "a" (x)
  31             );
  32     return res;
  33 }
  34 #define __arch_swab32 __arch_swab32
  35
  36 static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
  37 {
  38     /* Given that 'short' values are signed (i.e., can be negative),
  39      * we cannot assume that the upper 16-bits of the register are
  40      * zero.  We are careful to mask values after shifting.
  41      */
  42
  43     /* There exists an anomaly between xt-gcc and xt-xcc.  xt-gcc
  44      * inserts an extui instruction after putting this function inline
  45      * to ensure that it uses only the least-significant 16 bits of
  46      * the result.  xt-xcc doesn't use an extui, but assumes the
  47      * __asm__ macro follows convention that the upper 16 bits of an
  48      * 'unsigned short' result are still zero.  This macro doesn't
  49      * follow convention; indeed, it leaves garbage in the upport 16
  50      * bits of the register.
  51
  52      * Declaring the temporary variables 'res' and 'tmp' to be 32-bit
  53      * types while the return type of the function is a 16-bit type
  54      * forces both compilers to insert exactly one extui instruction
  55      * (or equivalent) to mask off the upper 16 bits. */
  56
  57     __u32 res;
  58     __u32 tmp;
  59
  60     __asm__("extui    %1, %2, 8, 8\n\t"
  61             "slli     %0, %2, 8   \n\t"
  62             "or       %0, %0, %1  \n"
  63             : "=&a" (res), "=&a" (tmp)
  64             : "a" (x)
  65             );
  66
  67     return res;
  68 }
  69 #define __arch_swab16 __arch_swab16
  70
  71 #endif /* _XTENSA_SWAB_H */