drivers/clk/davinci/psc-da830.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * PSC clock descriptions for TI DA830/OMAP-L137/AM17XX
   4  *
   5  * Copyright (C) 2018 David Lechner <david@lechnology.com>
   6  */
   7
   8 #include <linux/clk-provider.h>
   9 #include <linux/clk.h>
  10 #include <linux/clkdev.h>
  11 #include <linux/init.h>
  12 #include <linux/kernel.h>
  13 #include <linux/types.h>
  14
  15 #include "psc.h"
  16
  17 LPSC_CLKDEV1(spi0_clkdev,       NULL,   "spi_davinci.0");
  18 LPSC_CLKDEV1(mmcsd_clkdev,      NULL,   "da830-mmc.0");
  19 LPSC_CLKDEV1(uart0_clkdev,      NULL,   "serial8250.0");
  20
  21 static const struct davinci_lpsc_clk_info da830_psc0_info[] = {
  22         LPSC(0,  0, tpcc,     pll0_sysclk2, NULL,         LPSC_ALWAYS_ENABLED),
  23         LPSC(1,  0, tptc0,    pll0_sysclk2, NULL,         LPSC_ALWAYS_ENABLED),
  24         LPSC(2,  0, tptc1,    pll0_sysclk2, NULL,         LPSC_ALWAYS_ENABLED),
  25         LPSC(3,  0, aemif,    pll0_sysclk3, NULL,         LPSC_ALWAYS_ENABLED),
  26         LPSC(4,  0, spi0,     pll0_sysclk2, spi0_clkdev,  0),
  27         LPSC(5,  0, mmcsd,    pll0_sysclk2, mmcsd_clkdev, 0),
  28         LPSC(6,  0, aintc,    pll0_sysclk4, NULL,         LPSC_ALWAYS_ENABLED),
  29         LPSC(7,  0, arm_rom,  pll0_sysclk2, NULL,         LPSC_ALWAYS_ENABLED),
  30         LPSC(8,  0, secu_mgr, pll0_sysclk4, NULL,         LPSC_ALWAYS_ENABLED),
  31         LPSC(9,  0, uart0,    pll0_sysclk2, uart0_clkdev, 0),
  32         LPSC(10, 0, scr0_ss,  pll0_sysclk2, NULL,         LPSC_ALWAYS_ENABLED),
  33         LPSC(11, 0, scr1_ss,  pll0_sysclk2, NULL,         LPSC_ALWAYS_ENABLED),
  34         LPSC(12, 0, scr2_ss,  pll0_sysclk2, NULL,         LPSC_ALWAYS_ENABLED),
  35         LPSC(13, 0, pruss,    pll0_sysclk2, NULL,         LPSC_ALWAYS_ENABLED),
  36         LPSC(14, 0, arm,      pll0_sysclk6, NULL,         LPSC_ALWAYS_ENABLED),
  37         { }
  38 };
  39
  40 static int da830_psc0_init(struct device *dev, void __iomem *base)
  41 {
  42         return davinci_psc_register_clocks(dev, da830_psc0_info, 16, base);
  43 }
  44
  45 static struct clk_bulk_data da830_psc0_parent_clks[] = {
  46         { .id = "pll0_sysclk2" },
  47         { .id = "pll0_sysclk3" },
  48         { .id = "pll0_sysclk4" },
  49         { .id = "pll0_sysclk6" },
  50 };
  51
  52 const struct davinci_psc_init_data da830_psc0_init_data = {
  53         .parent_clks            = da830_psc0_parent_clks,
  54         .num_parent_clks        = ARRAY_SIZE(da830_psc0_parent_clks),
  55         .psc_init               = &da830_psc0_init,
  56 };
  57
  58 LPSC_CLKDEV3(usb0_clkdev,       "fck",  "da830-usb-phy-clks",
  59                                 NULL,   "musb-da8xx",
  60                                 NULL,   "cppi41-dmaengine");
  61 LPSC_CLKDEV1(usb1_clkdev,       NULL,   "ohci-da8xx");
  62 /* REVISIT: gpio-davinci.c should be modified to drop con_id */
  63 LPSC_CLKDEV1(gpio_clkdev,       "gpio", NULL);
  64 LPSC_CLKDEV2(emac_clkdev,       NULL,   "davinci_emac.1",
  65                                 "fck",  "davinci_mdio.0");
  66 LPSC_CLKDEV1(mcasp0_clkdev,     NULL,   "davinci-mcasp.0");
  67 LPSC_CLKDEV1(mcasp1_clkdev,     NULL,   "davinci-mcasp.1");
  68 LPSC_CLKDEV1(mcasp2_clkdev,     NULL,   "davinci-mcasp.2");
  69 LPSC_CLKDEV1(spi1_clkdev,       NULL,   "spi_davinci.1");
  70 LPSC_CLKDEV1(i2c1_clkdev,       NULL,   "i2c_davinci.2");
  71 LPSC_CLKDEV1(uart1_clkdev,      NULL,   "serial8250.1");
  72 LPSC_CLKDEV1(uart2_clkdev,      NULL,   "serial8250.2");
  73 LPSC_CLKDEV1(lcdc_clkdev,       "fck",  "da8xx_lcdc.0");
  74 LPSC_CLKDEV2(pwm_clkdev,        "fck",  "ehrpwm.0",
  75                                 "fck",  "ehrpwm.1");
  76 LPSC_CLKDEV3(ecap_clkdev,       "fck",  "ecap.0",
  77                                 "fck",  "ecap.1",
  78                                 "fck",  "ecap.2");
  79 LPSC_CLKDEV2(eqep_clkdev,       NULL,   "eqep.0",
  80                                 NULL,   "eqep.1");
  81
  82 static const struct davinci_lpsc_clk_info da830_psc1_info[] = {
  83         LPSC(1,  0, usb0,   pll0_sysclk2, usb0_clkdev,   0),
  84         LPSC(2,  0, usb1,   pll0_sysclk4, usb1_clkdev,   0),
  85         LPSC(3,  0, gpio,   pll0_sysclk4, gpio_clkdev,   0),
  86         LPSC(5,  0, emac,   pll0_sysclk4, emac_clkdev,   0),
  87         LPSC(6,  0, emif3,  pll0_sysclk5, NULL,          LPSC_ALWAYS_ENABLED),
  88         LPSC(7,  0, mcasp0, pll0_sysclk2, mcasp0_clkdev, 0),
  89         LPSC(8,  0, mcasp1, pll0_sysclk2, mcasp1_clkdev, 0),
  90         LPSC(9,  0, mcasp2, pll0_sysclk2, mcasp2_clkdev, 0),
  91         LPSC(10, 0, spi1,   pll0_sysclk2, spi1_clkdev,   0),
  92         LPSC(11, 0, i2c1,   pll0_sysclk4, i2c1_clkdev,   0),
  93         LPSC(12, 0, uart1,  pll0_sysclk2, uart1_clkdev,  0),
  94         LPSC(13, 0, uart2,  pll0_sysclk2, uart2_clkdev,  0),
  95         LPSC(16, 0, lcdc,   pll0_sysclk2, lcdc_clkdev,   0),
  96         LPSC(17, 0, pwm,    pll0_sysclk2, pwm_clkdev,    0),
  97         LPSC(20, 0, ecap,   pll0_sysclk2, ecap_clkdev,   0),
  98         LPSC(21, 0, eqep,   pll0_sysclk2, eqep_clkdev,   0),
  99         { }
 100 };
 101
 102 static int da830_psc1_init(struct device *dev, void __iomem *base)
 103 {
 104         return davinci_psc_register_clocks(dev, da830_psc1_info, 32, base);
 105 }
 106
 107 static struct clk_bulk_data da830_psc1_parent_clks[] = {
 108         { .id = "pll0_sysclk2" },
 109         { .id = "pll0_sysclk4" },
 110         { .id = "pll0_sysclk5" },
 111 };
 112
 113 const struct davinci_psc_init_data da830_psc1_init_data = {
 114         .parent_clks            = da830_psc1_parent_clks,
 115         .num_parent_clks        = ARRAY_SIZE(da830_psc1_parent_clks),
 116         .psc_init               = &da830_psc1_init,
 117 };