drivers/clk/mediatek/clk-mt2712-venc.c

   1 /*
   2  * Copyright (c) 2017 MediaTek Inc.
   3  * Author: Weiyi Lu <weiyi.lu@mediatek.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <linux/clk-provider.h>
  16 #include <linux/platform_device.h>
  17
  18 #include "clk-mtk.h"
  19 #include "clk-gate.h"
  20
  21 #include <dt-bindings/clock/mt2712-clk.h>
  22
  23 static const struct mtk_gate_regs venc_cg_regs = {
  24         .set_ofs = 0x4,
  25         .clr_ofs = 0x8,
  26         .sta_ofs = 0x0,
  27 };
  28
  29 #define GATE_VENC(_id, _name, _parent, _shift) {        \
  30                 .id = _id,                              \
  31                 .name = _name,                          \
  32                 .parent_name = _parent,                 \
  33                 .regs = &venc_cg_regs,                  \
  34                 .shift = _shift,                        \
  35                 .ops = &mtk_clk_gate_ops_setclr_inv,    \
  36         }
  37
  38 static const struct mtk_gate venc_clks[] = {
  39         GATE_VENC(CLK_VENC_SMI_COMMON_CON, "venc_smi", "mm_sel", 0),
  40         GATE_VENC(CLK_VENC_VENC, "venc_venc", "venc_sel", 4),
  41         GATE_VENC(CLK_VENC_SMI_LARB6, "venc_smi_larb6", "jpgdec_sel", 12),
  42 };
  43
  44 static int clk_mt2712_venc_probe(struct platform_device *pdev)
  45 {
  46         struct clk_onecell_data *clk_data;
  47         int r;
  48         struct device_node *node = pdev->dev.of_node;
  49
  50         clk_data = mtk_alloc_clk_data(CLK_VENC_NR_CLK);
  51
  52         mtk_clk_register_gates(node, venc_clks, ARRAY_SIZE(venc_clks),
  53                         clk_data);
  54
  55         r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
  56
  57         if (r != 0)
  58                 pr_err("%s(): could not register clock provider: %d\n",
  59                         __func__, r);
  60
  61         return r;
  62 }
  63
  64 static const struct of_device_id of_match_clk_mt2712_venc[] = {
  65         { .compatible = "mediatek,mt2712-vencsys", },
  66         {}
  67 };
  68
  69 static struct platform_driver clk_mt2712_venc_drv = {
  70         .probe = clk_mt2712_venc_probe,
  71         .driver = {
  72                 .name = "clk-mt2712-venc",
  73                 .of_match_table = of_match_clk_mt2712_venc,
  74         },
  75 };
  76
  77 builtin_platform_driver(clk_mt2712_venc_drv);