Linux 4.18.10
[linux/fpc-iii.git] / drivers / clk / qcom / common.c
blob39ce64c2783b7613d9a8bed1cfd214fc674b6d21
1 /*
2 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #include <linux/export.h>
15 #include <linux/module.h>
16 #include <linux/regmap.h>
17 #include <linux/platform_device.h>
18 #include <linux/clk-provider.h>
19 #include <linux/reset-controller.h>
20 #include <linux/of.h>
22 #include "common.h"
23 #include "clk-rcg.h"
24 #include "clk-regmap.h"
25 #include "reset.h"
26 #include "gdsc.h"
28 struct qcom_cc {
29 struct qcom_reset_controller reset;
30 struct clk_regmap **rclks;
31 size_t num_rclks;
34 const
35 struct freq_tbl *qcom_find_freq(const struct freq_tbl *f, unsigned long rate)
37 if (!f)
38 return NULL;
40 for (; f->freq; f++)
41 if (rate <= f->freq)
42 return f;
44 /* Default to our fastest rate */
45 return f - 1;
47 EXPORT_SYMBOL_GPL(qcom_find_freq);
49 const struct freq_tbl *qcom_find_freq_floor(const struct freq_tbl *f,
50 unsigned long rate)
52 const struct freq_tbl *best = NULL;
54 for ( ; f->freq; f++) {
55 if (rate >= f->freq)
56 best = f;
57 else
58 break;
61 return best;
63 EXPORT_SYMBOL_GPL(qcom_find_freq_floor);
65 int qcom_find_src_index(struct clk_hw *hw, const struct parent_map *map, u8 src)
67 int i, num_parents = clk_hw_get_num_parents(hw);
69 for (i = 0; i < num_parents; i++)
70 if (src == map[i].src)
71 return i;
73 return -ENOENT;
75 EXPORT_SYMBOL_GPL(qcom_find_src_index);
77 struct regmap *
78 qcom_cc_map(struct platform_device *pdev, const struct qcom_cc_desc *desc)
80 void __iomem *base;
81 struct resource *res;
82 struct device *dev = &pdev->dev;
84 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
85 base = devm_ioremap_resource(dev, res);
86 if (IS_ERR(base))
87 return ERR_CAST(base);
89 return devm_regmap_init_mmio(dev, base, desc->config);
91 EXPORT_SYMBOL_GPL(qcom_cc_map);
93 void
94 qcom_pll_set_fsm_mode(struct regmap *map, u32 reg, u8 bias_count, u8 lock_count)
96 u32 val;
97 u32 mask;
99 /* De-assert reset to FSM */
100 regmap_update_bits(map, reg, PLL_VOTE_FSM_RESET, 0);
102 /* Program bias count and lock count */
103 val = bias_count << PLL_BIAS_COUNT_SHIFT |
104 lock_count << PLL_LOCK_COUNT_SHIFT;
105 mask = PLL_BIAS_COUNT_MASK << PLL_BIAS_COUNT_SHIFT;
106 mask |= PLL_LOCK_COUNT_MASK << PLL_LOCK_COUNT_SHIFT;
107 regmap_update_bits(map, reg, mask, val);
109 /* Enable PLL FSM voting */
110 regmap_update_bits(map, reg, PLL_VOTE_FSM_ENA, PLL_VOTE_FSM_ENA);
112 EXPORT_SYMBOL_GPL(qcom_pll_set_fsm_mode);
114 static void qcom_cc_gdsc_unregister(void *data)
116 gdsc_unregister(data);
120 * Backwards compatibility with old DTs. Register a pass-through factor 1/1
121 * clock to translate 'path' clk into 'name' clk and register the 'path'
122 * clk as a fixed rate clock if it isn't present.
124 static int _qcom_cc_register_board_clk(struct device *dev, const char *path,
125 const char *name, unsigned long rate,
126 bool add_factor)
128 struct device_node *node = NULL;
129 struct device_node *clocks_node;
130 struct clk_fixed_factor *factor;
131 struct clk_fixed_rate *fixed;
132 struct clk_init_data init_data = { };
133 int ret;
135 clocks_node = of_find_node_by_path("/clocks");
136 if (clocks_node) {
137 node = of_get_child_by_name(clocks_node, path);
138 of_node_put(clocks_node);
141 if (!node) {
142 fixed = devm_kzalloc(dev, sizeof(*fixed), GFP_KERNEL);
143 if (!fixed)
144 return -EINVAL;
146 fixed->fixed_rate = rate;
147 fixed->hw.init = &init_data;
149 init_data.name = path;
150 init_data.ops = &clk_fixed_rate_ops;
152 ret = devm_clk_hw_register(dev, &fixed->hw);
153 if (ret)
154 return ret;
156 of_node_put(node);
158 if (add_factor) {
159 factor = devm_kzalloc(dev, sizeof(*factor), GFP_KERNEL);
160 if (!factor)
161 return -EINVAL;
163 factor->mult = factor->div = 1;
164 factor->hw.init = &init_data;
166 init_data.name = name;
167 init_data.parent_names = &path;
168 init_data.num_parents = 1;
169 init_data.flags = 0;
170 init_data.ops = &clk_fixed_factor_ops;
172 ret = devm_clk_hw_register(dev, &factor->hw);
173 if (ret)
174 return ret;
177 return 0;
180 int qcom_cc_register_board_clk(struct device *dev, const char *path,
181 const char *name, unsigned long rate)
183 bool add_factor = true;
186 * TODO: The RPM clock driver currently does not support the xo clock.
187 * When xo is added to the RPM clock driver, we should change this
188 * function to skip registration of xo factor clocks.
191 return _qcom_cc_register_board_clk(dev, path, name, rate, add_factor);
193 EXPORT_SYMBOL_GPL(qcom_cc_register_board_clk);
195 int qcom_cc_register_sleep_clk(struct device *dev)
197 return _qcom_cc_register_board_clk(dev, "sleep_clk", "sleep_clk_src",
198 32768, true);
200 EXPORT_SYMBOL_GPL(qcom_cc_register_sleep_clk);
202 static struct clk_hw *qcom_cc_clk_hw_get(struct of_phandle_args *clkspec,
203 void *data)
205 struct qcom_cc *cc = data;
206 unsigned int idx = clkspec->args[0];
208 if (idx >= cc->num_rclks) {
209 pr_err("%s: invalid index %u\n", __func__, idx);
210 return ERR_PTR(-EINVAL);
213 return cc->rclks[idx] ? &cc->rclks[idx]->hw : ERR_PTR(-ENOENT);
216 int qcom_cc_really_probe(struct platform_device *pdev,
217 const struct qcom_cc_desc *desc, struct regmap *regmap)
219 int i, ret;
220 struct device *dev = &pdev->dev;
221 struct qcom_reset_controller *reset;
222 struct qcom_cc *cc;
223 struct gdsc_desc *scd;
224 size_t num_clks = desc->num_clks;
225 struct clk_regmap **rclks = desc->clks;
227 cc = devm_kzalloc(dev, sizeof(*cc), GFP_KERNEL);
228 if (!cc)
229 return -ENOMEM;
231 reset = &cc->reset;
232 reset->rcdev.of_node = dev->of_node;
233 reset->rcdev.ops = &qcom_reset_ops;
234 reset->rcdev.owner = dev->driver->owner;
235 reset->rcdev.nr_resets = desc->num_resets;
236 reset->regmap = regmap;
237 reset->reset_map = desc->resets;
239 ret = devm_reset_controller_register(dev, &reset->rcdev);
240 if (ret)
241 return ret;
243 if (desc->gdscs && desc->num_gdscs) {
244 scd = devm_kzalloc(dev, sizeof(*scd), GFP_KERNEL);
245 if (!scd)
246 return -ENOMEM;
247 scd->dev = dev;
248 scd->scs = desc->gdscs;
249 scd->num = desc->num_gdscs;
250 ret = gdsc_register(scd, &reset->rcdev, regmap);
251 if (ret)
252 return ret;
253 ret = devm_add_action_or_reset(dev, qcom_cc_gdsc_unregister,
254 scd);
255 if (ret)
256 return ret;
259 cc->rclks = rclks;
260 cc->num_rclks = num_clks;
262 for (i = 0; i < num_clks; i++) {
263 if (!rclks[i])
264 continue;
266 ret = devm_clk_register_regmap(dev, rclks[i]);
267 if (ret)
268 return ret;
271 ret = devm_of_clk_add_hw_provider(dev, qcom_cc_clk_hw_get, cc);
272 if (ret)
273 return ret;
275 return 0;
277 EXPORT_SYMBOL_GPL(qcom_cc_really_probe);
279 int qcom_cc_probe(struct platform_device *pdev, const struct qcom_cc_desc *desc)
281 struct regmap *regmap;
283 regmap = qcom_cc_map(pdev, desc);
284 if (IS_ERR(regmap))
285 return PTR_ERR(regmap);
287 return qcom_cc_really_probe(pdev, desc, regmap);
289 EXPORT_SYMBOL_GPL(qcom_cc_probe);
291 MODULE_LICENSE("GPL v2");