Linux 4.18.10
[linux/fpc-iii.git] / drivers / clk / ti / clk-814x.c
blobf688fdd2cb59c9432b7c54c9b14ea302933a0af5
1 /*
2 * This program is free software; you can redistribute it and/or
3 * modify it under the terms of the GNU General Public License as
4 * published by the Free Software Foundation version 2.
5 */
7 #include <linux/kernel.h>
8 #include <linux/clk.h>
9 #include <linux/clk-provider.h>
10 #include <linux/clk/ti.h>
11 #include <linux/of_platform.h>
12 #include <dt-bindings/clock/dm814.h>
14 #include "clock.h"
16 static const struct omap_clkctrl_reg_data dm814_default_clkctrl_regs[] __initconst = {
17 { DM814_USB_OTG_HS_CLKCTRL, NULL, CLKF_SW_SUP, "pll260dcoclkldo" },
18 { 0 },
21 static const struct omap_clkctrl_reg_data dm814_alwon_clkctrl_regs[] __initconst = {
22 { DM814_UART1_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk10_ck" },
23 { DM814_UART2_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk10_ck" },
24 { DM814_UART3_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk10_ck" },
25 { DM814_GPIO1_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk6_ck" },
26 { DM814_GPIO2_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk6_ck" },
27 { DM814_I2C1_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk10_ck" },
28 { DM814_I2C2_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk10_ck" },
29 { DM814_WD_TIMER_CLKCTRL, NULL, CLKF_SW_SUP | CLKF_NO_IDLEST, "sysclk18_ck" },
30 { DM814_MCSPI1_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk10_ck" },
31 { DM814_GPMC_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk6_ck" },
32 { DM814_CPGMAC0_CLKCTRL, NULL, CLKF_SW_SUP, "cpsw_125mhz_gclk" },
33 { DM814_MPU_CLKCTRL, NULL, CLKF_SW_SUP, "mpu_ck" },
34 { DM814_RTC_CLKCTRL, NULL, CLKF_SW_SUP | CLKF_NO_IDLEST, "sysclk18_ck" },
35 { DM814_TPCC_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk4_ck" },
36 { DM814_TPTC0_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk4_ck" },
37 { DM814_TPTC1_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk4_ck" },
38 { DM814_TPTC2_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk4_ck" },
39 { DM814_TPTC3_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk4_ck" },
40 { DM814_MMC1_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk8_ck" },
41 { DM814_MMC2_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk8_ck" },
42 { DM814_MMC3_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk8_ck" },
43 { 0 },
46 const struct omap_clkctrl_data dm814_clkctrl_data[] __initconst = {
47 { 0x48180500, dm814_default_clkctrl_regs },
48 { 0x48181400, dm814_alwon_clkctrl_regs },
49 { 0 },
52 static struct ti_dt_clk dm814_clks[] = {
53 DT_CLK(NULL, "timer_sys_ck", "devosc_ck"),
54 { .node_name = NULL },
57 static bool timer_clocks_initialized;
59 static int __init dm814x_adpll_early_init(void)
61 struct device_node *np;
63 if (!timer_clocks_initialized)
64 return -ENODEV;
66 np = of_find_node_by_name(NULL, "pllss");
67 if (!np) {
68 pr_err("Could not find node for plls\n");
69 return -ENODEV;
72 of_platform_populate(np, NULL, NULL, NULL);
74 return 0;
76 core_initcall(dm814x_adpll_early_init);
78 static const char * const init_clocks[] = {
79 "pll040clkout", /* MPU 481c5040.adpll.clkout */
80 "pll290clkout", /* DDR 481c5290.adpll.clkout */
83 static int __init dm814x_adpll_enable_init_clocks(void)
85 int i, err;
87 if (!timer_clocks_initialized)
88 return -ENODEV;
90 for (i = 0; i < ARRAY_SIZE(init_clocks); i++) {
91 struct clk *clock;
93 clock = clk_get(NULL, init_clocks[i]);
94 if (WARN(IS_ERR(clock), "could not find init clock %s\n",
95 init_clocks[i]))
96 continue;
97 err = clk_prepare_enable(clock);
98 if (WARN(err, "could not enable init clock %s\n",
99 init_clocks[i]))
100 continue;
103 return 0;
105 postcore_initcall(dm814x_adpll_enable_init_clocks);
107 int __init dm814x_dt_clk_init(void)
109 ti_dt_clocks_register(dm814_clks);
110 omap2_clk_disable_autoidle_all();
111 ti_clk_add_aliases();
112 omap2_clk_enable_init_clocks(NULL, 0);
113 timer_clocks_initialized = true;
115 return 0;