2 This file is provided under a dual BSD/GPLv2 license. When using or
3 redistributing this file, you may do so under either license.
6 Copyright(c) 2014 Intel Corporation.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of version 2 of the GNU General Public License as
9 published by the Free Software Foundation.
11 This program is distributed in the hope that it will be useful, but
12 WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 General Public License for more details.
20 Copyright(c) 2014 Intel Corporation.
21 Redistribution and use in source and binary forms, with or without
22 modification, are permitted provided that the following conditions
25 * Redistributions of source code must retain the above copyright
26 notice, this list of conditions and the following disclaimer.
27 * Redistributions in binary form must reproduce the above copyright
28 notice, this list of conditions and the following disclaimer in
29 the documentation and/or other materials provided with the
31 * Neither the name of Intel Corporation nor the names of its
32 contributors may be used to endorse or promote products derived
33 from this software without specific prior written permission.
35 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
36 "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
37 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
38 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
39 OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
40 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
41 LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
42 DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
43 THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
44 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
45 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
47 #include <linux/kernel.h>
48 #include <linux/module.h>
49 #include <linux/pci.h>
50 #include <linux/init.h>
51 #include <linux/types.h>
53 #include <linux/slab.h>
54 #include <linux/errno.h>
55 #include <linux/device.h>
56 #include <linux/dma-mapping.h>
57 #include <linux/platform_device.h>
58 #include <linux/workqueue.h>
60 #include <adf_accel_devices.h>
61 #include <adf_common_drv.h>
63 #include "adf_dh895xcc_hw_data.h"
65 #define ADF_SYSTEM_DEVICE(device_id) \
66 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
68 static const struct pci_device_id adf_pci_tbl
[] = {
69 ADF_SYSTEM_DEVICE(ADF_DH895XCC_PCI_DEVICE_ID
),
72 MODULE_DEVICE_TABLE(pci
, adf_pci_tbl
);
74 static int adf_probe(struct pci_dev
*dev
, const struct pci_device_id
*ent
);
75 static void adf_remove(struct pci_dev
*dev
);
77 static struct pci_driver adf_driver
= {
78 .id_table
= adf_pci_tbl
,
79 .name
= ADF_DH895XCC_DEVICE_NAME
,
82 .sriov_configure
= adf_sriov_configure
,
85 static void adf_cleanup_pci_dev(struct adf_accel_dev
*accel_dev
)
87 pci_release_regions(accel_dev
->accel_pci_dev
.pci_dev
);
88 pci_disable_device(accel_dev
->accel_pci_dev
.pci_dev
);
91 static void adf_cleanup_accel(struct adf_accel_dev
*accel_dev
)
93 struct adf_accel_pci
*accel_pci_dev
= &accel_dev
->accel_pci_dev
;
96 for (i
= 0; i
< ADF_PCI_MAX_BARS
; i
++) {
97 struct adf_bar
*bar
= &accel_pci_dev
->pci_bars
[i
];
100 pci_iounmap(accel_pci_dev
->pci_dev
, bar
->virt_addr
);
103 if (accel_dev
->hw_device
) {
104 switch (accel_pci_dev
->pci_dev
->device
) {
105 case ADF_DH895XCC_PCI_DEVICE_ID
:
106 adf_clean_hw_data_dh895xcc(accel_dev
->hw_device
);
111 kfree(accel_dev
->hw_device
);
112 accel_dev
->hw_device
= NULL
;
114 adf_cfg_dev_remove(accel_dev
);
115 debugfs_remove(accel_dev
->debugfs_dir
);
116 adf_devmgr_rm_dev(accel_dev
, NULL
);
119 static int adf_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
121 struct adf_accel_dev
*accel_dev
;
122 struct adf_accel_pci
*accel_pci_dev
;
123 struct adf_hw_device_data
*hw_data
;
124 char name
[ADF_DEVICE_NAME_LENGTH
];
125 unsigned int i
, bar_nr
;
128 switch (ent
->device
) {
129 case ADF_DH895XCC_PCI_DEVICE_ID
:
132 dev_err(&pdev
->dev
, "Invalid device 0x%x.\n", ent
->device
);
136 if (num_possible_nodes() > 1 && dev_to_node(&pdev
->dev
) < 0) {
137 /* If the accelerator is connected to a node with no memory
138 * there is no point in using the accelerator since the remote
139 * memory transaction will be very slow. */
140 dev_err(&pdev
->dev
, "Invalid NUMA configuration.\n");
144 accel_dev
= kzalloc_node(sizeof(*accel_dev
), GFP_KERNEL
,
145 dev_to_node(&pdev
->dev
));
149 INIT_LIST_HEAD(&accel_dev
->crypto_list
);
150 accel_pci_dev
= &accel_dev
->accel_pci_dev
;
151 accel_pci_dev
->pci_dev
= pdev
;
153 /* Add accel device to accel table.
154 * This should be called before adf_cleanup_accel is called */
155 if (adf_devmgr_add_dev(accel_dev
, NULL
)) {
156 dev_err(&pdev
->dev
, "Failed to add new accelerator device.\n");
161 accel_dev
->owner
= THIS_MODULE
;
162 /* Allocate and configure device configuration structure */
163 hw_data
= kzalloc_node(sizeof(*hw_data
), GFP_KERNEL
,
164 dev_to_node(&pdev
->dev
));
170 accel_dev
->hw_device
= hw_data
;
171 adf_init_hw_data_dh895xcc(accel_dev
->hw_device
);
172 pci_read_config_byte(pdev
, PCI_REVISION_ID
, &accel_pci_dev
->revid
);
173 pci_read_config_dword(pdev
, ADF_DEVICE_FUSECTL_OFFSET
,
176 /* Get Accelerators and Accelerators Engines masks */
177 hw_data
->accel_mask
= hw_data
->get_accel_mask(hw_data
->fuses
);
178 hw_data
->ae_mask
= hw_data
->get_ae_mask(hw_data
->fuses
);
179 accel_pci_dev
->sku
= hw_data
->get_sku(hw_data
);
180 /* If the device has no acceleration engines then ignore it. */
181 if (!hw_data
->accel_mask
|| !hw_data
->ae_mask
||
182 ((~hw_data
->ae_mask
) & 0x01)) {
183 dev_err(&pdev
->dev
, "No acceleration units found");
188 /* Create dev top level debugfs entry */
189 snprintf(name
, sizeof(name
), "%s%s_%02x:%02d.%d",
190 ADF_DEVICE_NAME_PREFIX
, hw_data
->dev_class
->name
,
191 pdev
->bus
->number
, PCI_SLOT(pdev
->devfn
),
192 PCI_FUNC(pdev
->devfn
));
194 accel_dev
->debugfs_dir
= debugfs_create_dir(name
, NULL
);
195 if (!accel_dev
->debugfs_dir
) {
196 dev_err(&pdev
->dev
, "Could not create debugfs dir %s\n", name
);
201 /* Create device configuration table */
202 ret
= adf_cfg_dev_add(accel_dev
);
206 pcie_set_readrq(pdev
, 1024);
208 /* enable PCI device */
209 if (pci_enable_device(pdev
)) {
214 /* set dma identifier */
215 if (pci_set_dma_mask(pdev
, DMA_BIT_MASK(64))) {
216 if ((pci_set_dma_mask(pdev
, DMA_BIT_MASK(32)))) {
217 dev_err(&pdev
->dev
, "No usable DMA configuration\n");
219 goto out_err_disable
;
221 pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(32));
225 pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(64));
228 if (pci_request_regions(pdev
, ADF_DH895XCC_DEVICE_NAME
)) {
230 goto out_err_disable
;
233 /* Read accelerator capabilities mask */
234 pci_read_config_dword(pdev
, ADF_DEVICE_LEGFUSE_OFFSET
,
235 &hw_data
->accel_capabilities_mask
);
237 /* Find and map all the device's BARS */
239 bar_mask
= pci_select_bars(pdev
, IORESOURCE_MEM
);
240 for_each_set_bit(bar_nr
, (const unsigned long *)&bar_mask
,
241 ADF_PCI_MAX_BARS
* 2) {
242 struct adf_bar
*bar
= &accel_pci_dev
->pci_bars
[i
++];
244 bar
->base_addr
= pci_resource_start(pdev
, bar_nr
);
247 bar
->size
= pci_resource_len(pdev
, bar_nr
);
248 bar
->virt_addr
= pci_iomap(accel_pci_dev
->pci_dev
, bar_nr
, 0);
249 if (!bar
->virt_addr
) {
250 dev_err(&pdev
->dev
, "Failed to map BAR %d\n", bar_nr
);
252 goto out_err_free_reg
;
255 pci_set_master(pdev
);
257 if (adf_enable_aer(accel_dev
, &adf_driver
)) {
258 dev_err(&pdev
->dev
, "Failed to enable aer\n");
260 goto out_err_free_reg
;
263 if (pci_save_state(pdev
)) {
264 dev_err(&pdev
->dev
, "Failed to save pci state\n");
266 goto out_err_free_reg
;
269 ret
= qat_crypto_dev_config(accel_dev
);
271 goto out_err_free_reg
;
273 ret
= adf_dev_init(accel_dev
);
275 goto out_err_dev_shutdown
;
277 ret
= adf_dev_start(accel_dev
);
279 goto out_err_dev_stop
;
284 adf_dev_stop(accel_dev
);
285 out_err_dev_shutdown
:
286 adf_dev_shutdown(accel_dev
);
288 pci_release_regions(accel_pci_dev
->pci_dev
);
290 pci_disable_device(accel_pci_dev
->pci_dev
);
292 adf_cleanup_accel(accel_dev
);
297 static void adf_remove(struct pci_dev
*pdev
)
299 struct adf_accel_dev
*accel_dev
= adf_devmgr_pci_to_accel_dev(pdev
);
302 pr_err("QAT: Driver removal failed\n");
305 adf_dev_stop(accel_dev
);
306 adf_dev_shutdown(accel_dev
);
307 adf_disable_aer(accel_dev
);
308 adf_cleanup_accel(accel_dev
);
309 adf_cleanup_pci_dev(accel_dev
);
313 static int __init
adfdrv_init(void)
315 request_module("intel_qat");
317 if (pci_register_driver(&adf_driver
)) {
318 pr_err("QAT: Driver initialization failed\n");
324 static void __exit
adfdrv_release(void)
326 pci_unregister_driver(&adf_driver
);
329 module_init(adfdrv_init
);
330 module_exit(adfdrv_release
);
332 MODULE_LICENSE("Dual BSD/GPL");
333 MODULE_AUTHOR("Intel");
334 MODULE_FIRMWARE(ADF_DH895XCC_FW
);
335 MODULE_FIRMWARE(ADF_DH895XCC_MMP
);
336 MODULE_DESCRIPTION("Intel(R) QuickAssist Technology");
337 MODULE_VERSION(ADF_DRV_VERSION
);