2 * Motorola CPCAP PMIC RTC driver
4 * Based on cpcap-regulator.c from Motorola Linux kernel tree
5 * Copyright (C) 2009 Motorola, Inc.
7 * Rewritten for mainline kernel
10 * - use standard interrupt framework
11 * - use managed device resources
12 * - remove custom "secure clock daemon" helpers
14 * Copyright (C) 2017 Sebastian Reichel <sre@kernel.org>
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License version 2 as
18 * published by the Free Software Foundation.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 #include <linux/kernel.h>
26 #include <linux/module.h>
27 #include <linux/init.h>
28 #include <linux/device.h>
29 #include <linux/platform_device.h>
30 #include <linux/rtc.h>
31 #include <linux/err.h>
32 #include <linux/regmap.h>
33 #include <linux/mfd/motorola-cpcap.h>
34 #include <linux/slab.h>
35 #include <linux/sched.h>
37 #define SECS_PER_DAY 86400
38 #define DAY_MASK 0x7FFF
39 #define TOD1_MASK 0x00FF
40 #define TOD2_MASK 0x01FF
49 struct regmap
*regmap
;
50 struct rtc_device
*rtc_dev
;
58 static void cpcap2rtc_time(struct rtc_time
*rtc
, struct cpcap_time
*cpcap
)
60 unsigned long int tod
;
61 unsigned long int time
;
63 tod
= (cpcap
->tod1
& TOD1_MASK
) | ((cpcap
->tod2
& TOD2_MASK
) << 8);
64 time
= tod
+ ((cpcap
->day
& DAY_MASK
) * SECS_PER_DAY
);
66 rtc_time_to_tm(time
, rtc
);
69 static void rtc2cpcap_time(struct cpcap_time
*cpcap
, struct rtc_time
*rtc
)
73 rtc_tm_to_time(rtc
, &time
);
75 cpcap
->day
= time
/ SECS_PER_DAY
;
77 cpcap
->tod2
= (time
>> 8) & TOD2_MASK
;
78 cpcap
->tod1
= time
& TOD1_MASK
;
81 static int cpcap_rtc_alarm_irq_enable(struct device
*dev
, unsigned int enabled
)
83 struct cpcap_rtc
*rtc
= dev_get_drvdata(dev
);
85 if (rtc
->alarm_enabled
== enabled
)
89 enable_irq(rtc
->alarm_irq
);
91 disable_irq(rtc
->alarm_irq
);
93 rtc
->alarm_enabled
= !!enabled
;
98 static int cpcap_rtc_read_time(struct device
*dev
, struct rtc_time
*tm
)
100 struct cpcap_rtc
*rtc
;
101 struct cpcap_time cpcap_tm
;
105 rtc
= dev_get_drvdata(dev
);
107 ret
= regmap_read(rtc
->regmap
, CPCAP_REG_TOD2
, &temp_tod2
);
108 ret
|= regmap_read(rtc
->regmap
, CPCAP_REG_DAY
, &cpcap_tm
.day
);
109 ret
|= regmap_read(rtc
->regmap
, CPCAP_REG_TOD1
, &cpcap_tm
.tod1
);
110 ret
|= regmap_read(rtc
->regmap
, CPCAP_REG_TOD2
, &cpcap_tm
.tod2
);
112 if (temp_tod2
> cpcap_tm
.tod2
)
113 ret
|= regmap_read(rtc
->regmap
, CPCAP_REG_DAY
, &cpcap_tm
.day
);
116 dev_err(dev
, "Failed to read time\n");
120 cpcap2rtc_time(tm
, &cpcap_tm
);
125 static int cpcap_rtc_set_time(struct device
*dev
, struct rtc_time
*tm
)
127 struct cpcap_rtc
*rtc
;
128 struct cpcap_time cpcap_tm
;
131 rtc
= dev_get_drvdata(dev
);
133 rtc2cpcap_time(&cpcap_tm
, tm
);
135 if (rtc
->alarm_enabled
)
136 disable_irq(rtc
->alarm_irq
);
137 if (rtc
->update_enabled
)
138 disable_irq(rtc
->update_irq
);
140 if (rtc
->vendor
== CPCAP_VENDOR_ST
) {
141 /* The TOD1 and TOD2 registers MUST be written in this order
142 * for the change to properly set.
144 ret
|= regmap_update_bits(rtc
->regmap
, CPCAP_REG_TOD1
,
145 TOD1_MASK
, cpcap_tm
.tod1
);
146 ret
|= regmap_update_bits(rtc
->regmap
, CPCAP_REG_TOD2
,
147 TOD2_MASK
, cpcap_tm
.tod2
);
148 ret
|= regmap_update_bits(rtc
->regmap
, CPCAP_REG_DAY
,
149 DAY_MASK
, cpcap_tm
.day
);
151 /* Clearing the upper lower 8 bits of the TOD guarantees that
152 * the upper half of TOD (TOD2) will not increment for 0xFF RTC
153 * ticks (255 seconds). During this time we can safely write
154 * to DAY, TOD2, then TOD1 (in that order) and expect RTC to be
155 * synchronized to the exact time requested upon the final write
158 ret
|= regmap_update_bits(rtc
->regmap
, CPCAP_REG_TOD1
,
160 ret
|= regmap_update_bits(rtc
->regmap
, CPCAP_REG_DAY
,
161 DAY_MASK
, cpcap_tm
.day
);
162 ret
|= regmap_update_bits(rtc
->regmap
, CPCAP_REG_TOD2
,
163 TOD2_MASK
, cpcap_tm
.tod2
);
164 ret
|= regmap_update_bits(rtc
->regmap
, CPCAP_REG_TOD1
,
165 TOD1_MASK
, cpcap_tm
.tod1
);
168 if (rtc
->update_enabled
)
169 enable_irq(rtc
->update_irq
);
170 if (rtc
->alarm_enabled
)
171 enable_irq(rtc
->alarm_irq
);
176 static int cpcap_rtc_read_alarm(struct device
*dev
, struct rtc_wkalrm
*alrm
)
178 struct cpcap_rtc
*rtc
;
179 struct cpcap_time cpcap_tm
;
182 rtc
= dev_get_drvdata(dev
);
184 alrm
->enabled
= rtc
->alarm_enabled
;
186 ret
= regmap_read(rtc
->regmap
, CPCAP_REG_DAYA
, &cpcap_tm
.day
);
187 ret
|= regmap_read(rtc
->regmap
, CPCAP_REG_TODA2
, &cpcap_tm
.tod2
);
188 ret
|= regmap_read(rtc
->regmap
, CPCAP_REG_TODA1
, &cpcap_tm
.tod1
);
191 dev_err(dev
, "Failed to read time\n");
195 cpcap2rtc_time(&alrm
->time
, &cpcap_tm
);
196 return rtc_valid_tm(&alrm
->time
);
199 static int cpcap_rtc_set_alarm(struct device
*dev
, struct rtc_wkalrm
*alrm
)
201 struct cpcap_rtc
*rtc
;
202 struct cpcap_time cpcap_tm
;
205 rtc
= dev_get_drvdata(dev
);
207 rtc2cpcap_time(&cpcap_tm
, &alrm
->time
);
209 if (rtc
->alarm_enabled
)
210 disable_irq(rtc
->alarm_irq
);
212 ret
= regmap_update_bits(rtc
->regmap
, CPCAP_REG_DAYA
, DAY_MASK
,
214 ret
|= regmap_update_bits(rtc
->regmap
, CPCAP_REG_TODA2
, TOD2_MASK
,
216 ret
|= regmap_update_bits(rtc
->regmap
, CPCAP_REG_TODA1
, TOD1_MASK
,
220 enable_irq(rtc
->alarm_irq
);
221 rtc
->alarm_enabled
= true;
227 static const struct rtc_class_ops cpcap_rtc_ops
= {
228 .read_time
= cpcap_rtc_read_time
,
229 .set_time
= cpcap_rtc_set_time
,
230 .read_alarm
= cpcap_rtc_read_alarm
,
231 .set_alarm
= cpcap_rtc_set_alarm
,
232 .alarm_irq_enable
= cpcap_rtc_alarm_irq_enable
,
235 static irqreturn_t
cpcap_rtc_alarm_irq(int irq
, void *data
)
237 struct cpcap_rtc
*rtc
= data
;
239 rtc_update_irq(rtc
->rtc_dev
, 1, RTC_AF
| RTC_IRQF
);
243 static irqreturn_t
cpcap_rtc_update_irq(int irq
, void *data
)
245 struct cpcap_rtc
*rtc
= data
;
247 rtc_update_irq(rtc
->rtc_dev
, 1, RTC_UF
| RTC_IRQF
);
251 static int cpcap_rtc_probe(struct platform_device
*pdev
)
253 struct device
*dev
= &pdev
->dev
;
254 struct cpcap_rtc
*rtc
;
257 rtc
= devm_kzalloc(dev
, sizeof(*rtc
), GFP_KERNEL
);
261 rtc
->regmap
= dev_get_regmap(dev
->parent
, NULL
);
265 platform_set_drvdata(pdev
, rtc
);
266 rtc
->rtc_dev
= devm_rtc_device_register(dev
, "cpcap_rtc",
267 &cpcap_rtc_ops
, THIS_MODULE
);
269 if (IS_ERR(rtc
->rtc_dev
))
270 return PTR_ERR(rtc
->rtc_dev
);
272 err
= cpcap_get_vendor(dev
, rtc
->regmap
, &rtc
->vendor
);
276 rtc
->alarm_irq
= platform_get_irq(pdev
, 0);
277 err
= devm_request_threaded_irq(dev
, rtc
->alarm_irq
, NULL
,
278 cpcap_rtc_alarm_irq
, IRQF_TRIGGER_NONE
,
281 dev_err(dev
, "Could not request alarm irq: %d\n", err
);
284 disable_irq(rtc
->alarm_irq
);
286 /* Stock Android uses the 1 Hz interrupt for "secure clock daemon",
287 * which is not supported by the mainline kernel. The mainline kernel
288 * does not use the irq at the moment, but we explicitly request and
289 * disable it, so that its masked and does not wake up the processor
292 rtc
->update_irq
= platform_get_irq(pdev
, 1);
293 err
= devm_request_threaded_irq(dev
, rtc
->update_irq
, NULL
,
294 cpcap_rtc_update_irq
, IRQF_TRIGGER_NONE
,
297 dev_err(dev
, "Could not request update irq: %d\n", err
);
300 disable_irq(rtc
->update_irq
);
302 err
= device_init_wakeup(dev
, 1);
304 dev_err(dev
, "wakeup initialization failed (%d)\n", err
);
305 /* ignore error and continue without wakeup support */
311 static const struct of_device_id cpcap_rtc_of_match
[] = {
312 { .compatible
= "motorola,cpcap-rtc", },
315 MODULE_DEVICE_TABLE(of
, cpcap_rtc_of_match
);
317 static struct platform_driver cpcap_rtc_driver
= {
318 .probe
= cpcap_rtc_probe
,
321 .of_match_table
= cpcap_rtc_of_match
,
325 module_platform_driver(cpcap_rtc_driver
);
327 MODULE_ALIAS("platform:cpcap-rtc");
328 MODULE_DESCRIPTION("CPCAP RTC driver");
329 MODULE_AUTHOR("Sebastian Reichel <sre@kernel.org>");
330 MODULE_LICENSE("GPL");