2 * Copyright (c) 2013-2014 Samsung Electronics Co., Ltd
3 * http://www.samsung.com
5 * Copyright (C) 2013 Google, Inc
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20 #include <linux/module.h>
21 #include <linux/i2c.h>
22 #include <linux/bcd.h>
23 #include <linux/regmap.h>
24 #include <linux/rtc.h>
25 #include <linux/platform_device.h>
26 #include <linux/mfd/samsung/core.h>
27 #include <linux/mfd/samsung/irq.h>
28 #include <linux/mfd/samsung/rtc.h>
29 #include <linux/mfd/samsung/s2mps14.h>
32 * Maximum number of retries for checking changes in UDR field
33 * of S5M_RTC_UDR_CON register (to limit possible endless loop).
35 * After writing to RTC registers (setting time or alarm) read the UDR field
36 * in S5M_RTC_UDR_CON register. UDR is auto-cleared when data have
39 #define UDR_READ_RETRY_CNT 5
50 /* Make sure this is always the last enum name. */
55 * Registers used by the driver which are different between chipsets.
57 * Operations like read time and write alarm/time require updating
58 * specific fields in UDR register. These fields usually are auto-cleared
59 * (with some exceptions).
61 * Table of operations per device:
63 * Device | Write time | Read time | Write alarm
64 * =================================================
65 * S5M8767 | UDR + TIME | | UDR
66 * S2MPS11/14 | WUDR | RUDR | WUDR + RUDR
67 * S2MPS13 | WUDR | RUDR | WUDR + AUDR
68 * S2MPS15 | WUDR | RUDR | AUDR
70 struct s5m_rtc_reg_config
{
71 /* Number of registers used for setting time/alarm0/alarm1 */
72 unsigned int regs_count
;
73 /* First register for time, seconds */
75 /* RTC control register */
77 /* First register for alarm 0, seconds */
79 /* First register for alarm 1, seconds */
82 * Register for update flag (UDR). Typically setting UDR field to 1
83 * will enable update of time or alarm register. Then it will be
84 * auto-cleared after successful update.
86 unsigned int udr_update
;
87 /* Auto-cleared mask in UDR field for writing time and alarm */
88 unsigned int autoclear_udr_mask
;
90 * Masks in UDR field for time and alarm operations.
91 * The read time mask can be 0. Rest should not.
93 unsigned int read_time_udr_mask
;
94 unsigned int write_time_udr_mask
;
95 unsigned int write_alarm_udr_mask
;
98 /* Register map for S5M8763 and S5M8767 */
99 static const struct s5m_rtc_reg_config s5m_rtc_regs
= {
102 .ctrl
= S5M_ALARM1_CONF
,
103 .alarm0
= S5M_ALARM0_SEC
,
104 .alarm1
= S5M_ALARM1_SEC
,
105 .udr_update
= S5M_RTC_UDR_CON
,
106 .autoclear_udr_mask
= S5M_RTC_UDR_MASK
,
107 .read_time_udr_mask
= 0, /* Not needed */
108 .write_time_udr_mask
= S5M_RTC_UDR_MASK
| S5M_RTC_TIME_EN_MASK
,
109 .write_alarm_udr_mask
= S5M_RTC_UDR_MASK
,
112 /* Register map for S2MPS13 */
113 static const struct s5m_rtc_reg_config s2mps13_rtc_regs
= {
115 .time
= S2MPS_RTC_SEC
,
116 .ctrl
= S2MPS_RTC_CTRL
,
117 .alarm0
= S2MPS_ALARM0_SEC
,
118 .alarm1
= S2MPS_ALARM1_SEC
,
119 .udr_update
= S2MPS_RTC_UDR_CON
,
120 .autoclear_udr_mask
= S2MPS_RTC_WUDR_MASK
,
121 .read_time_udr_mask
= S2MPS_RTC_RUDR_MASK
,
122 .write_time_udr_mask
= S2MPS_RTC_WUDR_MASK
,
123 .write_alarm_udr_mask
= S2MPS_RTC_WUDR_MASK
| S2MPS13_RTC_AUDR_MASK
,
126 /* Register map for S2MPS11/14 */
127 static const struct s5m_rtc_reg_config s2mps14_rtc_regs
= {
129 .time
= S2MPS_RTC_SEC
,
130 .ctrl
= S2MPS_RTC_CTRL
,
131 .alarm0
= S2MPS_ALARM0_SEC
,
132 .alarm1
= S2MPS_ALARM1_SEC
,
133 .udr_update
= S2MPS_RTC_UDR_CON
,
134 .autoclear_udr_mask
= S2MPS_RTC_WUDR_MASK
,
135 .read_time_udr_mask
= S2MPS_RTC_RUDR_MASK
,
136 .write_time_udr_mask
= S2MPS_RTC_WUDR_MASK
,
137 .write_alarm_udr_mask
= S2MPS_RTC_WUDR_MASK
| S2MPS_RTC_RUDR_MASK
,
141 * Register map for S2MPS15 - in comparison to S2MPS14 the WUDR and AUDR bits
144 static const struct s5m_rtc_reg_config s2mps15_rtc_regs
= {
146 .time
= S2MPS_RTC_SEC
,
147 .ctrl
= S2MPS_RTC_CTRL
,
148 .alarm0
= S2MPS_ALARM0_SEC
,
149 .alarm1
= S2MPS_ALARM1_SEC
,
150 .udr_update
= S2MPS_RTC_UDR_CON
,
151 .autoclear_udr_mask
= S2MPS_RTC_WUDR_MASK
,
152 .read_time_udr_mask
= S2MPS_RTC_RUDR_MASK
,
153 .write_time_udr_mask
= S2MPS15_RTC_WUDR_MASK
,
154 .write_alarm_udr_mask
= S2MPS15_RTC_AUDR_MASK
,
157 struct s5m_rtc_info
{
159 struct i2c_client
*i2c
;
160 struct sec_pmic_dev
*s5m87xx
;
161 struct regmap
*regmap
;
162 struct rtc_device
*rtc_dev
;
164 enum sec_device_type device_type
;
166 const struct s5m_rtc_reg_config
*regs
;
169 static const struct regmap_config s5m_rtc_regmap_config
= {
173 .max_register
= S5M_RTC_REG_MAX
,
176 static const struct regmap_config s2mps14_rtc_regmap_config
= {
180 .max_register
= S2MPS_RTC_REG_MAX
,
183 static void s5m8767_data_to_tm(u8
*data
, struct rtc_time
*tm
,
186 tm
->tm_sec
= data
[RTC_SEC
] & 0x7f;
187 tm
->tm_min
= data
[RTC_MIN
] & 0x7f;
189 tm
->tm_hour
= data
[RTC_HOUR
] & 0x1f;
191 tm
->tm_hour
= data
[RTC_HOUR
] & 0x0f;
192 if (data
[RTC_HOUR
] & HOUR_PM_MASK
)
196 tm
->tm_wday
= ffs(data
[RTC_WEEKDAY
] & 0x7f);
197 tm
->tm_mday
= data
[RTC_DATE
] & 0x1f;
198 tm
->tm_mon
= (data
[RTC_MONTH
] & 0x0f) - 1;
199 tm
->tm_year
= (data
[RTC_YEAR1
] & 0x7f) + 100;
204 static int s5m8767_tm_to_data(struct rtc_time
*tm
, u8
*data
)
206 data
[RTC_SEC
] = tm
->tm_sec
;
207 data
[RTC_MIN
] = tm
->tm_min
;
209 if (tm
->tm_hour
>= 12)
210 data
[RTC_HOUR
] = tm
->tm_hour
| HOUR_PM_MASK
;
212 data
[RTC_HOUR
] = tm
->tm_hour
& ~HOUR_PM_MASK
;
214 data
[RTC_WEEKDAY
] = 1 << tm
->tm_wday
;
215 data
[RTC_DATE
] = tm
->tm_mday
;
216 data
[RTC_MONTH
] = tm
->tm_mon
+ 1;
217 data
[RTC_YEAR1
] = tm
->tm_year
> 100 ? (tm
->tm_year
- 100) : 0;
219 if (tm
->tm_year
< 100) {
220 pr_err("RTC cannot handle the year %d\n",
229 * Read RTC_UDR_CON register and wait till UDR field is cleared.
230 * This indicates that time/alarm update ended.
232 static int s5m8767_wait_for_udr_update(struct s5m_rtc_info
*info
)
234 int ret
, retry
= UDR_READ_RETRY_CNT
;
238 ret
= regmap_read(info
->regmap
, info
->regs
->udr_update
, &data
);
239 } while (--retry
&& (data
& info
->regs
->autoclear_udr_mask
) && !ret
);
242 dev_err(info
->dev
, "waiting for UDR update, reached max number of retries\n");
247 static int s5m_check_peding_alarm_interrupt(struct s5m_rtc_info
*info
,
248 struct rtc_wkalrm
*alarm
)
253 switch (info
->device_type
) {
256 ret
= regmap_read(info
->regmap
, S5M_RTC_STATUS
, &val
);
257 val
&= S5M_ALARM0_STATUS
;
262 ret
= regmap_read(info
->s5m87xx
->regmap_pmic
, S2MPS14_REG_ST2
,
264 val
&= S2MPS_ALARM0_STATUS
;
280 static int s5m8767_rtc_set_time_reg(struct s5m_rtc_info
*info
)
285 ret
= regmap_read(info
->regmap
, info
->regs
->udr_update
, &data
);
287 dev_err(info
->dev
, "failed to read update reg(%d)\n", ret
);
291 data
|= info
->regs
->write_time_udr_mask
;
293 ret
= regmap_write(info
->regmap
, info
->regs
->udr_update
, data
);
295 dev_err(info
->dev
, "failed to write update reg(%d)\n", ret
);
299 ret
= s5m8767_wait_for_udr_update(info
);
304 static int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info
*info
)
309 ret
= regmap_read(info
->regmap
, info
->regs
->udr_update
, &data
);
311 dev_err(info
->dev
, "%s: fail to read update reg(%d)\n",
316 data
|= info
->regs
->write_alarm_udr_mask
;
317 switch (info
->device_type
) {
320 data
&= ~S5M_RTC_TIME_EN_MASK
;
325 /* No exceptions needed */
331 ret
= regmap_write(info
->regmap
, info
->regs
->udr_update
, data
);
333 dev_err(info
->dev
, "%s: fail to write update reg(%d)\n",
338 ret
= s5m8767_wait_for_udr_update(info
);
340 /* On S2MPS13 the AUDR is not auto-cleared */
341 if (info
->device_type
== S2MPS13X
)
342 regmap_update_bits(info
->regmap
, info
->regs
->udr_update
,
343 S2MPS13_RTC_AUDR_MASK
, 0);
348 static void s5m8763_data_to_tm(u8
*data
, struct rtc_time
*tm
)
350 tm
->tm_sec
= bcd2bin(data
[RTC_SEC
]);
351 tm
->tm_min
= bcd2bin(data
[RTC_MIN
]);
353 if (data
[RTC_HOUR
] & HOUR_12
) {
354 tm
->tm_hour
= bcd2bin(data
[RTC_HOUR
] & 0x1f);
355 if (data
[RTC_HOUR
] & HOUR_PM
)
358 tm
->tm_hour
= bcd2bin(data
[RTC_HOUR
] & 0x3f);
361 tm
->tm_wday
= data
[RTC_WEEKDAY
] & 0x07;
362 tm
->tm_mday
= bcd2bin(data
[RTC_DATE
]);
363 tm
->tm_mon
= bcd2bin(data
[RTC_MONTH
]);
364 tm
->tm_year
= bcd2bin(data
[RTC_YEAR1
]) + bcd2bin(data
[RTC_YEAR2
]) * 100;
368 static void s5m8763_tm_to_data(struct rtc_time
*tm
, u8
*data
)
370 data
[RTC_SEC
] = bin2bcd(tm
->tm_sec
);
371 data
[RTC_MIN
] = bin2bcd(tm
->tm_min
);
372 data
[RTC_HOUR
] = bin2bcd(tm
->tm_hour
);
373 data
[RTC_WEEKDAY
] = tm
->tm_wday
;
374 data
[RTC_DATE
] = bin2bcd(tm
->tm_mday
);
375 data
[RTC_MONTH
] = bin2bcd(tm
->tm_mon
);
376 data
[RTC_YEAR1
] = bin2bcd(tm
->tm_year
% 100);
377 data
[RTC_YEAR2
] = bin2bcd((tm
->tm_year
+ 1900) / 100);
380 static int s5m_rtc_read_time(struct device
*dev
, struct rtc_time
*tm
)
382 struct s5m_rtc_info
*info
= dev_get_drvdata(dev
);
383 u8 data
[RTC_MAX_NUM_TIME_REGS
];
386 if (info
->regs
->read_time_udr_mask
) {
387 ret
= regmap_update_bits(info
->regmap
,
388 info
->regs
->udr_update
,
389 info
->regs
->read_time_udr_mask
,
390 info
->regs
->read_time_udr_mask
);
393 "Failed to prepare registers for time reading: %d\n",
398 ret
= regmap_bulk_read(info
->regmap
, info
->regs
->time
, data
,
399 info
->regs
->regs_count
);
403 switch (info
->device_type
) {
405 s5m8763_data_to_tm(data
, tm
);
412 s5m8767_data_to_tm(data
, tm
, info
->rtc_24hr_mode
);
419 dev_dbg(dev
, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__
,
420 1900 + tm
->tm_year
, 1 + tm
->tm_mon
, tm
->tm_mday
,
421 tm
->tm_hour
, tm
->tm_min
, tm
->tm_sec
, tm
->tm_wday
);
426 static int s5m_rtc_set_time(struct device
*dev
, struct rtc_time
*tm
)
428 struct s5m_rtc_info
*info
= dev_get_drvdata(dev
);
429 u8 data
[RTC_MAX_NUM_TIME_REGS
];
432 switch (info
->device_type
) {
434 s5m8763_tm_to_data(tm
, data
);
440 ret
= s5m8767_tm_to_data(tm
, data
);
449 dev_dbg(dev
, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__
,
450 1900 + tm
->tm_year
, 1 + tm
->tm_mon
, tm
->tm_mday
,
451 tm
->tm_hour
, tm
->tm_min
, tm
->tm_sec
, tm
->tm_wday
);
453 ret
= regmap_raw_write(info
->regmap
, info
->regs
->time
, data
,
454 info
->regs
->regs_count
);
458 ret
= s5m8767_rtc_set_time_reg(info
);
463 static int s5m_rtc_read_alarm(struct device
*dev
, struct rtc_wkalrm
*alrm
)
465 struct s5m_rtc_info
*info
= dev_get_drvdata(dev
);
466 u8 data
[RTC_MAX_NUM_TIME_REGS
];
470 ret
= regmap_bulk_read(info
->regmap
, info
->regs
->alarm0
, data
,
471 info
->regs
->regs_count
);
475 switch (info
->device_type
) {
477 s5m8763_data_to_tm(data
, &alrm
->time
);
478 ret
= regmap_read(info
->regmap
, S5M_ALARM0_CONF
, &val
);
482 alrm
->enabled
= !!val
;
489 s5m8767_data_to_tm(data
, &alrm
->time
, info
->rtc_24hr_mode
);
491 for (i
= 0; i
< info
->regs
->regs_count
; i
++) {
492 if (data
[i
] & ALARM_ENABLE_MASK
) {
503 dev_dbg(dev
, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__
,
504 1900 + alrm
->time
.tm_year
, 1 + alrm
->time
.tm_mon
,
505 alrm
->time
.tm_mday
, alrm
->time
.tm_hour
,
506 alrm
->time
.tm_min
, alrm
->time
.tm_sec
,
509 ret
= s5m_check_peding_alarm_interrupt(info
, alrm
);
514 static int s5m_rtc_stop_alarm(struct s5m_rtc_info
*info
)
516 u8 data
[RTC_MAX_NUM_TIME_REGS
];
520 ret
= regmap_bulk_read(info
->regmap
, info
->regs
->alarm0
, data
,
521 info
->regs
->regs_count
);
525 s5m8767_data_to_tm(data
, &tm
, info
->rtc_24hr_mode
);
526 dev_dbg(info
->dev
, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__
,
527 1900 + tm
.tm_year
, 1 + tm
.tm_mon
, tm
.tm_mday
,
528 tm
.tm_hour
, tm
.tm_min
, tm
.tm_sec
, tm
.tm_wday
);
530 switch (info
->device_type
) {
532 ret
= regmap_write(info
->regmap
, S5M_ALARM0_CONF
, 0);
539 for (i
= 0; i
< info
->regs
->regs_count
; i
++)
540 data
[i
] &= ~ALARM_ENABLE_MASK
;
542 ret
= regmap_raw_write(info
->regmap
, info
->regs
->alarm0
, data
,
543 info
->regs
->regs_count
);
547 ret
= s5m8767_rtc_set_alarm_reg(info
);
558 static int s5m_rtc_start_alarm(struct s5m_rtc_info
*info
)
561 u8 data
[RTC_MAX_NUM_TIME_REGS
];
565 ret
= regmap_bulk_read(info
->regmap
, info
->regs
->alarm0
, data
,
566 info
->regs
->regs_count
);
570 s5m8767_data_to_tm(data
, &tm
, info
->rtc_24hr_mode
);
571 dev_dbg(info
->dev
, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__
,
572 1900 + tm
.tm_year
, 1 + tm
.tm_mon
, tm
.tm_mday
,
573 tm
.tm_hour
, tm
.tm_min
, tm
.tm_sec
, tm
.tm_wday
);
575 switch (info
->device_type
) {
578 ret
= regmap_write(info
->regmap
, S5M_ALARM0_CONF
, alarm0_conf
);
585 data
[RTC_SEC
] |= ALARM_ENABLE_MASK
;
586 data
[RTC_MIN
] |= ALARM_ENABLE_MASK
;
587 data
[RTC_HOUR
] |= ALARM_ENABLE_MASK
;
588 data
[RTC_WEEKDAY
] &= ~ALARM_ENABLE_MASK
;
589 if (data
[RTC_DATE
] & 0x1f)
590 data
[RTC_DATE
] |= ALARM_ENABLE_MASK
;
591 if (data
[RTC_MONTH
] & 0xf)
592 data
[RTC_MONTH
] |= ALARM_ENABLE_MASK
;
593 if (data
[RTC_YEAR1
] & 0x7f)
594 data
[RTC_YEAR1
] |= ALARM_ENABLE_MASK
;
596 ret
= regmap_raw_write(info
->regmap
, info
->regs
->alarm0
, data
,
597 info
->regs
->regs_count
);
600 ret
= s5m8767_rtc_set_alarm_reg(info
);
611 static int s5m_rtc_set_alarm(struct device
*dev
, struct rtc_wkalrm
*alrm
)
613 struct s5m_rtc_info
*info
= dev_get_drvdata(dev
);
614 u8 data
[RTC_MAX_NUM_TIME_REGS
];
617 switch (info
->device_type
) {
619 s5m8763_tm_to_data(&alrm
->time
, data
);
626 s5m8767_tm_to_data(&alrm
->time
, data
);
633 dev_dbg(dev
, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__
,
634 1900 + alrm
->time
.tm_year
, 1 + alrm
->time
.tm_mon
,
635 alrm
->time
.tm_mday
, alrm
->time
.tm_hour
, alrm
->time
.tm_min
,
636 alrm
->time
.tm_sec
, alrm
->time
.tm_wday
);
638 ret
= s5m_rtc_stop_alarm(info
);
642 ret
= regmap_raw_write(info
->regmap
, info
->regs
->alarm0
, data
,
643 info
->regs
->regs_count
);
647 ret
= s5m8767_rtc_set_alarm_reg(info
);
652 ret
= s5m_rtc_start_alarm(info
);
657 static int s5m_rtc_alarm_irq_enable(struct device
*dev
,
658 unsigned int enabled
)
660 struct s5m_rtc_info
*info
= dev_get_drvdata(dev
);
663 return s5m_rtc_start_alarm(info
);
665 return s5m_rtc_stop_alarm(info
);
668 static irqreturn_t
s5m_rtc_alarm_irq(int irq
, void *data
)
670 struct s5m_rtc_info
*info
= data
;
672 rtc_update_irq(info
->rtc_dev
, 1, RTC_IRQF
| RTC_AF
);
677 static const struct rtc_class_ops s5m_rtc_ops
= {
678 .read_time
= s5m_rtc_read_time
,
679 .set_time
= s5m_rtc_set_time
,
680 .read_alarm
= s5m_rtc_read_alarm
,
681 .set_alarm
= s5m_rtc_set_alarm
,
682 .alarm_irq_enable
= s5m_rtc_alarm_irq_enable
,
685 static int s5m8767_rtc_init_reg(struct s5m_rtc_info
*info
)
690 switch (info
->device_type
) {
693 /* UDR update time. Default of 7.32 ms is too long. */
694 ret
= regmap_update_bits(info
->regmap
, S5M_RTC_UDR_CON
,
695 S5M_RTC_UDR_T_MASK
, S5M_RTC_UDR_T_450_US
);
697 dev_err(info
->dev
, "%s: fail to change UDR time: %d\n",
700 /* Set RTC control register : Binary mode, 24hour mode */
701 data
[0] = (1 << BCD_EN_SHIFT
) | (1 << MODEL24_SHIFT
);
702 data
[1] = (0 << BCD_EN_SHIFT
) | (1 << MODEL24_SHIFT
);
704 ret
= regmap_raw_write(info
->regmap
, S5M_ALARM0_CONF
, data
, 2);
710 data
[0] = (0 << BCD_EN_SHIFT
) | (1 << MODEL24_SHIFT
);
711 ret
= regmap_write(info
->regmap
, info
->regs
->ctrl
, data
[0]);
716 * Should set WUDR & (RUDR or AUDR) bits to high after writing
717 * RTC_CTRL register like writing Alarm registers. We can't find
718 * the description from datasheet but vendor code does that
721 ret
= s5m8767_rtc_set_alarm_reg(info
);
728 info
->rtc_24hr_mode
= 1;
730 dev_err(info
->dev
, "%s: fail to write controlm reg(%d)\n",
738 static int s5m_rtc_probe(struct platform_device
*pdev
)
740 struct sec_pmic_dev
*s5m87xx
= dev_get_drvdata(pdev
->dev
.parent
);
741 struct sec_platform_data
*pdata
= s5m87xx
->pdata
;
742 struct s5m_rtc_info
*info
;
743 const struct regmap_config
*regmap_cfg
;
747 dev_err(pdev
->dev
.parent
, "Platform data not supplied\n");
751 info
= devm_kzalloc(&pdev
->dev
, sizeof(*info
), GFP_KERNEL
);
755 switch (platform_get_device_id(pdev
)->driver_data
) {
757 regmap_cfg
= &s2mps14_rtc_regmap_config
;
758 info
->regs
= &s2mps15_rtc_regs
;
759 alarm_irq
= S2MPS14_IRQ_RTCA0
;
762 regmap_cfg
= &s2mps14_rtc_regmap_config
;
763 info
->regs
= &s2mps14_rtc_regs
;
764 alarm_irq
= S2MPS14_IRQ_RTCA0
;
767 regmap_cfg
= &s2mps14_rtc_regmap_config
;
768 info
->regs
= &s2mps13_rtc_regs
;
769 alarm_irq
= S2MPS14_IRQ_RTCA0
;
772 regmap_cfg
= &s5m_rtc_regmap_config
;
773 info
->regs
= &s5m_rtc_regs
;
774 alarm_irq
= S5M8763_IRQ_ALARM0
;
777 regmap_cfg
= &s5m_rtc_regmap_config
;
778 info
->regs
= &s5m_rtc_regs
;
779 alarm_irq
= S5M8767_IRQ_RTCA1
;
783 "Device type %lu is not supported by RTC driver\n",
784 platform_get_device_id(pdev
)->driver_data
);
788 info
->i2c
= i2c_new_dummy(s5m87xx
->i2c
->adapter
, RTC_I2C_ADDR
);
790 dev_err(&pdev
->dev
, "Failed to allocate I2C for RTC\n");
794 info
->regmap
= devm_regmap_init_i2c(info
->i2c
, regmap_cfg
);
795 if (IS_ERR(info
->regmap
)) {
796 ret
= PTR_ERR(info
->regmap
);
797 dev_err(&pdev
->dev
, "Failed to allocate RTC register map: %d\n",
802 info
->dev
= &pdev
->dev
;
803 info
->s5m87xx
= s5m87xx
;
804 info
->device_type
= platform_get_device_id(pdev
)->driver_data
;
806 if (s5m87xx
->irq_data
) {
807 info
->irq
= regmap_irq_get_virq(s5m87xx
->irq_data
, alarm_irq
);
808 if (info
->irq
<= 0) {
810 dev_err(&pdev
->dev
, "Failed to get virtual IRQ %d\n",
816 platform_set_drvdata(pdev
, info
);
818 ret
= s5m8767_rtc_init_reg(info
);
820 device_init_wakeup(&pdev
->dev
, 1);
822 info
->rtc_dev
= devm_rtc_device_register(&pdev
->dev
, "s5m-rtc",
823 &s5m_rtc_ops
, THIS_MODULE
);
825 if (IS_ERR(info
->rtc_dev
)) {
826 ret
= PTR_ERR(info
->rtc_dev
);
831 dev_info(&pdev
->dev
, "Alarm IRQ not available\n");
835 ret
= devm_request_threaded_irq(&pdev
->dev
, info
->irq
, NULL
,
836 s5m_rtc_alarm_irq
, 0, "rtc-alarm0",
839 dev_err(&pdev
->dev
, "Failed to request alarm IRQ: %d: %d\n",
847 i2c_unregister_device(info
->i2c
);
852 static int s5m_rtc_remove(struct platform_device
*pdev
)
854 struct s5m_rtc_info
*info
= platform_get_drvdata(pdev
);
856 i2c_unregister_device(info
->i2c
);
861 #ifdef CONFIG_PM_SLEEP
862 static int s5m_rtc_resume(struct device
*dev
)
864 struct s5m_rtc_info
*info
= dev_get_drvdata(dev
);
867 if (info
->irq
&& device_may_wakeup(dev
))
868 ret
= disable_irq_wake(info
->irq
);
873 static int s5m_rtc_suspend(struct device
*dev
)
875 struct s5m_rtc_info
*info
= dev_get_drvdata(dev
);
878 if (info
->irq
&& device_may_wakeup(dev
))
879 ret
= enable_irq_wake(info
->irq
);
883 #endif /* CONFIG_PM_SLEEP */
885 static SIMPLE_DEV_PM_OPS(s5m_rtc_pm_ops
, s5m_rtc_suspend
, s5m_rtc_resume
);
887 static const struct platform_device_id s5m_rtc_id
[] = {
888 { "s5m-rtc", S5M8767X
},
889 { "s2mps13-rtc", S2MPS13X
},
890 { "s2mps14-rtc", S2MPS14X
},
891 { "s2mps15-rtc", S2MPS15X
},
894 MODULE_DEVICE_TABLE(platform
, s5m_rtc_id
);
896 static struct platform_driver s5m_rtc_driver
= {
899 .pm
= &s5m_rtc_pm_ops
,
901 .probe
= s5m_rtc_probe
,
902 .remove
= s5m_rtc_remove
,
903 .id_table
= s5m_rtc_id
,
906 module_platform_driver(s5m_rtc_driver
);
908 /* Module information */
909 MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
910 MODULE_DESCRIPTION("Samsung S5M/S2MPS14 RTC driver");
911 MODULE_LICENSE("GPL");
912 MODULE_ALIAS("platform:s5m-rtc");