2 * Driver for AT91/AT32 LCD Controller
4 * Copyright (C) 2007 Atmel Corporation
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
20 #include <linux/gfp.h>
21 #include <linux/gpio/consumer.h>
22 #include <linux/module.h>
24 #include <linux/of_device.h>
25 #include <video/of_display_timing.h>
26 #include <linux/regulator/consumer.h>
27 #include <video/videomode.h>
29 #include <video/atmel_lcdc.h>
31 struct atmel_lcdfb_config
{
32 bool have_alt_pixclock
;
34 bool have_intensity_bit
;
37 /* LCD Controller info data structure, stored in device platform_data */
38 struct atmel_lcdfb_info
{
43 struct work_struct task
;
45 unsigned int smem_len
;
46 struct platform_device
*pdev
;
50 struct backlight_device
*backlight
;
54 u32 pseudo_palette
[16];
55 bool have_intensity_bit
;
57 struct atmel_lcdfb_pdata pdata
;
59 struct atmel_lcdfb_config
*config
;
60 struct regulator
*reg_lcd
;
63 struct atmel_lcdfb_power_ctrl_gpio
{
64 struct gpio_desc
*gpiod
;
66 struct list_head list
;
69 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
70 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
72 /* configurable parameters */
73 #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
74 #define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */
75 #define ATMEL_LCDC_FIFO_SIZE 512 /* words */
77 static struct atmel_lcdfb_config at91sam9261_config
= {
79 .have_intensity_bit
= true,
82 static struct atmel_lcdfb_config at91sam9263_config
= {
83 .have_intensity_bit
= true,
86 static struct atmel_lcdfb_config at91sam9g10_config
= {
90 static struct atmel_lcdfb_config at91sam9g45_config
= {
91 .have_alt_pixclock
= true,
94 static struct atmel_lcdfb_config at91sam9g45es_config
= {
97 static struct atmel_lcdfb_config at91sam9rl_config
= {
98 .have_intensity_bit
= true,
101 static struct atmel_lcdfb_config at32ap_config
= {
105 static const struct platform_device_id atmel_lcdfb_devtypes
[] = {
107 .name
= "at91sam9261-lcdfb",
108 .driver_data
= (unsigned long)&at91sam9261_config
,
110 .name
= "at91sam9263-lcdfb",
111 .driver_data
= (unsigned long)&at91sam9263_config
,
113 .name
= "at91sam9g10-lcdfb",
114 .driver_data
= (unsigned long)&at91sam9g10_config
,
116 .name
= "at91sam9g45-lcdfb",
117 .driver_data
= (unsigned long)&at91sam9g45_config
,
119 .name
= "at91sam9g45es-lcdfb",
120 .driver_data
= (unsigned long)&at91sam9g45es_config
,
122 .name
= "at91sam9rl-lcdfb",
123 .driver_data
= (unsigned long)&at91sam9rl_config
,
125 .name
= "at32ap-lcdfb",
126 .driver_data
= (unsigned long)&at32ap_config
,
131 MODULE_DEVICE_TABLE(platform
, atmel_lcdfb_devtypes
);
133 static struct atmel_lcdfb_config
*
134 atmel_lcdfb_get_config(struct platform_device
*pdev
)
138 data
= platform_get_device_id(pdev
)->driver_data
;
140 return (struct atmel_lcdfb_config
*)data
;
143 #if defined(CONFIG_ARCH_AT91)
144 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
145 | FBINFO_PARTIAL_PAN_OK \
146 | FBINFO_HWACCEL_YPAN)
148 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info
*sinfo
,
149 struct fb_var_screeninfo
*var
,
150 struct fb_info
*info
)
154 #elif defined(CONFIG_AVR32)
155 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
156 | FBINFO_PARTIAL_PAN_OK \
157 | FBINFO_HWACCEL_XPAN \
158 | FBINFO_HWACCEL_YPAN)
160 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info
*sinfo
,
161 struct fb_var_screeninfo
*var
,
162 struct fb_info
*info
)
167 pixeloff
= (var
->xoffset
* info
->var
.bits_per_pixel
) & 0x1f;
169 dma2dcfg
= (info
->var
.xres_virtual
- info
->var
.xres
)
170 * info
->var
.bits_per_pixel
/ 8;
171 dma2dcfg
|= pixeloff
<< ATMEL_LCDC_PIXELOFF_OFFSET
;
172 lcdc_writel(sinfo
, ATMEL_LCDC_DMA2DCFG
, dma2dcfg
);
174 /* Update configuration */
175 lcdc_writel(sinfo
, ATMEL_LCDC_DMACON
,
176 lcdc_readl(sinfo
, ATMEL_LCDC_DMACON
)
177 | ATMEL_LCDC_DMAUPDT
);
181 static u32 contrast_ctr
= ATMEL_LCDC_PS_DIV8
182 | ATMEL_LCDC_POL_POSITIVE
183 | ATMEL_LCDC_ENA_PWMENABLE
;
185 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
187 /* some bl->props field just changed */
188 static int atmel_bl_update_status(struct backlight_device
*bl
)
190 struct atmel_lcdfb_info
*sinfo
= bl_get_data(bl
);
191 int power
= sinfo
->bl_power
;
192 int brightness
= bl
->props
.brightness
;
194 /* REVISIT there may be a meaningful difference between
195 * fb_blank and power ... there seem to be some cases
196 * this doesn't handle correctly.
198 if (bl
->props
.fb_blank
!= sinfo
->bl_power
)
199 power
= bl
->props
.fb_blank
;
200 else if (bl
->props
.power
!= sinfo
->bl_power
)
201 power
= bl
->props
.power
;
203 if (brightness
< 0 && power
== FB_BLANK_UNBLANK
)
204 brightness
= lcdc_readl(sinfo
, ATMEL_LCDC_CONTRAST_VAL
);
205 else if (power
!= FB_BLANK_UNBLANK
)
208 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_VAL
, brightness
);
209 if (contrast_ctr
& ATMEL_LCDC_POL_POSITIVE
)
210 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
,
211 brightness
? contrast_ctr
: 0);
213 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
, contrast_ctr
);
215 bl
->props
.fb_blank
= bl
->props
.power
= sinfo
->bl_power
= power
;
220 static int atmel_bl_get_brightness(struct backlight_device
*bl
)
222 struct atmel_lcdfb_info
*sinfo
= bl_get_data(bl
);
224 return lcdc_readl(sinfo
, ATMEL_LCDC_CONTRAST_VAL
);
227 static const struct backlight_ops atmel_lcdc_bl_ops
= {
228 .update_status
= atmel_bl_update_status
,
229 .get_brightness
= atmel_bl_get_brightness
,
232 static void init_backlight(struct atmel_lcdfb_info
*sinfo
)
234 struct backlight_properties props
;
235 struct backlight_device
*bl
;
237 sinfo
->bl_power
= FB_BLANK_UNBLANK
;
239 if (sinfo
->backlight
)
242 memset(&props
, 0, sizeof(struct backlight_properties
));
243 props
.type
= BACKLIGHT_RAW
;
244 props
.max_brightness
= 0xff;
245 bl
= backlight_device_register("backlight", &sinfo
->pdev
->dev
, sinfo
,
246 &atmel_lcdc_bl_ops
, &props
);
248 dev_err(&sinfo
->pdev
->dev
, "error %ld on backlight register\n",
252 sinfo
->backlight
= bl
;
254 bl
->props
.power
= FB_BLANK_UNBLANK
;
255 bl
->props
.fb_blank
= FB_BLANK_UNBLANK
;
256 bl
->props
.brightness
= atmel_bl_get_brightness(bl
);
259 static void exit_backlight(struct atmel_lcdfb_info
*sinfo
)
261 if (!sinfo
->backlight
)
264 if (sinfo
->backlight
->ops
) {
265 sinfo
->backlight
->props
.power
= FB_BLANK_POWERDOWN
;
266 sinfo
->backlight
->ops
->update_status(sinfo
->backlight
);
268 backlight_device_unregister(sinfo
->backlight
);
273 static void init_backlight(struct atmel_lcdfb_info
*sinfo
)
275 dev_warn(&sinfo
->pdev
->dev
, "backlight control is not available\n");
278 static void exit_backlight(struct atmel_lcdfb_info
*sinfo
)
284 static void init_contrast(struct atmel_lcdfb_info
*sinfo
)
286 struct atmel_lcdfb_pdata
*pdata
= &sinfo
->pdata
;
288 /* contrast pwm can be 'inverted' */
289 if (pdata
->lcdcon_pol_negative
)
290 contrast_ctr
&= ~(ATMEL_LCDC_POL_POSITIVE
);
292 /* have some default contrast/backlight settings */
293 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
, contrast_ctr
);
294 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_VAL
, ATMEL_LCDC_CVAL_DEFAULT
);
296 if (pdata
->lcdcon_is_backlight
)
297 init_backlight(sinfo
);
300 static inline void atmel_lcdfb_power_control(struct atmel_lcdfb_info
*sinfo
, int on
)
303 struct atmel_lcdfb_pdata
*pdata
= &sinfo
->pdata
;
305 if (pdata
->atmel_lcdfb_power_control
)
306 pdata
->atmel_lcdfb_power_control(pdata
, on
);
307 else if (sinfo
->reg_lcd
) {
309 ret
= regulator_enable(sinfo
->reg_lcd
);
311 dev_err(&sinfo
->pdev
->dev
,
312 "lcd regulator enable failed: %d\n", ret
);
314 ret
= regulator_disable(sinfo
->reg_lcd
);
316 dev_err(&sinfo
->pdev
->dev
,
317 "lcd regulator disable failed: %d\n", ret
);
322 static const struct fb_fix_screeninfo atmel_lcdfb_fix __initconst
= {
323 .type
= FB_TYPE_PACKED_PIXELS
,
324 .visual
= FB_VISUAL_TRUECOLOR
,
328 .accel
= FB_ACCEL_NONE
,
331 static unsigned long compute_hozval(struct atmel_lcdfb_info
*sinfo
,
334 unsigned long lcdcon2
;
337 if (!sinfo
->config
->have_hozval
)
340 lcdcon2
= lcdc_readl(sinfo
, ATMEL_LCDC_LCDCON2
);
342 if ((lcdcon2
& ATMEL_LCDC_DISTYPE
) != ATMEL_LCDC_DISTYPE_TFT
) {
344 if ((lcdcon2
& ATMEL_LCDC_DISTYPE
) == ATMEL_LCDC_DISTYPE_STNCOLOR
) {
347 if ( (lcdcon2
& ATMEL_LCDC_IFWIDTH
) == ATMEL_LCDC_IFWIDTH_4
348 || ( (lcdcon2
& ATMEL_LCDC_IFWIDTH
) == ATMEL_LCDC_IFWIDTH_8
349 && (lcdcon2
& ATMEL_LCDC_SCANMOD
) == ATMEL_LCDC_SCANMOD_DUAL
))
350 value
= DIV_ROUND_UP(value
, 4);
352 value
= DIV_ROUND_UP(value
, 8);
358 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info
*sinfo
)
360 struct atmel_lcdfb_pdata
*pdata
= &sinfo
->pdata
;
362 /* Turn off the LCD controller and the DMA controller */
363 lcdc_writel(sinfo
, ATMEL_LCDC_PWRCON
,
364 pdata
->guard_time
<< ATMEL_LCDC_GUARDT_OFFSET
);
366 /* Wait for the LCDC core to become idle */
367 while (lcdc_readl(sinfo
, ATMEL_LCDC_PWRCON
) & ATMEL_LCDC_BUSY
)
370 lcdc_writel(sinfo
, ATMEL_LCDC_DMACON
, 0);
373 static void atmel_lcdfb_stop(struct atmel_lcdfb_info
*sinfo
)
375 atmel_lcdfb_stop_nowait(sinfo
);
377 /* Wait for DMA engine to become idle... */
378 while (lcdc_readl(sinfo
, ATMEL_LCDC_DMACON
) & ATMEL_LCDC_DMABUSY
)
382 static void atmel_lcdfb_start(struct atmel_lcdfb_info
*sinfo
)
384 struct atmel_lcdfb_pdata
*pdata
= &sinfo
->pdata
;
386 lcdc_writel(sinfo
, ATMEL_LCDC_DMACON
, pdata
->default_dmacon
);
387 lcdc_writel(sinfo
, ATMEL_LCDC_PWRCON
,
388 (pdata
->guard_time
<< ATMEL_LCDC_GUARDT_OFFSET
)
392 static void atmel_lcdfb_update_dma(struct fb_info
*info
,
393 struct fb_var_screeninfo
*var
)
395 struct atmel_lcdfb_info
*sinfo
= info
->par
;
396 struct fb_fix_screeninfo
*fix
= &info
->fix
;
397 unsigned long dma_addr
;
399 dma_addr
= (fix
->smem_start
+ var
->yoffset
* fix
->line_length
400 + var
->xoffset
* info
->var
.bits_per_pixel
/ 8);
404 /* Set framebuffer DMA base address and pixel offset */
405 lcdc_writel(sinfo
, ATMEL_LCDC_DMABADDR1
, dma_addr
);
407 atmel_lcdfb_update_dma2d(sinfo
, var
, info
);
410 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info
*sinfo
)
412 struct fb_info
*info
= sinfo
->info
;
414 dma_free_wc(info
->device
, info
->fix
.smem_len
, info
->screen_base
,
415 info
->fix
.smem_start
);
419 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
420 * @sinfo: the frame buffer to allocate memory for
422 * This function is called only from the atmel_lcdfb_probe()
423 * so no locking by fb_info->mm_lock around smem_len setting is needed.
425 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info
*sinfo
)
427 struct fb_info
*info
= sinfo
->info
;
428 struct fb_var_screeninfo
*var
= &info
->var
;
429 unsigned int smem_len
;
431 smem_len
= (var
->xres_virtual
* var
->yres_virtual
432 * ((var
->bits_per_pixel
+ 7) / 8));
433 info
->fix
.smem_len
= max(smem_len
, sinfo
->smem_len
);
435 info
->screen_base
= dma_alloc_wc(info
->device
, info
->fix
.smem_len
,
436 (dma_addr_t
*)&info
->fix
.smem_start
,
439 if (!info
->screen_base
) {
443 memset(info
->screen_base
, 0, info
->fix
.smem_len
);
448 static const struct fb_videomode
*atmel_lcdfb_choose_mode(struct fb_var_screeninfo
*var
,
449 struct fb_info
*info
)
451 struct fb_videomode varfbmode
;
452 const struct fb_videomode
*fbmode
= NULL
;
454 fb_var_to_videomode(&varfbmode
, var
);
455 fbmode
= fb_find_nearest_mode(&varfbmode
, &info
->modelist
);
457 fb_videomode_to_var(var
, fbmode
);
463 * atmel_lcdfb_check_var - Validates a var passed in.
464 * @var: frame buffer variable screen structure
465 * @info: frame buffer structure that represents a single frame buffer
467 * Checks to see if the hardware supports the state requested by
468 * var passed in. This function does not alter the hardware
469 * state!!! This means the data stored in struct fb_info and
470 * struct atmel_lcdfb_info do not change. This includes the var
471 * inside of struct fb_info. Do NOT change these. This function
472 * can be called on its own if we intent to only test a mode and
473 * not actually set it. The stuff in modedb.c is a example of
474 * this. If the var passed in is slightly off by what the
475 * hardware can support then we alter the var PASSED in to what
476 * we can do. If the hardware doesn't support mode change a
477 * -EINVAL will be returned by the upper layers. You don't need
478 * to implement this function then. If you hardware doesn't
479 * support changing the resolution then this function is not
480 * needed. In this case the driver would just provide a var that
481 * represents the static state the screen is in.
483 * Returns negative errno on error, or zero on success.
485 static int atmel_lcdfb_check_var(struct fb_var_screeninfo
*var
,
486 struct fb_info
*info
)
488 struct device
*dev
= info
->device
;
489 struct atmel_lcdfb_info
*sinfo
= info
->par
;
490 struct atmel_lcdfb_pdata
*pdata
= &sinfo
->pdata
;
491 unsigned long clk_value_khz
;
493 clk_value_khz
= clk_get_rate(sinfo
->lcdc_clk
) / 1000;
495 dev_dbg(dev
, "%s:\n", __func__
);
497 if (!(var
->pixclock
&& var
->bits_per_pixel
)) {
498 /* choose a suitable mode if possible */
499 if (!atmel_lcdfb_choose_mode(var
, info
)) {
500 dev_err(dev
, "needed value not specified\n");
505 dev_dbg(dev
, " resolution: %ux%u\n", var
->xres
, var
->yres
);
506 dev_dbg(dev
, " pixclk: %lu KHz\n", PICOS2KHZ(var
->pixclock
));
507 dev_dbg(dev
, " bpp: %u\n", var
->bits_per_pixel
);
508 dev_dbg(dev
, " clk: %lu KHz\n", clk_value_khz
);
510 if (PICOS2KHZ(var
->pixclock
) > clk_value_khz
) {
511 dev_err(dev
, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var
->pixclock
));
515 /* Do not allow to have real resoulution larger than virtual */
516 if (var
->xres
> var
->xres_virtual
)
517 var
->xres_virtual
= var
->xres
;
519 if (var
->yres
> var
->yres_virtual
)
520 var
->yres_virtual
= var
->yres
;
522 /* Force same alignment for each line */
523 var
->xres
= (var
->xres
+ 3) & ~3UL;
524 var
->xres_virtual
= (var
->xres_virtual
+ 3) & ~3UL;
526 var
->red
.msb_right
= var
->green
.msb_right
= var
->blue
.msb_right
= 0;
527 var
->transp
.msb_right
= 0;
528 var
->transp
.offset
= var
->transp
.length
= 0;
529 var
->xoffset
= var
->yoffset
= 0;
531 if (info
->fix
.smem_len
) {
532 unsigned int smem_len
= (var
->xres_virtual
* var
->yres_virtual
533 * ((var
->bits_per_pixel
+ 7) / 8));
534 if (smem_len
> info
->fix
.smem_len
) {
535 dev_err(dev
, "Frame buffer is too small (%u) for screen size (need at least %u)\n",
536 info
->fix
.smem_len
, smem_len
);
541 /* Saturate vertical and horizontal timings at maximum values */
542 var
->vsync_len
= min_t(u32
, var
->vsync_len
,
543 (ATMEL_LCDC_VPW
>> ATMEL_LCDC_VPW_OFFSET
) + 1);
544 var
->upper_margin
= min_t(u32
, var
->upper_margin
,
545 ATMEL_LCDC_VBP
>> ATMEL_LCDC_VBP_OFFSET
);
546 var
->lower_margin
= min_t(u32
, var
->lower_margin
,
548 var
->right_margin
= min_t(u32
, var
->right_margin
,
549 (ATMEL_LCDC_HFP
>> ATMEL_LCDC_HFP_OFFSET
) + 1);
550 var
->hsync_len
= min_t(u32
, var
->hsync_len
,
551 (ATMEL_LCDC_HPW
>> ATMEL_LCDC_HPW_OFFSET
) + 1);
552 var
->left_margin
= min_t(u32
, var
->left_margin
,
555 /* Some parameters can't be zero */
556 var
->vsync_len
= max_t(u32
, var
->vsync_len
, 1);
557 var
->right_margin
= max_t(u32
, var
->right_margin
, 1);
558 var
->hsync_len
= max_t(u32
, var
->hsync_len
, 1);
559 var
->left_margin
= max_t(u32
, var
->left_margin
, 1);
561 switch (var
->bits_per_pixel
) {
566 var
->red
.offset
= var
->green
.offset
= var
->blue
.offset
= 0;
567 var
->red
.length
= var
->green
.length
= var
->blue
.length
568 = var
->bits_per_pixel
;
571 /* Older SOCs use IBGR:555 rather than BGR:565. */
572 if (sinfo
->config
->have_intensity_bit
)
573 var
->green
.length
= 5;
575 var
->green
.length
= 6;
577 if (pdata
->lcd_wiring_mode
== ATMEL_LCDC_WIRING_RGB
) {
579 var
->red
.offset
= var
->green
.length
+ 5;
580 var
->blue
.offset
= 0;
584 var
->blue
.offset
= var
->green
.length
+ 5;
586 var
->green
.offset
= 5;
587 var
->red
.length
= var
->blue
.length
= 5;
590 var
->transp
.offset
= 24;
591 var
->transp
.length
= 8;
594 if (pdata
->lcd_wiring_mode
== ATMEL_LCDC_WIRING_RGB
) {
596 var
->red
.offset
= 16;
597 var
->blue
.offset
= 0;
601 var
->blue
.offset
= 16;
603 var
->green
.offset
= 8;
604 var
->red
.length
= var
->green
.length
= var
->blue
.length
= 8;
607 dev_err(dev
, "color depth %d not supported\n",
608 var
->bits_per_pixel
);
618 static void atmel_lcdfb_reset(struct atmel_lcdfb_info
*sinfo
)
622 atmel_lcdfb_stop(sinfo
);
623 atmel_lcdfb_start(sinfo
);
627 * atmel_lcdfb_set_par - Alters the hardware state.
628 * @info: frame buffer structure that represents a single frame buffer
630 * Using the fb_var_screeninfo in fb_info we set the resolution
631 * of the this particular framebuffer. This function alters the
632 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
633 * not alter var in fb_info since we are using that data. This
634 * means we depend on the data in var inside fb_info to be
635 * supported by the hardware. atmel_lcdfb_check_var is always called
636 * before atmel_lcdfb_set_par to ensure this. Again if you can't
637 * change the resolution you don't need this function.
640 static int atmel_lcdfb_set_par(struct fb_info
*info
)
642 struct atmel_lcdfb_info
*sinfo
= info
->par
;
643 struct atmel_lcdfb_pdata
*pdata
= &sinfo
->pdata
;
644 unsigned long hozval_linesz
;
646 unsigned long clk_value_khz
;
647 unsigned long bits_per_line
;
648 unsigned long pix_factor
= 2;
652 dev_dbg(info
->device
, "%s:\n", __func__
);
653 dev_dbg(info
->device
, " * resolution: %ux%u (%ux%u virtual)\n",
654 info
->var
.xres
, info
->var
.yres
,
655 info
->var
.xres_virtual
, info
->var
.yres_virtual
);
657 atmel_lcdfb_stop_nowait(sinfo
);
659 if (info
->var
.bits_per_pixel
== 1)
660 info
->fix
.visual
= FB_VISUAL_MONO01
;
661 else if (info
->var
.bits_per_pixel
<= 8)
662 info
->fix
.visual
= FB_VISUAL_PSEUDOCOLOR
;
664 info
->fix
.visual
= FB_VISUAL_TRUECOLOR
;
666 bits_per_line
= info
->var
.xres_virtual
* info
->var
.bits_per_pixel
;
667 info
->fix
.line_length
= DIV_ROUND_UP(bits_per_line
, 8);
669 /* Re-initialize the DMA engine... */
670 dev_dbg(info
->device
, " * update DMA engine\n");
671 atmel_lcdfb_update_dma(info
, &info
->var
);
673 /* ...set frame size and burst length = 8 words (?) */
674 value
= (info
->var
.yres
* info
->var
.xres
* info
->var
.bits_per_pixel
) / 32;
675 value
|= ((ATMEL_LCDC_DMA_BURST_LEN
- 1) << ATMEL_LCDC_BLENGTH_OFFSET
);
676 lcdc_writel(sinfo
, ATMEL_LCDC_DMAFRMCFG
, value
);
678 /* Now, the LCDC core... */
680 /* Set pixel clock */
681 if (sinfo
->config
->have_alt_pixclock
)
684 clk_value_khz
= clk_get_rate(sinfo
->lcdc_clk
) / 1000;
686 value
= DIV_ROUND_UP(clk_value_khz
, PICOS2KHZ(info
->var
.pixclock
));
688 if (value
< pix_factor
) {
689 dev_notice(info
->device
, "Bypassing pixel clock divider\n");
690 lcdc_writel(sinfo
, ATMEL_LCDC_LCDCON1
, ATMEL_LCDC_BYPASS
);
692 value
= (value
/ pix_factor
) - 1;
693 dev_dbg(info
->device
, " * programming CLKVAL = 0x%08lx\n",
695 lcdc_writel(sinfo
, ATMEL_LCDC_LCDCON1
,
696 value
<< ATMEL_LCDC_CLKVAL_OFFSET
);
698 KHZ2PICOS(clk_value_khz
/ (pix_factor
* (value
+ 1)));
699 dev_dbg(info
->device
, " updated pixclk: %lu KHz\n",
700 PICOS2KHZ(info
->var
.pixclock
));
704 /* Initialize control register 2 */
705 value
= pdata
->default_lcdcon2
;
707 if (!(info
->var
.sync
& FB_SYNC_HOR_HIGH_ACT
))
708 value
|= ATMEL_LCDC_INVLINE_INVERTED
;
709 if (!(info
->var
.sync
& FB_SYNC_VERT_HIGH_ACT
))
710 value
|= ATMEL_LCDC_INVFRAME_INVERTED
;
712 switch (info
->var
.bits_per_pixel
) {
713 case 1: value
|= ATMEL_LCDC_PIXELSIZE_1
; break;
714 case 2: value
|= ATMEL_LCDC_PIXELSIZE_2
; break;
715 case 4: value
|= ATMEL_LCDC_PIXELSIZE_4
; break;
716 case 8: value
|= ATMEL_LCDC_PIXELSIZE_8
; break;
717 case 15: /* fall through */
718 case 16: value
|= ATMEL_LCDC_PIXELSIZE_16
; break;
719 case 24: value
|= ATMEL_LCDC_PIXELSIZE_24
; break;
720 case 32: value
|= ATMEL_LCDC_PIXELSIZE_32
; break;
721 default: BUG(); break;
723 dev_dbg(info
->device
, " * LCDCON2 = %08lx\n", value
);
724 lcdc_writel(sinfo
, ATMEL_LCDC_LCDCON2
, value
);
726 /* Vertical timing */
727 value
= (info
->var
.vsync_len
- 1) << ATMEL_LCDC_VPW_OFFSET
;
728 value
|= info
->var
.upper_margin
<< ATMEL_LCDC_VBP_OFFSET
;
729 value
|= info
->var
.lower_margin
;
730 dev_dbg(info
->device
, " * LCDTIM1 = %08lx\n", value
);
731 lcdc_writel(sinfo
, ATMEL_LCDC_TIM1
, value
);
733 /* Horizontal timing */
734 value
= (info
->var
.right_margin
- 1) << ATMEL_LCDC_HFP_OFFSET
;
735 value
|= (info
->var
.hsync_len
- 1) << ATMEL_LCDC_HPW_OFFSET
;
736 value
|= (info
->var
.left_margin
- 1);
737 dev_dbg(info
->device
, " * LCDTIM2 = %08lx\n", value
);
738 lcdc_writel(sinfo
, ATMEL_LCDC_TIM2
, value
);
740 /* Horizontal value (aka line size) */
741 hozval_linesz
= compute_hozval(sinfo
, info
->var
.xres
);
744 value
= (hozval_linesz
- 1) << ATMEL_LCDC_HOZVAL_OFFSET
;
745 value
|= info
->var
.yres
- 1;
746 dev_dbg(info
->device
, " * LCDFRMCFG = %08lx\n", value
);
747 lcdc_writel(sinfo
, ATMEL_LCDC_LCDFRMCFG
, value
);
749 /* FIFO Threshold: Use formula from data sheet */
750 value
= ATMEL_LCDC_FIFO_SIZE
- (2 * ATMEL_LCDC_DMA_BURST_LEN
+ 3);
751 lcdc_writel(sinfo
, ATMEL_LCDC_FIFO
, value
);
753 /* Toggle LCD_MODE every frame */
754 lcdc_writel(sinfo
, ATMEL_LCDC_MVAL
, 0);
756 /* Disable all interrupts */
757 lcdc_writel(sinfo
, ATMEL_LCDC_IDR
, ~0UL);
758 /* Enable FIFO & DMA errors */
759 lcdc_writel(sinfo
, ATMEL_LCDC_IER
, ATMEL_LCDC_UFLWI
| ATMEL_LCDC_OWRI
| ATMEL_LCDC_MERI
);
761 /* ...wait for DMA engine to become idle... */
762 while (lcdc_readl(sinfo
, ATMEL_LCDC_DMACON
) & ATMEL_LCDC_DMABUSY
)
765 atmel_lcdfb_start(sinfo
);
767 dev_dbg(info
->device
, " * DONE\n");
772 static inline unsigned int chan_to_field(unsigned int chan
, const struct fb_bitfield
*bf
)
775 chan
>>= 16 - bf
->length
;
776 return chan
<< bf
->offset
;
780 * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
781 * @regno: Which register in the CLUT we are programming
782 * @red: The red value which can be up to 16 bits wide
783 * @green: The green value which can be up to 16 bits wide
784 * @blue: The blue value which can be up to 16 bits wide.
785 * @transp: If supported the alpha value which can be up to 16 bits wide.
786 * @info: frame buffer info structure
788 * Set a single color register. The values supplied have a 16 bit
789 * magnitude which needs to be scaled in this function for the hardware.
790 * Things to take into consideration are how many color registers, if
791 * any, are supported with the current color visual. With truecolor mode
792 * no color palettes are supported. Here a pseudo palette is created
793 * which we store the value in pseudo_palette in struct fb_info. For
794 * pseudocolor mode we have a limited color palette. To deal with this
795 * we can program what color is displayed for a particular pixel value.
796 * DirectColor is similar in that we can program each color field. If
797 * we have a static colormap we don't need to implement this function.
799 * Returns negative errno on error, or zero on success. In an
800 * ideal world, this would have been the case, but as it turns
801 * out, the other drivers return 1 on failure, so that's what
804 static int atmel_lcdfb_setcolreg(unsigned int regno
, unsigned int red
,
805 unsigned int green
, unsigned int blue
,
806 unsigned int transp
, struct fb_info
*info
)
808 struct atmel_lcdfb_info
*sinfo
= info
->par
;
809 struct atmel_lcdfb_pdata
*pdata
= &sinfo
->pdata
;
814 if (info
->var
.grayscale
)
815 red
= green
= blue
= (19595 * red
+ 38470 * green
816 + 7471 * blue
) >> 16;
818 switch (info
->fix
.visual
) {
819 case FB_VISUAL_TRUECOLOR
:
821 pal
= info
->pseudo_palette
;
823 val
= chan_to_field(red
, &info
->var
.red
);
824 val
|= chan_to_field(green
, &info
->var
.green
);
825 val
|= chan_to_field(blue
, &info
->var
.blue
);
832 case FB_VISUAL_PSEUDOCOLOR
:
834 if (sinfo
->config
->have_intensity_bit
) {
835 /* old style I+BGR:555 */
836 val
= ((red
>> 11) & 0x001f);
837 val
|= ((green
>> 6) & 0x03e0);
838 val
|= ((blue
>> 1) & 0x7c00);
841 * TODO: intensity bit. Maybe something like
842 * ~(red[10] ^ green[10] ^ blue[10]) & 1
845 /* new style BGR:565 / RGB:565 */
846 if (pdata
->lcd_wiring_mode
== ATMEL_LCDC_WIRING_RGB
) {
847 val
= ((blue
>> 11) & 0x001f);
848 val
|= ((red
>> 0) & 0xf800);
850 val
= ((red
>> 11) & 0x001f);
851 val
|= ((blue
>> 0) & 0xf800);
854 val
|= ((green
>> 5) & 0x07e0);
857 lcdc_writel(sinfo
, ATMEL_LCDC_LUT(regno
), val
);
862 case FB_VISUAL_MONO01
:
864 val
= (regno
== 0) ? 0x00 : 0x1F;
865 lcdc_writel(sinfo
, ATMEL_LCDC_LUT(regno
), val
);
875 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo
*var
,
876 struct fb_info
*info
)
878 dev_dbg(info
->device
, "%s\n", __func__
);
880 atmel_lcdfb_update_dma(info
, var
);
885 static int atmel_lcdfb_blank(int blank_mode
, struct fb_info
*info
)
887 struct atmel_lcdfb_info
*sinfo
= info
->par
;
889 switch (blank_mode
) {
890 case FB_BLANK_UNBLANK
:
891 case FB_BLANK_NORMAL
:
892 atmel_lcdfb_start(sinfo
);
894 case FB_BLANK_VSYNC_SUSPEND
:
895 case FB_BLANK_HSYNC_SUSPEND
:
897 case FB_BLANK_POWERDOWN
:
898 atmel_lcdfb_stop(sinfo
);
904 /* let fbcon do a soft blank for us */
905 return ((blank_mode
== FB_BLANK_NORMAL
) ? 1 : 0);
908 static struct fb_ops atmel_lcdfb_ops
= {
909 .owner
= THIS_MODULE
,
910 .fb_check_var
= atmel_lcdfb_check_var
,
911 .fb_set_par
= atmel_lcdfb_set_par
,
912 .fb_setcolreg
= atmel_lcdfb_setcolreg
,
913 .fb_blank
= atmel_lcdfb_blank
,
914 .fb_pan_display
= atmel_lcdfb_pan_display
,
915 .fb_fillrect
= cfb_fillrect
,
916 .fb_copyarea
= cfb_copyarea
,
917 .fb_imageblit
= cfb_imageblit
,
920 static irqreturn_t
atmel_lcdfb_interrupt(int irq
, void *dev_id
)
922 struct fb_info
*info
= dev_id
;
923 struct atmel_lcdfb_info
*sinfo
= info
->par
;
926 status
= lcdc_readl(sinfo
, ATMEL_LCDC_ISR
);
927 if (status
& ATMEL_LCDC_UFLWI
) {
928 dev_warn(info
->device
, "FIFO underflow %#x\n", status
);
929 /* reset DMA and FIFO to avoid screen shifting */
930 schedule_work(&sinfo
->task
);
932 lcdc_writel(sinfo
, ATMEL_LCDC_ICR
, status
);
937 * LCD controller task (to reset the LCD)
939 static void atmel_lcdfb_task(struct work_struct
*work
)
941 struct atmel_lcdfb_info
*sinfo
=
942 container_of(work
, struct atmel_lcdfb_info
, task
);
944 atmel_lcdfb_reset(sinfo
);
947 static int __init
atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info
*sinfo
)
949 struct fb_info
*info
= sinfo
->info
;
952 info
->var
.activate
|= FB_ACTIVATE_FORCE
| FB_ACTIVATE_NOW
;
954 dev_info(info
->device
,
955 "%luKiB frame buffer at %08lx (mapped at %p)\n",
956 (unsigned long)info
->fix
.smem_len
/ 1024,
957 (unsigned long)info
->fix
.smem_start
,
960 /* Allocate colormap */
961 ret
= fb_alloc_cmap(&info
->cmap
, 256, 0);
963 dev_err(info
->device
, "Alloc color map failed\n");
968 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info
*sinfo
)
970 clk_prepare_enable(sinfo
->bus_clk
);
971 clk_prepare_enable(sinfo
->lcdc_clk
);
974 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info
*sinfo
)
976 clk_disable_unprepare(sinfo
->bus_clk
);
977 clk_disable_unprepare(sinfo
->lcdc_clk
);
981 static const struct of_device_id atmel_lcdfb_dt_ids
[] = {
982 { .compatible
= "atmel,at91sam9261-lcdc" , .data
= &at91sam9261_config
, },
983 { .compatible
= "atmel,at91sam9263-lcdc" , .data
= &at91sam9263_config
, },
984 { .compatible
= "atmel,at91sam9g10-lcdc" , .data
= &at91sam9g10_config
, },
985 { .compatible
= "atmel,at91sam9g45-lcdc" , .data
= &at91sam9g45_config
, },
986 { .compatible
= "atmel,at91sam9g45es-lcdc" , .data
= &at91sam9g45es_config
, },
987 { .compatible
= "atmel,at91sam9rl-lcdc" , .data
= &at91sam9rl_config
, },
988 { .compatible
= "atmel,at32ap-lcdc" , .data
= &at32ap_config
, },
992 MODULE_DEVICE_TABLE(of
, atmel_lcdfb_dt_ids
);
994 static const char *atmel_lcdfb_wiring_modes
[] = {
995 [ATMEL_LCDC_WIRING_BGR
] = "BRG",
996 [ATMEL_LCDC_WIRING_RGB
] = "RGB",
999 static int atmel_lcdfb_get_of_wiring_modes(struct device_node
*np
)
1004 err
= of_property_read_string(np
, "atmel,lcd-wiring-mode", &mode
);
1006 return ATMEL_LCDC_WIRING_BGR
;
1008 for (i
= 0; i
< ARRAY_SIZE(atmel_lcdfb_wiring_modes
); i
++)
1009 if (!strcasecmp(mode
, atmel_lcdfb_wiring_modes
[i
]))
1015 static void atmel_lcdfb_power_control_gpio(struct atmel_lcdfb_pdata
*pdata
, int on
)
1017 struct atmel_lcdfb_power_ctrl_gpio
*og
;
1019 list_for_each_entry(og
, &pdata
->pwr_gpios
, list
)
1020 gpiod_set_value(og
->gpiod
, on
);
1023 static int atmel_lcdfb_of_init(struct atmel_lcdfb_info
*sinfo
)
1025 struct fb_info
*info
= sinfo
->info
;
1026 struct atmel_lcdfb_pdata
*pdata
= &sinfo
->pdata
;
1027 struct fb_var_screeninfo
*var
= &info
->var
;
1028 struct device
*dev
= &sinfo
->pdev
->dev
;
1029 struct device_node
*np
=dev
->of_node
;
1030 struct device_node
*display_np
;
1031 struct device_node
*timings_np
;
1032 struct display_timings
*timings
;
1033 struct atmel_lcdfb_power_ctrl_gpio
*og
;
1034 bool is_gpio_power
= false;
1035 struct gpio_desc
*gpiod
;
1039 sinfo
->config
= (struct atmel_lcdfb_config
*)
1040 of_match_device(atmel_lcdfb_dt_ids
, dev
)->data
;
1042 display_np
= of_parse_phandle(np
, "display", 0);
1044 dev_err(dev
, "failed to find display phandle\n");
1048 ret
= of_property_read_u32(display_np
, "bits-per-pixel", &var
->bits_per_pixel
);
1050 dev_err(dev
, "failed to get property bits-per-pixel\n");
1051 goto put_display_node
;
1054 ret
= of_property_read_u32(display_np
, "atmel,guard-time", &pdata
->guard_time
);
1056 dev_err(dev
, "failed to get property atmel,guard-time\n");
1057 goto put_display_node
;
1060 ret
= of_property_read_u32(display_np
, "atmel,lcdcon2", &pdata
->default_lcdcon2
);
1062 dev_err(dev
, "failed to get property atmel,lcdcon2\n");
1063 goto put_display_node
;
1066 ret
= of_property_read_u32(display_np
, "atmel,dmacon", &pdata
->default_dmacon
);
1068 dev_err(dev
, "failed to get property bits-per-pixel\n");
1069 goto put_display_node
;
1072 INIT_LIST_HEAD(&pdata
->pwr_gpios
);
1074 for (i
= 0; i
< gpiod_count(dev
, "atmel,power-control"); i
++) {
1075 gpiod
= devm_gpiod_get_index(dev
, "atmel,power-control",
1080 og
= devm_kzalloc(dev
, sizeof(*og
), GFP_KERNEL
);
1082 goto put_display_node
;
1085 is_gpio_power
= true;
1087 ret
= gpiod_direction_output(gpiod
, gpiod_is_active_low(gpiod
));
1089 dev_err(dev
, "set direction output gpio atmel,power-control[%d] failed\n", i
);
1090 goto put_display_node
;
1092 list_add(&og
->list
, &pdata
->pwr_gpios
);
1096 pdata
->atmel_lcdfb_power_control
= atmel_lcdfb_power_control_gpio
;
1098 ret
= atmel_lcdfb_get_of_wiring_modes(display_np
);
1100 dev_err(dev
, "invalid atmel,lcd-wiring-mode\n");
1101 goto put_display_node
;
1103 pdata
->lcd_wiring_mode
= ret
;
1105 pdata
->lcdcon_is_backlight
= of_property_read_bool(display_np
, "atmel,lcdcon-backlight");
1106 pdata
->lcdcon_pol_negative
= of_property_read_bool(display_np
, "atmel,lcdcon-backlight-inverted");
1108 timings
= of_get_display_timings(display_np
);
1110 dev_err(dev
, "failed to get display timings\n");
1112 goto put_display_node
;
1115 timings_np
= of_get_child_by_name(display_np
, "display-timings");
1117 dev_err(dev
, "failed to find display-timings node\n");
1119 goto put_display_node
;
1122 for (i
= 0; i
< of_get_child_count(timings_np
); i
++) {
1123 struct videomode vm
;
1124 struct fb_videomode fb_vm
;
1126 ret
= videomode_from_timings(timings
, &vm
, i
);
1128 goto put_timings_node
;
1129 ret
= fb_videomode_from_videomode(&vm
, &fb_vm
);
1131 goto put_timings_node
;
1133 fb_add_videomode(&fb_vm
, &info
->modelist
);
1137 * FIXME: Make sure we are not referencing any fields in display_np
1138 * and timings_np and drop our references to them before returning to
1139 * avoid leaking the nodes on probe deferral and driver unbind.
1145 of_node_put(timings_np
);
1147 of_node_put(display_np
);
1151 static int atmel_lcdfb_of_init(struct atmel_lcdfb_info
*sinfo
)
1157 static int __init
atmel_lcdfb_probe(struct platform_device
*pdev
)
1159 struct device
*dev
= &pdev
->dev
;
1160 struct fb_info
*info
;
1161 struct atmel_lcdfb_info
*sinfo
;
1162 struct atmel_lcdfb_pdata
*pdata
= NULL
;
1163 struct resource
*regs
= NULL
;
1164 struct resource
*map
= NULL
;
1165 struct fb_modelist
*modelist
;
1168 dev_dbg(dev
, "%s BEGIN\n", __func__
);
1171 info
= framebuffer_alloc(sizeof(struct atmel_lcdfb_info
), dev
);
1173 dev_err(dev
, "cannot allocate memory\n");
1181 INIT_LIST_HEAD(&info
->modelist
);
1183 if (pdev
->dev
.of_node
) {
1184 ret
= atmel_lcdfb_of_init(sinfo
);
1187 } else if (dev_get_platdata(dev
)) {
1188 struct fb_monspecs
*monspecs
;
1191 pdata
= dev_get_platdata(dev
);
1192 monspecs
= pdata
->default_monspecs
;
1193 sinfo
->pdata
= *pdata
;
1195 for (i
= 0; i
< monspecs
->modedb_len
; i
++)
1196 fb_add_videomode(&monspecs
->modedb
[i
], &info
->modelist
);
1198 sinfo
->config
= atmel_lcdfb_get_config(pdev
);
1200 info
->var
.bits_per_pixel
= pdata
->default_bpp
? pdata
->default_bpp
: 16;
1201 memcpy(&info
->monspecs
, pdata
->default_monspecs
, sizeof(info
->monspecs
));
1203 dev_err(dev
, "cannot get default configuration\n");
1210 sinfo
->reg_lcd
= devm_regulator_get(&pdev
->dev
, "lcd");
1211 if (IS_ERR(sinfo
->reg_lcd
))
1212 sinfo
->reg_lcd
= NULL
;
1214 info
->flags
= ATMEL_LCDFB_FBINFO_DEFAULT
;
1215 info
->pseudo_palette
= sinfo
->pseudo_palette
;
1216 info
->fbops
= &atmel_lcdfb_ops
;
1218 info
->fix
= atmel_lcdfb_fix
;
1219 strcpy(info
->fix
.id
, sinfo
->pdev
->name
);
1221 /* Enable LCDC Clocks */
1222 sinfo
->bus_clk
= clk_get(dev
, "hclk");
1223 if (IS_ERR(sinfo
->bus_clk
)) {
1224 ret
= PTR_ERR(sinfo
->bus_clk
);
1227 sinfo
->lcdc_clk
= clk_get(dev
, "lcdc_clk");
1228 if (IS_ERR(sinfo
->lcdc_clk
)) {
1229 ret
= PTR_ERR(sinfo
->lcdc_clk
);
1232 atmel_lcdfb_start_clock(sinfo
);
1234 modelist
= list_first_entry(&info
->modelist
,
1235 struct fb_modelist
, list
);
1236 fb_videomode_to_var(&info
->var
, &modelist
->mode
);
1238 atmel_lcdfb_check_var(&info
->var
, info
);
1240 regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1242 dev_err(dev
, "resources unusable\n");
1247 sinfo
->irq_base
= platform_get_irq(pdev
, 0);
1248 if (sinfo
->irq_base
< 0) {
1249 dev_err(dev
, "unable to get irq\n");
1250 ret
= sinfo
->irq_base
;
1254 /* Initialize video memory */
1255 map
= platform_get_resource(pdev
, IORESOURCE_MEM
, 1);
1257 /* use a pre-allocated memory buffer */
1258 info
->fix
.smem_start
= map
->start
;
1259 info
->fix
.smem_len
= resource_size(map
);
1260 if (!request_mem_region(info
->fix
.smem_start
,
1261 info
->fix
.smem_len
, pdev
->name
)) {
1266 info
->screen_base
= ioremap_wc(info
->fix
.smem_start
,
1267 info
->fix
.smem_len
);
1268 if (!info
->screen_base
) {
1270 goto release_intmem
;
1274 * Don't clear the framebuffer -- someone may have set
1275 * up a splash image.
1278 /* allocate memory buffer */
1279 ret
= atmel_lcdfb_alloc_video_memory(sinfo
);
1281 dev_err(dev
, "cannot allocate framebuffer: %d\n", ret
);
1286 /* LCDC registers */
1287 info
->fix
.mmio_start
= regs
->start
;
1288 info
->fix
.mmio_len
= resource_size(regs
);
1290 if (!request_mem_region(info
->fix
.mmio_start
,
1291 info
->fix
.mmio_len
, pdev
->name
)) {
1296 sinfo
->mmio
= ioremap(info
->fix
.mmio_start
, info
->fix
.mmio_len
);
1298 dev_err(dev
, "cannot map LCDC registers\n");
1303 /* Initialize PWM for contrast or backlight ("off") */
1304 init_contrast(sinfo
);
1307 ret
= request_irq(sinfo
->irq_base
, atmel_lcdfb_interrupt
, 0, pdev
->name
, info
);
1309 dev_err(dev
, "request_irq failed: %d\n", ret
);
1313 /* Some operations on the LCDC might sleep and
1314 * require a preemptible task context */
1315 INIT_WORK(&sinfo
->task
, atmel_lcdfb_task
);
1317 ret
= atmel_lcdfb_init_fbinfo(sinfo
);
1319 dev_err(dev
, "init fbinfo failed: %d\n", ret
);
1320 goto unregister_irqs
;
1323 ret
= atmel_lcdfb_set_par(info
);
1325 dev_err(dev
, "set par failed: %d\n", ret
);
1326 goto unregister_irqs
;
1329 dev_set_drvdata(dev
, info
);
1332 * Tell the world that we're ready to go
1334 ret
= register_framebuffer(info
);
1336 dev_err(dev
, "failed to register framebuffer device: %d\n", ret
);
1340 /* Power up the LCDC screen */
1341 atmel_lcdfb_power_control(sinfo
, 1);
1343 dev_info(dev
, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
1344 info
->node
, info
->fix
.mmio_start
, sinfo
->mmio
, sinfo
->irq_base
);
1349 dev_set_drvdata(dev
, NULL
);
1350 fb_dealloc_cmap(&info
->cmap
);
1352 cancel_work_sync(&sinfo
->task
);
1353 free_irq(sinfo
->irq_base
, info
);
1355 exit_backlight(sinfo
);
1356 iounmap(sinfo
->mmio
);
1358 release_mem_region(info
->fix
.mmio_start
, info
->fix
.mmio_len
);
1361 iounmap(info
->screen_base
);
1363 atmel_lcdfb_free_video_memory(sinfo
);
1367 release_mem_region(info
->fix
.smem_start
, info
->fix
.smem_len
);
1369 atmel_lcdfb_stop_clock(sinfo
);
1370 clk_put(sinfo
->lcdc_clk
);
1372 clk_put(sinfo
->bus_clk
);
1374 framebuffer_release(info
);
1376 dev_dbg(dev
, "%s FAILED\n", __func__
);
1380 static int __exit
atmel_lcdfb_remove(struct platform_device
*pdev
)
1382 struct device
*dev
= &pdev
->dev
;
1383 struct fb_info
*info
= dev_get_drvdata(dev
);
1384 struct atmel_lcdfb_info
*sinfo
;
1385 struct atmel_lcdfb_pdata
*pdata
;
1387 if (!info
|| !info
->par
)
1390 pdata
= &sinfo
->pdata
;
1392 cancel_work_sync(&sinfo
->task
);
1393 exit_backlight(sinfo
);
1394 atmel_lcdfb_power_control(sinfo
, 0);
1395 unregister_framebuffer(info
);
1396 atmel_lcdfb_stop_clock(sinfo
);
1397 clk_put(sinfo
->lcdc_clk
);
1398 clk_put(sinfo
->bus_clk
);
1399 fb_dealloc_cmap(&info
->cmap
);
1400 free_irq(sinfo
->irq_base
, info
);
1401 iounmap(sinfo
->mmio
);
1402 release_mem_region(info
->fix
.mmio_start
, info
->fix
.mmio_len
);
1403 if (platform_get_resource(pdev
, IORESOURCE_MEM
, 1)) {
1404 iounmap(info
->screen_base
);
1405 release_mem_region(info
->fix
.smem_start
, info
->fix
.smem_len
);
1407 atmel_lcdfb_free_video_memory(sinfo
);
1410 framebuffer_release(info
);
1417 static int atmel_lcdfb_suspend(struct platform_device
*pdev
, pm_message_t mesg
)
1419 struct fb_info
*info
= platform_get_drvdata(pdev
);
1420 struct atmel_lcdfb_info
*sinfo
= info
->par
;
1423 * We don't want to handle interrupts while the clock is
1424 * stopped. It may take forever.
1426 lcdc_writel(sinfo
, ATMEL_LCDC_IDR
, ~0UL);
1428 sinfo
->saved_lcdcon
= lcdc_readl(sinfo
, ATMEL_LCDC_CONTRAST_CTR
);
1429 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
, 0);
1430 atmel_lcdfb_power_control(sinfo
, 0);
1431 atmel_lcdfb_stop(sinfo
);
1432 atmel_lcdfb_stop_clock(sinfo
);
1437 static int atmel_lcdfb_resume(struct platform_device
*pdev
)
1439 struct fb_info
*info
= platform_get_drvdata(pdev
);
1440 struct atmel_lcdfb_info
*sinfo
= info
->par
;
1442 atmel_lcdfb_start_clock(sinfo
);
1443 atmel_lcdfb_start(sinfo
);
1444 atmel_lcdfb_power_control(sinfo
, 1);
1445 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
, sinfo
->saved_lcdcon
);
1447 /* Enable FIFO & DMA errors */
1448 lcdc_writel(sinfo
, ATMEL_LCDC_IER
, ATMEL_LCDC_UFLWI
1449 | ATMEL_LCDC_OWRI
| ATMEL_LCDC_MERI
);
1455 #define atmel_lcdfb_suspend NULL
1456 #define atmel_lcdfb_resume NULL
1459 static struct platform_driver atmel_lcdfb_driver
= {
1460 .remove
= __exit_p(atmel_lcdfb_remove
),
1461 .suspend
= atmel_lcdfb_suspend
,
1462 .resume
= atmel_lcdfb_resume
,
1463 .id_table
= atmel_lcdfb_devtypes
,
1465 .name
= "atmel_lcdfb",
1466 .of_match_table
= of_match_ptr(atmel_lcdfb_dt_ids
),
1470 module_platform_driver_probe(atmel_lcdfb_driver
, atmel_lcdfb_probe
);
1472 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1473 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1474 MODULE_LICENSE("GPL");