drivers/video/fbdev/sis/sis.h

   1 /*
   2  * SiS 300/540/630[S]/730[S],
   3  * SiS 315[E|PRO]/550/[M]65x/[M]661[F|M]X/740/[M]741[GX]/330/[M]76x[GX],
   4  * XGI V3XT/V5/V8, Z7
   5  * frame buffer driver for Linux kernels >=2.4.14 and >=2.6.3
   6  *
   7  * Copyright (C) 2001-2005 Thomas Winischhofer, Vienna, Austria.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the named License,
  12  * or any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
  22  */
  23
  24 #ifndef _SIS_H_
  25 #define _SIS_H_
  26
  27 #include <video/sisfb.h>
  28
  29 #include "vgatypes.h"
  30 #include "vstruct.h"
  31 #include "init.h"
  32
  33 #define VER_MAJOR               1
  34 #define VER_MINOR               8
  35 #define VER_LEVEL               9
  36
  37 #include <linux/spinlock.h>
  38
  39 #ifdef CONFIG_COMPAT
  40 #define SIS_NEW_CONFIG_COMPAT
  41 #endif  /* CONFIG_COMPAT */
  42
  43 #undef SISFBDEBUG
  44
  45 #ifdef SISFBDEBUG
  46 #define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __func__ , ## args)
  47 #define TWDEBUG(x) printk(KERN_INFO x "\n");
  48 #else
  49 #define DPRINTK(fmt, args...)
  50 #define TWDEBUG(x)
  51 #endif
  52
  53 #define SISFAIL(x) do { printk(x "\n"); return -EINVAL; } while(0)
  54
  55 /* To be included in pci_ids.h */
  56 #ifndef PCI_DEVICE_ID_SI_650_VGA
  57 #define PCI_DEVICE_ID_SI_650_VGA        0x6325
  58 #endif
  59 #ifndef PCI_DEVICE_ID_SI_650
  60 #define PCI_DEVICE_ID_SI_650            0x0650
  61 #endif
  62 #ifndef PCI_DEVICE_ID_SI_651
  63 #define PCI_DEVICE_ID_SI_651            0x0651
  64 #endif
  65 #ifndef PCI_DEVICE_ID_SI_740
  66 #define PCI_DEVICE_ID_SI_740            0x0740
  67 #endif
  68 #ifndef PCI_DEVICE_ID_SI_330
  69 #define PCI_DEVICE_ID_SI_330            0x0330
  70 #endif
  71 #ifndef PCI_DEVICE_ID_SI_660_VGA
  72 #define PCI_DEVICE_ID_SI_660_VGA        0x6330
  73 #endif
  74 #ifndef PCI_DEVICE_ID_SI_661
  75 #define PCI_DEVICE_ID_SI_661            0x0661
  76 #endif
  77 #ifndef PCI_DEVICE_ID_SI_741
  78 #define PCI_DEVICE_ID_SI_741            0x0741
  79 #endif
  80 #ifndef PCI_DEVICE_ID_SI_660
  81 #define PCI_DEVICE_ID_SI_660            0x0660
  82 #endif
  83 #ifndef PCI_DEVICE_ID_SI_760
  84 #define PCI_DEVICE_ID_SI_760            0x0760
  85 #endif
  86 #ifndef PCI_DEVICE_ID_SI_761
  87 #define PCI_DEVICE_ID_SI_761            0x0761
  88 #endif
  89
  90 #ifndef PCI_VENDOR_ID_XGI
  91 #define PCI_VENDOR_ID_XGI               0x18ca
  92 #endif
  93
  94 #ifndef PCI_DEVICE_ID_XGI_20
  95 #define PCI_DEVICE_ID_XGI_20            0x0020
  96 #endif
  97
  98 #ifndef PCI_DEVICE_ID_XGI_40
  99 #define PCI_DEVICE_ID_XGI_40            0x0040
 100 #endif
 101
 102 /* To be included in fb.h */
 103 #ifndef FB_ACCEL_SIS_GLAMOUR_2
 104 #define FB_ACCEL_SIS_GLAMOUR_2  40      /* SiS 315, 65x, 740, 661, 741  */
 105 #endif
 106 #ifndef FB_ACCEL_SIS_XABRE
 107 #define FB_ACCEL_SIS_XABRE      41      /* SiS 330 ("Xabre"), 76x       */
 108 #endif
 109 #ifndef FB_ACCEL_XGI_VOLARI_V
 110 #define FB_ACCEL_XGI_VOLARI_V   47      /* XGI Volari Vx (V3XT, V5, V8) */
 111 #endif
 112 #ifndef FB_ACCEL_XGI_VOLARI_Z
 113 #define FB_ACCEL_XGI_VOLARI_Z   48      /* XGI Volari Z7                */
 114 #endif
 115
 116 /* ivideo->caps */
 117 #define HW_CURSOR_CAP           0x80
 118 #define TURBO_QUEUE_CAP         0x40
 119 #define AGP_CMD_QUEUE_CAP       0x20
 120 #define VM_CMD_QUEUE_CAP        0x10
 121 #define MMIO_CMD_QUEUE_CAP      0x08
 122
 123 /* For 300 series */
 124 #define TURBO_QUEUE_AREA_SIZE   (512 * 1024)    /* 512K */
 125 #define HW_CURSOR_AREA_SIZE_300 4096            /* 4K */
 126
 127 /* For 315/Xabre series */
 128 #define COMMAND_QUEUE_AREA_SIZE (512 * 1024)    /* 512K */
 129 #define COMMAND_QUEUE_AREA_SIZE_Z7 (128 * 1024) /* 128k for XGI Z7 */
 130 #define HW_CURSOR_AREA_SIZE_315 16384           /* 16K */
 131 #define COMMAND_QUEUE_THRESHOLD 0x1F
 132
 133 #define SIS_OH_ALLOC_SIZE       4000
 134 #define SENTINEL                0x7fffffff
 135
 136 #define SEQ_ADR                 0x14
 137 #define SEQ_DATA                0x15
 138 #define DAC_ADR                 0x18
 139 #define DAC_DATA                0x19
 140 #define CRTC_ADR                0x24
 141 #define CRTC_DATA               0x25
 142 #define DAC2_ADR                (0x16-0x30)
 143 #define DAC2_DATA               (0x17-0x30)
 144 #define VB_PART1_ADR            (0x04-0x30)
 145 #define VB_PART1_DATA           (0x05-0x30)
 146 #define VB_PART2_ADR            (0x10-0x30)
 147 #define VB_PART2_DATA           (0x11-0x30)
 148 #define VB_PART3_ADR            (0x12-0x30)
 149 #define VB_PART3_DATA           (0x13-0x30)
 150 #define VB_PART4_ADR            (0x14-0x30)
 151 #define VB_PART4_DATA           (0x15-0x30)
 152
 153 #define SISSR                   ivideo->SiS_Pr.SiS_P3c4
 154 #define SISCR                   ivideo->SiS_Pr.SiS_P3d4
 155 #define SISDACA                 ivideo->SiS_Pr.SiS_P3c8
 156 #define SISDACD                 ivideo->SiS_Pr.SiS_P3c9
 157 #define SISPART1                ivideo->SiS_Pr.SiS_Part1Port
 158 #define SISPART2                ivideo->SiS_Pr.SiS_Part2Port
 159 #define SISPART3                ivideo->SiS_Pr.SiS_Part3Port
 160 #define SISPART4                ivideo->SiS_Pr.SiS_Part4Port
 161 #define SISPART5                ivideo->SiS_Pr.SiS_Part5Port
 162 #define SISDAC2A                SISPART5
 163 #define SISDAC2D                (SISPART5 + 1)
 164 #define SISMISCR                (ivideo->SiS_Pr.RelIO + 0x1c)
 165 #define SISMISCW                ivideo->SiS_Pr.SiS_P3c2
 166 #define SISINPSTAT              (ivideo->SiS_Pr.RelIO + 0x2a)
 167 #define SISPEL                  ivideo->SiS_Pr.SiS_P3c6
 168 #define SISVGAENABLE            (ivideo->SiS_Pr.RelIO + 0x13)
 169 #define SISVID                  (ivideo->SiS_Pr.RelIO + 0x02 - 0x30)
 170 #define SISCAP                  (ivideo->SiS_Pr.RelIO + 0x00 - 0x30)
 171
 172 #define IND_SIS_PASSWORD                0x05  /* SRs */
 173 #define IND_SIS_COLOR_MODE              0x06
 174 #define IND_SIS_RAMDAC_CONTROL          0x07
 175 #define IND_SIS_DRAM_SIZE               0x14
 176 #define IND_SIS_MODULE_ENABLE           0x1E
 177 #define IND_SIS_PCI_ADDRESS_SET         0x20
 178 #define IND_SIS_TURBOQUEUE_ADR          0x26
 179 #define IND_SIS_TURBOQUEUE_SET          0x27
 180 #define IND_SIS_POWER_ON_TRAP           0x38
 181 #define IND_SIS_POWER_ON_TRAP2          0x39
 182 #define IND_SIS_CMDQUEUE_SET            0x26
 183 #define IND_SIS_CMDQUEUE_THRESHOLD      0x27
 184
 185 #define IND_SIS_AGP_IO_PAD      0x48
 186
 187 #define SIS_CRT2_WENABLE_300    0x24  /* Part1 */
 188 #define SIS_CRT2_WENABLE_315    0x2F
 189
 190 #define SIS_PASSWORD            0x86  /* SR05 */
 191
 192 #define SIS_INTERLACED_MODE     0x20  /* SR06 */
 193 #define SIS_8BPP_COLOR_MODE     0x0
 194 #define SIS_15BPP_COLOR_MODE    0x1
 195 #define SIS_16BPP_COLOR_MODE    0x2
 196 #define SIS_32BPP_COLOR_MODE    0x4
 197
 198 #define SIS_ENABLE_2D           0x40  /* SR1E */
 199
 200 #define SIS_MEM_MAP_IO_ENABLE   0x01  /* SR20 */
 201 #define SIS_PCI_ADDR_ENABLE     0x80
 202
 203 #define SIS_AGP_CMDQUEUE_ENABLE         0x80  /* 315/330/340 series SR26 */
 204 #define SIS_VRAM_CMDQUEUE_ENABLE        0x40
 205 #define SIS_MMIO_CMD_ENABLE             0x20
 206 #define SIS_CMD_QUEUE_SIZE_512k         0x00
 207 #define SIS_CMD_QUEUE_SIZE_1M           0x04
 208 #define SIS_CMD_QUEUE_SIZE_2M           0x08
 209 #define SIS_CMD_QUEUE_SIZE_4M           0x0C
 210 #define SIS_CMD_QUEUE_RESET             0x01
 211 #define SIS_CMD_AUTO_CORR               0x02
 212
 213 #define SIS_CMD_QUEUE_SIZE_Z7_64k       0x00 /* XGI Z7 */
 214 #define SIS_CMD_QUEUE_SIZE_Z7_128k      0x04
 215
 216 #define SIS_SIMULTANEOUS_VIEW_ENABLE    0x01  /* CR30 */
 217 #define SIS_MODE_SELECT_CRT2            0x02
 218 #define SIS_VB_OUTPUT_COMPOSITE         0x04
 219 #define SIS_VB_OUTPUT_SVIDEO            0x08
 220 #define SIS_VB_OUTPUT_SCART             0x10
 221 #define SIS_VB_OUTPUT_LCD               0x20
 222 #define SIS_VB_OUTPUT_CRT2              0x40
 223 #define SIS_VB_OUTPUT_HIVISION          0x80
 224
 225 #define SIS_VB_OUTPUT_DISABLE   0x20  /* CR31 */
 226 #define SIS_DRIVER_MODE         0x40
 227
 228 #define SIS_VB_COMPOSITE        0x01  /* CR32 */
 229 #define SIS_VB_SVIDEO           0x02
 230 #define SIS_VB_SCART            0x04
 231 #define SIS_VB_LCD              0x08
 232 #define SIS_VB_CRT2             0x10
 233 #define SIS_CRT1                0x20
 234 #define SIS_VB_HIVISION         0x40
 235 #define SIS_VB_YPBPR            0x80
 236 #define SIS_VB_TV               (SIS_VB_COMPOSITE | SIS_VB_SVIDEO | \
 237                                 SIS_VB_SCART | SIS_VB_HIVISION | SIS_VB_YPBPR)
 238
 239 #define SIS_EXTERNAL_CHIP_MASK                  0x0E  /* CR37 (< SiS 660) */
 240 #define SIS_EXTERNAL_CHIP_SIS301                0x01  /* in CR37 << 1 ! */
 241 #define SIS_EXTERNAL_CHIP_LVDS                  0x02
 242 #define SIS_EXTERNAL_CHIP_TRUMPION              0x03
 243 #define SIS_EXTERNAL_CHIP_LVDS_CHRONTEL         0x04
 244 #define SIS_EXTERNAL_CHIP_CHRONTEL              0x05
 245 #define SIS310_EXTERNAL_CHIP_LVDS               0x02
 246 #define SIS310_EXTERNAL_CHIP_LVDS_CHRONTEL      0x03
 247
 248 #define SIS_AGP_2X              0x20  /* CR48 */
 249
 250 /* vbflags, private entries (others in sisfb.h) */
 251 #define VB_CONEXANT             0x00000800      /* 661 series only */
 252 #define VB_TRUMPION             VB_CONEXANT     /* 300 series only */
 253 #define VB_302ELV               0x00004000
 254 #define VB_301                  0x00100000      /* Video bridge type */
 255 #define VB_301B                 0x00200000
 256 #define VB_302B                 0x00400000
 257 #define VB_30xBDH               0x00800000      /* 30xB DH version (w/o LCD support) */
 258 #define VB_LVDS                 0x01000000
 259 #define VB_CHRONTEL             0x02000000
 260 #define VB_301LV                0x04000000
 261 #define VB_302LV                0x08000000
 262 #define VB_301C                 0x10000000
 263
 264 #define VB_SISBRIDGE            (VB_301|VB_301B|VB_301C|VB_302B|VB_301LV|VB_302LV|VB_302ELV)
 265 #define VB_VIDEOBRIDGE          (VB_SISBRIDGE | VB_LVDS | VB_CHRONTEL | VB_CONEXANT)
 266
 267 /* vbflags2 (static stuff only!) */
 268 #define VB2_SISUMC              0x00000001
 269 #define VB2_301                 0x00000002      /* Video bridge type */
 270 #define VB2_301B                0x00000004
 271 #define VB2_301C                0x00000008
 272 #define VB2_307T                0x00000010
 273 #define VB2_302B                0x00000800
 274 #define VB2_301LV               0x00001000
 275 #define VB2_302LV               0x00002000
 276 #define VB2_302ELV              0x00004000
 277 #define VB2_307LV               0x00008000
 278 #define VB2_30xBDH              0x08000000      /* 30xB DH version (w/o LCD support) */
 279 #define VB2_CONEXANT            0x10000000
 280 #define VB2_TRUMPION            0x20000000
 281 #define VB2_LVDS                0x40000000
 282 #define VB2_CHRONTEL            0x80000000
 283
 284 #define VB2_SISLVDSBRIDGE       (VB2_301LV | VB2_302LV | VB2_302ELV | VB2_307LV)
 285 #define VB2_SISTMDSBRIDGE       (VB2_301   | VB2_301B  | VB2_301C   | VB2_302B | VB2_307T)
 286 #define VB2_SISBRIDGE           (VB2_SISLVDSBRIDGE | VB2_SISTMDSBRIDGE)
 287
 288 #define VB2_SISTMDSLCDABRIDGE   (VB2_301C | VB2_307T)
 289 #define VB2_SISLCDABRIDGE       (VB2_SISTMDSLCDABRIDGE | VB2_301LV | VB2_302LV | VB2_302ELV | VB2_307LV)
 290
 291 #define VB2_SISHIVISIONBRIDGE   (VB2_301  | VB2_301B | VB2_302B)
 292 #define VB2_SISYPBPRBRIDGE      (VB2_301C | VB2_307T | VB2_SISLVDSBRIDGE)
 293 #define VB2_SISYPBPRARBRIDGE    (VB2_301C | VB2_307T | VB2_307LV)
 294 #define VB2_SISTAP4SCALER       (VB2_301C | VB2_307T | VB2_302ELV | VB2_307LV)
 295 #define VB2_SISTVBRIDGE         (VB2_SISHIVISIONBRIDGE | VB2_SISYPBPRBRIDGE)
 296
 297 #define VB2_SISVGA2BRIDGE       (VB2_301 | VB2_301B | VB2_301C | VB2_302B | VB2_307T)
 298
 299 #define VB2_VIDEOBRIDGE         (VB2_SISBRIDGE | VB2_LVDS | VB2_CHRONTEL | VB2_CONEXANT)
 300
 301 #define VB2_30xB                (VB2_301B  | VB2_301C   | VB2_302B  | VB2_307T)
 302 #define VB2_30xBLV              (VB2_30xB  | VB2_SISLVDSBRIDGE)
 303 #define VB2_30xC                (VB2_301C  | VB2_307T)
 304 #define VB2_30xCLV              (VB2_301C  | VB2_307T   | VB2_302ELV| VB2_307LV)
 305 #define VB2_SISEMIBRIDGE        (VB2_302LV | VB2_302ELV | VB2_307LV)
 306 #define VB2_LCD162MHZBRIDGE     (VB2_301C  | VB2_307T)
 307 #define VB2_LCDOVER1280BRIDGE   (VB2_301C  | VB2_307T   | VB2_302LV | VB2_302ELV | VB2_307LV)
 308 #define VB2_LCDOVER1600BRIDGE   (VB2_307T  | VB2_307LV)
 309 #define VB2_RAMDAC202MHZBRIDGE  (VB2_301C  | VB2_307T)
 310
 311 /* I/O port access functions */
 312
 313 void SiS_SetReg(SISIOADDRESS, u8, u8);
 314 void SiS_SetRegByte(SISIOADDRESS, u8);
 315 void SiS_SetRegShort(SISIOADDRESS, u16);
 316 void SiS_SetRegLong(SISIOADDRESS, u32);
 317 void SiS_SetRegANDOR(SISIOADDRESS, u8, u8, u8);
 318 void SiS_SetRegAND(SISIOADDRESS, u8, u8);
 319 void SiS_SetRegOR(SISIOADDRESS, u8, u8);
 320 u8 SiS_GetReg(SISIOADDRESS, u8);
 321 u8 SiS_GetRegByte(SISIOADDRESS);
 322 u16 SiS_GetRegShort(SISIOADDRESS);
 323 u32 SiS_GetRegLong(SISIOADDRESS);
 324
 325 /* Chrontel TV, DDC and DPMS functions */
 326 /* from init.c */
 327 bool            SiSInitPtr(struct SiS_Private *SiS_Pr);
 328 unsigned short  SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay,
 329                                 int VDisplay, int Depth, bool FSTN,
 330                                 unsigned short CustomT, int LCDwith, int LCDheight,
 331                                 unsigned int VBFlags2);
 332 unsigned short  SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay,
 333                                 int VDisplay, int Depth, unsigned int VBFlags2);
 334 unsigned short  SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay,
 335                                 int VDisplay, int Depth, unsigned int VBFlags2);
 336
 337 void            SiS_DisplayOn(struct SiS_Private *SiS_Pr);
 338 void            SiS_DisplayOff(struct SiS_Private *SiS_Pr);
 339 void            SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr);
 340 void            SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable);
 341 void            SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable);
 342 unsigned short  SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
 343                                 unsigned short ModeIdIndex);
 344 bool            SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr);
 345
 346 bool            SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo,
 347                                 unsigned short *ModeIdIndex);
 348 unsigned short  SiS_GetModePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
 349                                 unsigned short ModeIdIndex);
 350 unsigned short  SiS_GetRefCRTVCLK(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide);
 351 unsigned short  SiS_GetRefCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide);
 352 unsigned short  SiS_GetColorDepth(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
 353                                 unsigned short ModeIdIndex);
 354 unsigned short  SiS_GetOffset(struct SiS_Private *SiS_Pr,unsigned short ModeNo,
 355                                 unsigned short ModeIdIndex, unsigned short RRTI);
 356 #ifdef CONFIG_FB_SIS_300
 357 void            SiS_GetFIFOThresholdIndex300(struct SiS_Private *SiS_Pr, unsigned short *idx1,
 358                                 unsigned short *idx2);
 359 unsigned short  SiS_GetFIFOThresholdB300(unsigned short idx1, unsigned short idx2);
 360 unsigned short  SiS_GetLatencyFactor630(struct SiS_Private *SiS_Pr, unsigned short index);
 361 #endif
 362 void            SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex);
 363 bool            SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo);
 364 void            SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth);
 365 void            SiS_CalcLCDACRT1Timing(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
 366                                 unsigned short ModeIdIndex);
 367 void            SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, int xres,
 368                                 int yres, struct fb_var_screeninfo *var, bool writeres);
 369
 370 /* From init301.c: */
 371 extern void             SiS_GetVBInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
 372                                 unsigned short ModeIdIndex, int chkcrt2mode);
 373 extern void             SiS_GetLCDResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
 374                                 unsigned short ModeIdIndex);
 375 extern void             SiS_SetYPbPr(struct SiS_Private *SiS_Pr);
 376 extern void             SiS_SetTVMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
 377                                 unsigned short ModeIdIndex);
 378 extern void             SiS_UnLockCRT2(struct SiS_Private *SiS_Pr);
 379 extern void             SiS_DisableBridge(struct SiS_Private *);
 380 extern bool             SiS_SetCRT2Group(struct SiS_Private *, unsigned short);
 381 extern unsigned short   SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
 382                                 unsigned short ModeIdIndex);
 383 extern void             SiS_WaitRetrace1(struct SiS_Private *SiS_Pr);
 384 extern unsigned short   SiS_GetResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
 385                                 unsigned short ModeIdIndex);
 386 extern unsigned short   SiS_GetCH700x(struct SiS_Private *SiS_Pr, unsigned short tempax);
 387 extern unsigned short   SiS_GetVCLK2Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
 388                                 unsigned short ModeIdIndex, unsigned short RRTI);
 389 extern bool             SiS_IsVAMode(struct SiS_Private *);
 390 extern bool             SiS_IsDualEdge(struct SiS_Private *);
 391
 392 #ifdef CONFIG_FB_SIS_300
 393 extern unsigned int     sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg);
 394 extern void             sisfb_write_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg,
 395                                 unsigned int val);
 396 #endif
 397 #ifdef CONFIG_FB_SIS_315
 398 extern void             sisfb_write_nbridge_pci_byte(struct SiS_Private *SiS_Pr, int reg,
 399                                 unsigned char val);
 400 extern unsigned int     sisfb_read_mio_pci_word(struct SiS_Private *SiS_Pr, int reg);
 401 #endif
 402
 403
 404 /* MMIO access macros */
 405 #define MMIO_IN8(base, offset)  readb((base+offset))
 406 #define MMIO_IN16(base, offset) readw((base+offset))
 407 #define MMIO_IN32(base, offset) readl((base+offset))
 408
 409 #define MMIO_OUT8(base, offset, val)  writeb(((u8)(val)), (base+offset))
 410 #define MMIO_OUT16(base, offset, val) writew(((u16)(val)), (base+offset))
 411 #define MMIO_OUT32(base, offset, val) writel(((u32)(val)), (base+offset))
 412
 413 /* Queue control MMIO registers */
 414 #define Q_BASE_ADDR             0x85C0  /* Base address of software queue */
 415 #define Q_WRITE_PTR             0x85C4  /* Current write pointer */
 416 #define Q_READ_PTR              0x85C8  /* Current read pointer */
 417 #define Q_STATUS                0x85CC  /* queue status */
 418
 419 #define MMIO_QUEUE_PHYBASE      Q_BASE_ADDR
 420 #define MMIO_QUEUE_WRITEPORT    Q_WRITE_PTR
 421 #define MMIO_QUEUE_READPORT     Q_READ_PTR
 422
 423 #ifndef FB_BLANK_UNBLANK
 424 #define FB_BLANK_UNBLANK        0
 425 #endif
 426 #ifndef FB_BLANK_NORMAL
 427 #define FB_BLANK_NORMAL         1
 428 #endif
 429 #ifndef FB_BLANK_VSYNC_SUSPEND
 430 #define FB_BLANK_VSYNC_SUSPEND  2
 431 #endif
 432 #ifndef FB_BLANK_HSYNC_SUSPEND
 433 #define FB_BLANK_HSYNC_SUSPEND  3
 434 #endif
 435 #ifndef FB_BLANK_POWERDOWN
 436 #define FB_BLANK_POWERDOWN      4
 437 #endif
 438
 439 enum _SIS_LCD_TYPE {
 440     LCD_INVALID = 0,
 441     LCD_800x600,
 442     LCD_1024x768,
 443     LCD_1280x1024,
 444     LCD_1280x960,
 445     LCD_640x480,
 446     LCD_1600x1200,
 447     LCD_1920x1440,
 448     LCD_2048x1536,
 449     LCD_320x240,        /* FSTN */
 450     LCD_1400x1050,
 451     LCD_1152x864,
 452     LCD_1152x768,
 453     LCD_1280x768,
 454     LCD_1024x600,
 455     LCD_320x240_2,      /* DSTN */
 456     LCD_320x240_3,      /* DSTN */
 457     LCD_848x480,
 458     LCD_1280x800,
 459     LCD_1680x1050,
 460     LCD_1280x720,
 461     LCD_1280x854,
 462     LCD_CUSTOM,
 463     LCD_UNKNOWN
 464 };
 465
 466 enum _SIS_CMDTYPE {
 467     MMIO_CMD = 0,
 468     AGP_CMD_QUEUE,
 469     VM_CMD_QUEUE,
 470 };
 471
 472 struct SIS_OH {
 473         struct SIS_OH *poh_next;
 474         struct SIS_OH *poh_prev;
 475         u32            offset;
 476         u32            size;
 477 };
 478
 479 struct SIS_OHALLOC {
 480         struct SIS_OHALLOC *poha_next;
 481         struct SIS_OH aoh[1];
 482 };
 483
 484 struct SIS_HEAP {
 485         struct SIS_OH   oh_free;
 486         struct SIS_OH   oh_used;
 487         struct SIS_OH   *poh_freelist;
 488         struct SIS_OHALLOC *poha_chain;
 489         u32             max_freesize;
 490         struct sis_video_info *vinfo;
 491 };
 492
 493 /* Our "par" */
 494 struct sis_video_info {
 495         int             cardnumber;
 496         struct fb_info  *memyselfandi;
 497
 498         struct SiS_Private SiS_Pr;
 499
 500         struct sisfb_info sisfbinfo;    /* For ioctl SISFB_GET_INFO */
 501
 502         struct fb_var_screeninfo default_var;
 503
 504         struct fb_fix_screeninfo sisfb_fix;
 505         u32             pseudo_palette[16];
 506
 507         struct sisfb_monitor {
 508                 u16 hmin;
 509                 u16 hmax;
 510                 u16 vmin;
 511                 u16 vmax;
 512                 u32 dclockmax;
 513                 u8  feature;
 514                 bool datavalid;
 515         }               sisfb_thismonitor;
 516
 517         unsigned short  chip_id;        /* PCI ID of chip */
 518         unsigned short  chip_vendor;    /* PCI ID of vendor */
 519         char            myid[40];
 520
 521         struct pci_dev  *nbridge;
 522         struct pci_dev  *lpcdev;
 523
 524         int             mni;    /* Mode number index */
 525
 526         unsigned long   video_size;
 527         unsigned long   video_base;
 528         unsigned long   mmio_size;
 529         unsigned long   mmio_base;
 530         unsigned long   vga_base;
 531
 532         unsigned long   video_offset;
 533
 534         unsigned long   UMAsize, LFBsize;
 535
 536         void __iomem    *video_vbase;
 537         void __iomem    *mmio_vbase;
 538
 539         unsigned char   *bios_abase;
 540
 541         int             wc_cookie;
 542
 543         u32             sisfb_mem;
 544
 545         u32             sisfb_parm_mem;
 546         int             sisfb_accel;
 547         int             sisfb_ypan;
 548         int             sisfb_max;
 549         int             sisfb_userom;
 550         int             sisfb_useoem;
 551         int             sisfb_mode_idx;
 552         int             sisfb_parm_rate;
 553         int             sisfb_crt1off;
 554         int             sisfb_forcecrt1;
 555         int             sisfb_crt2type;
 556         int             sisfb_crt2flags;
 557         int             sisfb_dstn;
 558         int             sisfb_fstn;
 559         int             sisfb_tvplug;
 560         int             sisfb_tvstd;
 561         int             sisfb_nocrt2rate;
 562
 563         u32             heapstart;              /* offset  */
 564         void __iomem    *sisfb_heap_start;      /* address */
 565         void __iomem    *sisfb_heap_end;        /* address */
 566         u32             sisfb_heap_size;
 567         int             havenoheap;
 568
 569         struct SIS_HEAP sisfb_heap;             /* This card's vram heap */
 570
 571         int             video_bpp;
 572         int             video_cmap_len;
 573         int             video_width;
 574         int             video_height;
 575         unsigned int    refresh_rate;
 576
 577         unsigned int    chip;
 578         unsigned int    chip_real_id;
 579         u8              revision_id;
 580         int             sisvga_enabled;         /* PCI device was enabled */
 581
 582         int             video_linelength;       /* real pitch */
 583         int             scrnpitchCRT1;          /* pitch regarding interlace */
 584
 585         u16             DstColor;               /* For 2d acceleration */
 586         u32             SiS310_AccelDepth;
 587         u32             CommandReg;
 588         int             cmdqueuelength;         /* Current (for accel) */
 589         u32             cmdQueueSize;           /* Total size in KB */
 590
 591         spinlock_t      lockaccel;              /* Do not use outside of kernel! */
 592
 593         unsigned int    pcibus;
 594         unsigned int    pcislot;
 595         unsigned int    pcifunc;
 596
 597         int             accel;
 598         int             engineok;
 599
 600         u16             subsysvendor;
 601         u16             subsysdevice;
 602
 603         u32             vbflags;                /* Replacing deprecated stuff from above */
 604         u32             currentvbflags;
 605         u32             vbflags2;
 606
 607         int             lcdxres, lcdyres;
 608         int             lcddefmodeidx, tvdefmodeidx, defmodeidx;
 609         u32             CRT2LCDType;            /* defined in "SIS_LCD_TYPE" */
 610         u32             curFSTN, curDSTN;
 611
 612         int             current_bpp;
 613         int             current_width;
 614         int             current_height;
 615         int             current_htotal;
 616         int             current_vtotal;
 617         int             current_linelength;
 618         __u32           current_pixclock;
 619         int             current_refresh_rate;
 620
 621         unsigned int    current_base;
 622
 623         u8              mode_no;
 624         u8              rate_idx;
 625         int             modechanged;
 626         unsigned char   modeprechange;
 627
 628         u8              sisfb_lastrates[128];
 629
 630         int             newrom;
 631         int             haveXGIROM;
 632         int             registered;
 633         int             warncount;
 634
 635         int             sisvga_engine;
 636         int             hwcursor_size;
 637         int             CRT2_write_enable;
 638         u8              caps;
 639
 640         u8              detectedpdc;
 641         u8              detectedpdca;
 642         u8              detectedlcda;
 643
 644         void __iomem    *hwcursor_vbase;
 645
 646         int             chronteltype;
 647         int             tvxpos, tvypos;
 648         u8              p2_1f,p2_20,p2_2b,p2_42,p2_43,p2_01,p2_02;
 649         int             tvx, tvy;
 650
 651         u8              sisfblocked;
 652
 653         struct sisfb_info sisfb_infoblock;
 654
 655         struct sisfb_cmd sisfb_command;
 656
 657         u32             sisfb_id;
 658
 659         u8              sisfb_can_post;
 660         u8              sisfb_card_posted;
 661         u8              sisfb_was_boot_device;
 662
 663         struct sis_video_info *next;
 664 };
 665
 666 /* from sis_accel.c */
 667 extern void     fbcon_sis_fillrect(struct fb_info *info,
 668                                 const struct fb_fillrect *rect);
 669 extern void     fbcon_sis_copyarea(struct fb_info *info,
 670                                 const struct fb_copyarea *area);
 671 extern int      fbcon_sis_sync(struct fb_info *info);
 672
 673 /* Internal 2D accelerator functions */
 674 extern int      sisfb_initaccel(struct sis_video_info *ivideo);
 675 extern void     sisfb_syncaccel(struct sis_video_info *ivideo);
 676
 677 /* Internal general routines */
 678 #ifdef CONFIG_FB_SIS_300
 679 unsigned int    sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg);
 680 void            sisfb_write_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg, unsigned int val);
 681 unsigned int    sisfb_read_lpc_pci_dword(struct SiS_Private *SiS_Pr, int reg);
 682 #endif
 683 #ifdef CONFIG_FB_SIS_315
 684 void            sisfb_write_nbridge_pci_byte(struct SiS_Private *SiS_Pr, int reg, unsigned char val);
 685 unsigned int    sisfb_read_mio_pci_word(struct SiS_Private *SiS_Pr, int reg);
 686 #endif
 687
 688 /* SiS-specific exported functions */
 689 void                    sis_malloc(struct sis_memreq *req);
 690 void                    sis_malloc_new(struct pci_dev *pdev, struct sis_memreq *req);
 691 void                    sis_free(u32 base);
 692 void                    sis_free_new(struct pci_dev *pdev, u32 base);
 693
 694 /* Routines from init.c/init301.c */
 695 extern unsigned short   SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay,
 696                                 int VDisplay, int Depth, bool FSTN, unsigned short CustomT,
 697                                 int LCDwith, int LCDheight, unsigned int VBFlags2);
 698 extern unsigned short   SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay,
 699                                 int VDisplay, int Depth, unsigned int VBFlags2);
 700 extern unsigned short   SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay,
 701                                 int VDisplay, int Depth, unsigned int VBFlags2);
 702 extern void             SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr);
 703 extern bool             SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo);
 704 extern void             SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable);
 705 extern void             SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable);
 706
 707 extern bool             SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr);
 708
 709 extern bool             sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno,
 710                                 int *htotal, int *vtotal, unsigned char rateindex);
 711 extern int              sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr,
 712                                 unsigned char modeno, unsigned char rateindex);
 713 extern int              sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno,
 714                                 unsigned char rateindex, struct fb_var_screeninfo *var);
 715
 716
 717 #endif