ARM: dts: ti: fix PCI bus dtc warnings
[linux/fpc-iii.git] / include / acpi / cppc_acpi.h
blob427a7c3e6c75c5d3789ed12a4836d0d19c202938
1 /*
2 * CPPC (Collaborative Processor Performance Control) methods used
3 * by CPUfreq drivers.
5 * (C) Copyright 2014, 2015 Linaro Ltd.
6 * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; version 2
11 * of the License.
14 #ifndef _CPPC_ACPI_H
15 #define _CPPC_ACPI_H
17 #include <linux/acpi.h>
18 #include <linux/types.h>
20 #include <acpi/pcc.h>
21 #include <acpi/processor.h>
23 /* Only support CPPCv2 for now. */
24 #define CPPC_NUM_ENT 21
25 #define CPPC_REV 2
27 #define PCC_CMD_COMPLETE_MASK (1 << 0)
28 #define PCC_ERROR_MASK (1 << 2)
30 #define MAX_CPC_REG_ENT 19
32 /* CPPC specific PCC commands. */
33 #define CMD_READ 0
34 #define CMD_WRITE 1
36 /* Each register has the folowing format. */
37 struct cpc_reg {
38 u8 descriptor;
39 u16 length;
40 u8 space_id;
41 u8 bit_width;
42 u8 bit_offset;
43 u8 access_width;
44 u64 __iomem address;
45 } __packed;
48 * Each entry in the CPC table is either
49 * of type ACPI_TYPE_BUFFER or
50 * ACPI_TYPE_INTEGER.
52 struct cpc_register_resource {
53 acpi_object_type type;
54 u64 __iomem *sys_mem_vaddr;
55 union {
56 struct cpc_reg reg;
57 u64 int_value;
58 } cpc_entry;
61 /* Container to hold the CPC details for each CPU */
62 struct cpc_desc {
63 int num_entries;
64 int version;
65 int cpu_id;
66 int write_cmd_status;
67 int write_cmd_id;
68 struct cpc_register_resource cpc_regs[MAX_CPC_REG_ENT];
69 struct acpi_psd_package domain_info;
70 struct kobject kobj;
73 /* These are indexes into the per-cpu cpc_regs[]. Order is important. */
74 enum cppc_regs {
75 HIGHEST_PERF,
76 NOMINAL_PERF,
77 LOW_NON_LINEAR_PERF,
78 LOWEST_PERF,
79 GUARANTEED_PERF,
80 DESIRED_PERF,
81 MIN_PERF,
82 MAX_PERF,
83 PERF_REDUC_TOLERANCE,
84 TIME_WINDOW,
85 CTR_WRAP_TIME,
86 REFERENCE_CTR,
87 DELIVERED_CTR,
88 PERF_LIMITED,
89 ENABLE,
90 AUTO_SEL_ENABLE,
91 AUTO_ACT_WINDOW,
92 ENERGY_PERF,
93 REFERENCE_PERF,
97 * Categorization of registers as described
98 * in the ACPI v.5.1 spec.
99 * XXX: Only filling up ones which are used by governors
100 * today.
102 struct cppc_perf_caps {
103 u32 highest_perf;
104 u32 nominal_perf;
105 u32 lowest_perf;
108 struct cppc_perf_ctrls {
109 u32 max_perf;
110 u32 min_perf;
111 u32 desired_perf;
114 struct cppc_perf_fb_ctrs {
115 u64 reference;
116 u64 delivered;
117 u64 reference_perf;
118 u64 ctr_wrap_time;
121 /* Per CPU container for runtime CPPC management. */
122 struct cppc_cpudata {
123 int cpu;
124 struct cppc_perf_caps perf_caps;
125 struct cppc_perf_ctrls perf_ctrls;
126 struct cppc_perf_fb_ctrs perf_fb_ctrs;
127 struct cpufreq_policy *cur_policy;
128 unsigned int shared_type;
129 cpumask_var_t shared_cpu_map;
132 extern int cppc_get_perf_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs);
133 extern int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls);
134 extern int cppc_get_perf_caps(int cpu, struct cppc_perf_caps *caps);
135 extern int acpi_get_psd_map(struct cppc_cpudata **);
136 extern unsigned int cppc_get_transition_latency(int cpu);
138 #endif /* _CPPC_ACPI_H*/