1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015 CompuLab, Ltd. - http://www.compulab.co.il/
8 #include <dt-bindings/pinctrl/am43xx.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include "am4372.dtsi"
14 model = "CompuLab CM-T43";
15 compatible = "compulab,am437x-cm-t43", "ti,am4372", "ti,am43";
18 compatible = "gpio-leds";
21 label = "cm-t43:green";
22 gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
23 linux,default-trigger = "heartbeat";
27 vmmc_3v3: fixedregulator-v3_3 {
28 compatible = "regulator-fixed";
29 regulator-name = "vmmc_3v3";
30 regulator-min-microvolt = <3300000>;
31 regulator-max-microvolt = <3300000>;
38 pinctrl-names = "default";
39 pinctrl-0 = <&cm_t43_led_pins>;
41 cm_t43_led_pins: cm_t43_led_pins {
42 pinctrl-single,pins = <
43 AM4372_IOPAD(0xa78, MUX_MODE7)
47 i2c0_pins: i2c0_pins {
48 pinctrl-single,pins = <
49 AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
50 AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
54 emmc_pins: emmc_pins {
55 pinctrl-single,pins = <
56 AM4372_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad8.mmc1_dat0 */
57 AM4372_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad9.mmc1_dat1 */
58 AM4372_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad10.mmc1_dat2 */
59 AM4372_IOPAD(0x82c, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad11.mmc1_dat3 */
60 AM4372_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad12.mmc1_dat4 */
61 AM4372_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad13.mmc1_dat5 */
62 AM4372_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad14.mmc1_dat6 */
63 AM4372_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad15.mmc1_dat7 */
64 AM4372_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
65 AM4372_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
69 spi0_pins: pinmux_spi0_pins {
70 pinctrl-single,pins = <
71 AM4372_IOPAD(0x950, PIN_INPUT | MUX_MODE0) /* spi0_sclk.spi0_sclk */
72 AM4372_IOPAD(0x954, PIN_INPUT | MUX_MODE0) /* spi0_d0.spi0_d0 */
73 AM4372_IOPAD(0x958, PIN_OUTPUT | MUX_MODE0) /* spi0_d1.spi0_d1 */
74 AM4372_IOPAD(0x95C, PIN_OUTPUT | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
78 nand_flash_x8: nand_flash_x8 {
79 pinctrl-single,pins = <
80 AM4372_IOPAD(0x800, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
81 AM4372_IOPAD(0x804, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
82 AM4372_IOPAD(0x808, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
83 AM4372_IOPAD(0x80c, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
84 AM4372_IOPAD(0x810, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
85 AM4372_IOPAD(0x814, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
86 AM4372_IOPAD(0x818, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
87 AM4372_IOPAD(0x81c, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
88 AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)
89 AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE0)
90 AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE0)
91 AM4372_IOPAD(0x898, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
92 AM4372_IOPAD(0x894, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
93 AM4372_IOPAD(0x890, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
94 AM4372_IOPAD(0x89c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
98 cpsw_default: cpsw_default {
99 pinctrl-single,pins = <
101 AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_txen */
102 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rxctl */
103 AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_txd3 */
104 AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_txd2 */
105 AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_txd1 */
106 AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_txd0 */
107 AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
108 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
109 AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rxd3 */
110 AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rxd2 */
111 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rxd1 */
112 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rxd0 */
113 AM4372_IOPAD(0xa74, MUX_MODE3)
115 AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.txen */
116 AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rxctl */
117 AM4372_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.txd3 */
118 AM4372_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.txd2 */
119 AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.txd1 */
120 AM4372_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.txd0 */
121 AM4372_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.tclk */
122 AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rclk */
123 AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rxd3 */
124 AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rxd2 */
125 AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rxd1 */
126 AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rxd0 */
127 AM4372_IOPAD(0xa38, MUX_MODE7)
131 davinci_mdio_default: davinci_mdio_default {
132 pinctrl-single,pins = <
134 AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
135 AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
142 pinctrl-names = "default";
143 pinctrl-0 = <&nand_flash_x8>;
144 ranges = <0 0 0x08000000 0x1000000>;
146 compatible = "ti,omap2-nand";
147 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
148 interrupt-parent = <&gpmc>;
149 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
150 <1 IRQ_TYPE_NONE>; /* termcount */
151 ti,nand-ecc-opt = "bch8";
154 nand-bus-width = <8>;
155 gpmc,device-width = <1>;
156 gpmc,sync-clk-ps = <0>;
158 gpmc,cs-rd-off-ns = <44>;
159 gpmc,cs-wr-off-ns = <44>;
160 gpmc,adv-on-ns = <6>;
161 gpmc,adv-rd-off-ns = <34>;
162 gpmc,adv-wr-off-ns = <44>;
164 gpmc,we-off-ns = <40>;
166 gpmc,oe-off-ns = <54>;
167 gpmc,access-ns = <64>;
168 gpmc,rd-cycle-ns = <82>;
169 gpmc,wr-cycle-ns = <82>;
170 gpmc,bus-turnaround-ns = <0>;
171 gpmc,cycle2cycle-delay-ns = <0>;
172 gpmc,clk-activation-ns = <0>;
173 gpmc,wr-access-ns = <40>;
174 gpmc,wr-data-mux-bus-ns = <0>;
176 #address-cells = <1>;
178 /* MTD partition table */
181 reg = <0x0 0x00980000>;
185 reg = <0x00980000 0x00080000>;
189 reg = <0x00a00000 0x0>;
196 pinctrl-names = "default";
197 pinctrl-0 = <&i2c0_pins>;
198 clock-frequency = <100000>;
200 tps65218: tps65218@24 {
201 compatible = "ti,tps65218";
203 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* NMIn */
204 interrupt-parent = <&gic>;
205 interrupt-controller;
206 #interrupt-cells = <2>;
208 dcdc1: regulator-dcdc1 {
209 regulator-name = "vdd_core";
210 regulator-min-microvolt = <912000>;
211 regulator-max-microvolt = <1144000>;
216 dcdc2: regulator-dcdc2 {
217 regulator-name = "vdd_mpu";
218 regulator-min-microvolt = <912000>;
219 regulator-max-microvolt = <1378000>;
224 dcdc3: regulator-dcdc3 {
225 regulator-name = "vdcdc3";
226 regulator-suspend-enable;
227 regulator-min-microvolt = <1500000>;
228 regulator-max-microvolt = <1500000>;
233 dcdc5: regulator-dcdc5 {
234 regulator-name = "v1_0bat";
235 regulator-min-microvolt = <1000000>;
236 regulator-max-microvolt = <1000000>;
241 dcdc6: regulator-dcdc6 {
242 regulator-name = "v1_8bat";
243 regulator-min-microvolt = <1800000>;
244 regulator-max-microvolt = <1800000>;
249 ldo1: regulator-ldo1 {
250 regulator-min-microvolt = <1800000>;
251 regulator-max-microvolt = <1800000>;
257 eeprom_module: at24@50 {
258 compatible = "atmel,24c02";
290 pinctrl-names = "default";
291 pinctrl-0 = <&emmc_pins>;
292 vmmc-supply = <&vmmc_3v3>;
299 pinctrl-names = "default";
300 pinctrl-0 = <&spi0_pins>;
303 dma-names = "tx0", "rx0";
305 flash: w25q64cvzpig@0 {
306 #address-cells = <1>;
308 compatible = "jedec,spi-nor";
310 spi-max-frequency = <20000000>;
317 label = "uboot environment";
318 reg = <0xc0000 0x40000>;
323 reg = <0x100000 0x100000>;
329 pinctrl-names = "default";
330 pinctrl-0 = <&cpsw_default>;
336 pinctrl-names = "default";
337 pinctrl-0 = <&davinci_mdio_default>;
340 ethphy0: ethernet-phy@0 {
344 ethphy1: ethernet-phy@1 {
350 phy-handle = <ðphy0>;
351 phy-mode = "rgmii-txid";
352 dual_emac_res_vlan = <1>;
356 phy-handle = <ðphy1>;
357 phy-mode = "rgmii-txid";
358 dual_emac_res_vlan = <2>;
385 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
386 <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
387 <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
388 interrupt-names = "peripheral", "host", "otg";
403 ti,x-plate-resistance = <200>;
404 ti,coordiante-readouts = <5>;
405 ti,wire-config = <0x00 0x11 0x22 0x33>;
409 ti,adc-channels = <4 5 6 7>;
414 cpu0-supply = <&dcdc2>;
415 operating-points = <1000000 1330000>,