1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for NETGEAR ReadyNAS 104
5 * Copyright (C) 2013, Arnaud EBALARD <arno@natisbad.org>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include "armada-370.dtsi"
15 model = "NETGEAR ReadyNAS 104";
16 compatible = "netgear,readynas-104", "marvell,armada370", "marvell,armada-370-xp";
19 stdout-path = "serial0:115200n8";
23 device_type = "memory";
24 reg = <0x00000000 0x20000000>; /* 512 MB */
28 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
29 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
30 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
34 /* RTC is provided by Intersil ISL12057 I2C RTC chip */
44 pinctrl-0 = <&ge0_rgmii_pins>;
45 pinctrl-names = "default";
48 phy-mode = "rgmii-id";
52 pinctrl-0 = <&ge1_rgmii_pins>;
53 pinctrl-names = "default";
56 phy-mode = "rgmii-id";
64 clock-frequency = <100000>;
66 pinctrl-0 = <&i2c0_pins>;
67 pinctrl-names = "default";
72 compatible = "isil,isl12057";
78 compatible = "gmt,g762";
80 clocks = <&g762_clk>; /* input clock */
87 compatible = "nxp,pca9554";
97 g762_clk: g762-oscillator {
98 compatible = "fixed-clock";
100 clock-frequency = <8192>;
105 compatible = "gpio-leds";
106 pinctrl-0 = <&backup_led_pin &power_led_pin>;
107 pinctrl-names = "default";
110 label = "rn104:blue:backup";
111 gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
112 default-state = "off";
116 label = "rn104:blue:pwr";
117 gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
118 linux,default-trigger = "keep";
122 label = "rn104:blue:sata1";
123 gpios = <&pca9554 0 GPIO_ACTIVE_LOW>;
124 default-state = "off";
128 label = "rn104:blue:sata2";
129 gpios = <&pca9554 1 GPIO_ACTIVE_LOW>;
130 default-state = "off";
134 label = "rn104:blue:sata3";
135 gpios = <&pca9554 2 GPIO_ACTIVE_LOW>;
136 default-state = "off";
140 label = "rn104:blue:sata4";
141 gpios = <&pca9554 3 GPIO_ACTIVE_LOW>;
142 default-state = "off";
147 compatible = "hit,hd44780";
148 data-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>,
149 <&gpio1 26 GPIO_ACTIVE_HIGH>,
150 <&gpio1 27 GPIO_ACTIVE_HIGH>,
151 <&gpio1 29 GPIO_ACTIVE_HIGH>;
152 enable-gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
153 rs-gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
154 rw-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
155 backlight-gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
156 display-height-chars = <2>;
157 display-width-chars = <16>;
161 compatible = "gpio-keys";
162 pinctrl-0 = <&backup_button_pin
165 pinctrl-names = "default";
168 label = "Backup Button";
169 linux,code = <KEY_COPY>;
170 gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
174 label = "Power Button";
175 linux,code = <KEY_POWER>;
176 gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
180 label = "Reset Button";
181 linux,code = <KEY_RESTART>;
182 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
187 compatible = "gpio-poweroff";
188 pinctrl-0 = <&poweroff>;
189 pinctrl-names = "default";
190 gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
197 /* Connected to FL1009 USB 3.0 controller */
203 /* Connected to Marvell 88SE9215 SATA controller */
211 pinctrl-0 = <&mdio_pins>;
212 pinctrl-names = "default";
213 phy0: ethernet-phy@0 { /* Marvell 88E1318 */
217 phy1: ethernet-phy@1 { /* Marvell 88E1318 */
224 marvell,pins = "mpp60";
225 marvell,function = "gpio";
228 backup_button_pin: backup-button-pin {
229 marvell,pins = "mpp52";
230 marvell,function = "gpio";
233 power_button_pin: power-button-pin {
234 marvell,pins = "mpp62";
235 marvell,function = "gpio";
238 backup_led_pin: backup-led-pin {
239 marvell,pins = "mpp63";
240 marvell,function = "gpio";
243 power_led_pin: power-led-pin {
244 marvell,pins = "mpp64";
245 marvell,function = "gpio";
248 reset_button_pin: reset-button-pin {
249 marvell,pins = "mpp65";
250 marvell,function = "gpio";
259 label = "pxa3xx_nand-0";
261 marvell,nand-keep-config;
264 /* Use Hardware BCH ECC */
265 nand-ecc-strength = <4>;
266 nand-ecc-step-size = <512>;
269 compatible = "fixed-partitions";
270 #address-cells = <1>;
275 reg = <0x0000000 0x180000>; /* 1.5MB */
280 label = "u-boot-env";
281 reg = <0x180000 0x20000>; /* 128KB */
287 reg = <0x0200000 0x600000>; /* 6MB */
291 label = "minirootfs";
292 reg = <0x0800000 0x400000>; /* 4MB */
295 /* Last MB is for the BBT, i.e. not writable */
298 reg = <0x0c00000 0x7400000>; /* 116MB */