arch/arm/boot/dts/rk3288-veyron-speedy.dts

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Google Veyron Speedy Rev 1+ board device tree source
   4  *
   5  * Copyright 2015 Google, Inc
   6  */
   7
   8 /dts-v1/;
   9 #include "rk3288-veyron-chromebook.dtsi"
  10 #include "rk3288-veyron-broadcom-bluetooth.dtsi"
  11 #include "cros-ec-sbs.dtsi"
  12
  13 / {
  14         model = "Google Speedy";
  15         compatible = "google,veyron-speedy-rev9", "google,veyron-speedy-rev8",
  16                      "google,veyron-speedy-rev7", "google,veyron-speedy-rev6",
  17                      "google,veyron-speedy-rev5", "google,veyron-speedy-rev4",
  18                      "google,veyron-speedy-rev3", "google,veyron-speedy-rev2",
  19                      "google,veyron-speedy", "google,veyron", "rockchip,rk3288";
  20 };
  21
  22 &cpu_alert0 {
  23         temperature = <65000>;
  24 };
  25
  26 &cpu_alert1 {
  27         temperature = <70000>;
  28 };
  29
  30 &cpu_crit {
  31         temperature = <90000>;
  32 };
  33
  34 &edp {
  35         /delete-property/pinctrl-names;
  36         /delete-property/pinctrl-0;
  37
  38         force-hpd;
  39 };
  40
  41 &gpu_alert0 {
  42         temperature = <80000>;
  43 };
  44
  45 &gpu_crit {
  46         temperature = <90000>;
  47 };
  48
  49 &rk808 {
  50         pinctrl-names = "default";
  51         pinctrl-0 = <&pmic_int_l>;
  52 };
  53
  54 &sdmmc {
  55         disable-wp;
  56         pinctrl-names = "default";
  57         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
  58                         &sdmmc_bus4>;
  59 };
  60
  61 &vcc_5v {
  62         enable-active-high;
  63         gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
  64         pinctrl-names = "default";
  65         pinctrl-0 = <&drv_5v>;
  66 };
  67
  68 &vcc50_hdmi {
  69         enable-active-high;
  70         gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
  71         pinctrl-names = "default";
  72         pinctrl-0 = <&vcc50_hdmi_en>;
  73 };
  74
  75 &gpio0 {
  76         gpio-line-names = "PMIC_SLEEP_AP",
  77                           "DDRIO_PWROFF",
  78                           "DDRIO_RETEN",
  79                           "TS3A227E_INT_L",
  80                           "PMIC_INT_L",
  81                           "PWR_KEY_L",
  82                           "AP_LID_INT_L",
  83                           "EC_IN_RW",
  84
  85                           "AC_PRESENT_AP",
  86                           /*
  87                            * RECOVERY_SW_L is Chrome OS ABI.  Schematics call
  88                            * it REC_MODE_L.
  89                            */
  90                           "RECOVERY_SW_L",
  91                           "OTP_OUT",
  92                           "HOST1_PWR_EN",
  93                           "USBOTG_PWREN_H",
  94                           "AP_WARM_RESET_H",
  95                           "nFALUT2",
  96                           "I2C0_SDA_PMIC",
  97
  98                           "I2C0_SCL_PMIC",
  99                           "SUSPEND_L",
 100                           "USB_INT";
 101 };
 102
 103 &gpio2 {
 104         gpio-line-names = "CONFIG0",
 105                           "CONFIG1",
 106                           "CONFIG2",
 107                           "",
 108                           "",
 109                           "",
 110                           "",
 111                           "CONFIG3",
 112
 113                           "PWRLIMIT#_CPU",
 114                           "EMMC_RST_L",
 115                           "",
 116                           "",
 117                           "BL_PWR_EN",
 118                           "AVDD_1V8_DISP_EN";
 119 };
 120
 121 &gpio3 {
 122         gpio-line-names = "FLASH0_D0",
 123                           "FLASH0_D1",
 124                           "FLASH0_D2",
 125                           "FLASH0_D3",
 126                           "FLASH0_D4",
 127                           "FLASH0_D5",
 128                           "FLASH0_D6",
 129                           "FLASH0_D7",
 130
 131                           "",
 132                           "",
 133                           "",
 134                           "",
 135                           "",
 136                           "",
 137                           "",
 138                           "",
 139
 140                           "FLASH0_CS2/EMMC_CMD",
 141                           "",
 142                           "FLASH0_DQS/EMMC_CLKO";
 143 };
 144
 145 &gpio4 {
 146         gpio-line-names = "",
 147                           "",
 148                           "",
 149                           "",
 150                           "",
 151                           "",
 152                           "",
 153                           "",
 154
 155                           "",
 156                           "",
 157                           "",
 158                           "",
 159                           "",
 160                           "",
 161                           "",
 162                           "",
 163
 164                           "UART0_RXD",
 165                           "UART0_TXD",
 166                           "UART0_CTS",
 167                           "UART0_RTS",
 168                           "SDIO0_D0",
 169                           "SDIO0_D1",
 170                           "SDIO0_D2",
 171                           "SDIO0_D3",
 172
 173                           "SDIO0_CMD",
 174                           "SDIO0_CLK",
 175                           "BT_DEV_WAKE",
 176                           "",
 177                           "WIFI_ENABLE_H",
 178                           "BT_ENABLE_L",
 179                           "WIFI_HOST_WAKE",
 180                           "BT_HOST_WAKE";
 181 };
 182
 183 &gpio5 {
 184         gpio-line-names = "",
 185                           "",
 186                           "",
 187                           "",
 188                           "",
 189                           "",
 190                           "",
 191                           "",
 192
 193                           "",
 194                           "",
 195                           "",
 196                           "",
 197                           "SPI0_CLK",
 198                           "SPI0_CS0",
 199                           "SPI0_TXD",
 200                           "SPI0_RXD",
 201
 202                           "",
 203                           "",
 204                           "",
 205                           "VCC50_HDMI_EN";
 206 };
 207
 208 &gpio6 {
 209         gpio-line-names = "I2S0_SCLK",
 210                           "I2S0_LRCK_RX",
 211                           "I2S0_LRCK_TX",
 212                           "I2S0_SDI",
 213                           "I2S0_SDO0",
 214                           "HP_DET_H",
 215                           "ALS_INT",            /* not connected */
 216                           "INT_CODEC",
 217
 218                           "I2S0_CLK",
 219                           "I2C2_SDA",
 220                           "I2C2_SCL",
 221                           "MICDET",
 222                           "",
 223                           "",
 224                           "",
 225                           "",
 226
 227                           "SDMMC_D0",
 228                           "SDMMC_D1",
 229                           "SDMMC_D2",
 230                           "SDMMC_D3",
 231                           "SDMMC_CLK",
 232                           "SDMMC_CMD";
 233 };
 234
 235 &gpio7 {
 236         gpio-line-names = "LCDC_BL",
 237                           "PWM_LOG",
 238                           "BL_EN",
 239                           "TRACKPAD_INT",
 240                           "TPM_INT_H",
 241                           "SDMMC_DET_L",
 242                           /*
 243                            * AP_FLASH_WP_L is Chrome OS ABI.  Schematics call
 244                            * it FW_WP_AP.
 245                            */
 246                           "AP_FLASH_WP_L",
 247                           "EC_INT",
 248
 249                           "CPU_NMI",
 250                           "DVS_OK",
 251                           "",
 252                           "EDP_HOTPLUG",
 253                           "DVS1",
 254                           "nFALUT1",
 255                           "LCD_EN",
 256                           "DVS2",
 257
 258                           "VCC5V_GOOD_H",
 259                           "I2C4_SDA_TP",
 260                           "I2C4_SCL_TP",
 261                           "I2C5_SDA_HDMI",
 262                           "I2C5_SCL_HDMI",
 263                           "5V_DRV",
 264                           "UART2_RXD",
 265                           "UART2_TXD";
 266 };
 267
 268 &gpio8 {
 269         gpio-line-names = "RAM_ID0",
 270                           "RAM_ID1",
 271                           "RAM_ID2",
 272                           "RAM_ID3",
 273                           "I2C1_SDA_TPM",
 274                           "I2C1_SCL_TPM",
 275                           "SPI2_CLK",
 276                           "SPI2_CS0",
 277
 278                           "SPI2_RXD",
 279                           "SPI2_TXD";
 280 };
 281
 282 &pinctrl {
 283         pinctrl-names = "default", "sleep";
 284         pinctrl-0 = <
 285                 /* Common for sleep and wake, but no owners */
 286                 &ddr0_retention
 287                 &ddrio_pwroff
 288                 &global_pwroff
 289
 290                 /* Wake only */
 291                 &suspend_l_wake
 292         >;
 293         pinctrl-1 = <
 294                 /* Common for sleep and wake, but no owners */
 295                 &ddr0_retention
 296                 &ddrio_pwroff
 297                 &global_pwroff
 298
 299                 /* Sleep only */
 300                 &suspend_l_sleep
 301         >;
 302
 303         buck-5v {
 304                 drv_5v: drv-5v {
 305                         rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
 306                 };
 307         };
 308
 309         hdmi {
 310                 vcc50_hdmi_en: vcc50-hdmi-en {
 311                         rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
 312                 };
 313         };
 314
 315         pmic {
 316                 dvs_1: dvs-1 {
 317                         rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
 318                 };
 319
 320                 dvs_2: dvs-2 {
 321                         rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
 322                 };
 323         };
 324 };