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[linux/fpc-iii.git] / arch / arm / mach-iop32x / iq31244.c
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1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * arch/arm/mach-iop32x/iq31244.c
5 * Board support code for the Intel EP80219 and IQ31244 platforms.
7 * Author: Rory Bolt <rorybolt@pacbell.net>
8 * Copyright (C) 2002 Rory Bolt
9 * Copyright 2003 (c) MontaVista, Software, Inc.
10 * Copyright (C) 2004 Intel Corp.
13 #include <linux/mm.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
16 #include <linux/kernel.h>
17 #include <linux/pci.h>
18 #include <linux/pm.h>
19 #include <linux/string.h>
20 #include <linux/serial_core.h>
21 #include <linux/serial_8250.h>
22 #include <linux/mtd/physmap.h>
23 #include <linux/platform_device.h>
24 #include <linux/io.h>
25 #include <linux/gpio/machine.h>
26 #include <asm/cputype.h>
27 #include <asm/irq.h>
28 #include <asm/mach/arch.h>
29 #include <asm/mach/map.h>
30 #include <asm/mach/pci.h>
31 #include <asm/mach/time.h>
32 #include <asm/mach-types.h>
33 #include <asm/page.h>
34 #include <asm/pgtable.h>
36 #include "hardware.h"
37 #include "irqs.h"
38 #include "gpio-iop32x.h"
41 * Until March of 2007 iq31244 platforms and ep80219 platforms shared the
42 * same machine id, and the processor type was used to select board type.
43 * However this assumption breaks for an iq80219 board which is an iop219
44 * processor on an iq31244 board. The force_ep80219 flag has been added
45 * for old boot loaders using the iq31244 machine id for an ep80219 platform.
47 static int force_ep80219;
49 static int is_80219(void)
51 return !!((read_cpuid_id() & 0xffffffe0) == 0x69052e20);
54 static int is_ep80219(void)
56 if (machine_is_ep80219() || force_ep80219)
57 return 1;
58 else
59 return 0;
64 * EP80219/IQ31244 timer tick configuration.
66 static void __init iq31244_timer_init(void)
68 if (is_ep80219()) {
69 /* 33.333 MHz crystal. */
70 iop_init_time(200000000);
71 } else {
72 /* 33.000 MHz crystal. */
73 iop_init_time(198000000);
79 * IQ31244 I/O.
81 static struct map_desc iq31244_io_desc[] __initdata = {
82 { /* on-board devices */
83 .virtual = IQ31244_UART,
84 .pfn = __phys_to_pfn(IQ31244_UART),
85 .length = 0x00100000,
86 .type = MT_DEVICE,
90 void __init iq31244_map_io(void)
92 iop3xx_map_io();
93 iotable_init(iq31244_io_desc, ARRAY_SIZE(iq31244_io_desc));
98 * EP80219/IQ31244 PCI.
100 static int __init
101 ep80219_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
103 int irq;
105 if (slot == 0) {
106 /* CFlash */
107 irq = IRQ_IOP32X_XINT1;
108 } else if (slot == 1) {
109 /* 82551 Pro 100 */
110 irq = IRQ_IOP32X_XINT0;
111 } else if (slot == 2) {
112 /* PCI-X Slot */
113 irq = IRQ_IOP32X_XINT3;
114 } else if (slot == 3) {
115 /* SATA */
116 irq = IRQ_IOP32X_XINT2;
117 } else {
118 printk(KERN_ERR "ep80219_pci_map_irq() called for unknown "
119 "device PCI:%d:%d:%d\n", dev->bus->number,
120 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
121 irq = -1;
124 return irq;
127 static struct hw_pci ep80219_pci __initdata = {
128 .nr_controllers = 1,
129 .ops = &iop3xx_ops,
130 .setup = iop3xx_pci_setup,
131 .preinit = iop3xx_pci_preinit,
132 .map_irq = ep80219_pci_map_irq,
135 static int __init
136 iq31244_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
138 int irq;
140 if (slot == 0) {
141 /* CFlash */
142 irq = IRQ_IOP32X_XINT1;
143 } else if (slot == 1) {
144 /* SATA */
145 irq = IRQ_IOP32X_XINT2;
146 } else if (slot == 2) {
147 /* PCI-X Slot */
148 irq = IRQ_IOP32X_XINT3;
149 } else if (slot == 3) {
150 /* 82546 GigE */
151 irq = IRQ_IOP32X_XINT0;
152 } else {
153 printk(KERN_ERR "iq31244_pci_map_irq called for unknown "
154 "device PCI:%d:%d:%d\n", dev->bus->number,
155 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
156 irq = -1;
159 return irq;
162 static struct hw_pci iq31244_pci __initdata = {
163 .nr_controllers = 1,
164 .ops = &iop3xx_ops,
165 .setup = iop3xx_pci_setup,
166 .preinit = iop3xx_pci_preinit,
167 .map_irq = iq31244_pci_map_irq,
170 static int __init iq31244_pci_init(void)
172 if (is_ep80219())
173 pci_common_init(&ep80219_pci);
174 else if (machine_is_iq31244()) {
175 if (is_80219()) {
176 printk("note: iq31244 board type has been selected\n");
177 printk("note: to select ep80219 operation:\n");
178 printk("\t1/ specify \"force_ep80219\" on the kernel"
179 " command line\n");
180 printk("\t2/ update boot loader to pass"
181 " the ep80219 id: %d\n", MACH_TYPE_EP80219);
183 pci_common_init(&iq31244_pci);
186 return 0;
189 subsys_initcall(iq31244_pci_init);
193 * IQ31244 machine initialisation.
195 static struct physmap_flash_data iq31244_flash_data = {
196 .width = 2,
199 static struct resource iq31244_flash_resource = {
200 .start = 0xf0000000,
201 .end = 0xf07fffff,
202 .flags = IORESOURCE_MEM,
205 static struct platform_device iq31244_flash_device = {
206 .name = "physmap-flash",
207 .id = 0,
208 .dev = {
209 .platform_data = &iq31244_flash_data,
211 .num_resources = 1,
212 .resource = &iq31244_flash_resource,
215 static struct plat_serial8250_port iq31244_serial_port[] = {
217 .mapbase = IQ31244_UART,
218 .membase = (char *)IQ31244_UART,
219 .irq = IRQ_IOP32X_XINT1,
220 .flags = UPF_SKIP_TEST,
221 .iotype = UPIO_MEM,
222 .regshift = 0,
223 .uartclk = 1843200,
225 { },
228 static struct resource iq31244_uart_resource = {
229 .start = IQ31244_UART,
230 .end = IQ31244_UART + 7,
231 .flags = IORESOURCE_MEM,
234 static struct platform_device iq31244_serial_device = {
235 .name = "serial8250",
236 .id = PLAT8250_DEV_PLATFORM,
237 .dev = {
238 .platform_data = iq31244_serial_port,
240 .num_resources = 1,
241 .resource = &iq31244_uart_resource,
245 * This function will send a SHUTDOWN_COMPLETE message to the PIC
246 * controller over I2C. We are not using the i2c subsystem since
247 * we are going to power off and it may be removed
249 void ep80219_power_off(void)
252 * Send the Address byte w/ the start condition
254 *IOP3XX_IDBR1 = 0x60;
255 *IOP3XX_ICR1 = 0xE9;
256 mdelay(1);
259 * Send the START_MSG byte w/ no start or stop condition
261 *IOP3XX_IDBR1 = 0x0F;
262 *IOP3XX_ICR1 = 0xE8;
263 mdelay(1);
266 * Send the SHUTDOWN_COMPLETE Message ID byte w/ no start or
267 * stop condition
269 *IOP3XX_IDBR1 = 0x03;
270 *IOP3XX_ICR1 = 0xE8;
271 mdelay(1);
274 * Send an ignored byte w/ stop condition
276 *IOP3XX_IDBR1 = 0x00;
277 *IOP3XX_ICR1 = 0xEA;
279 while (1)
283 static void __init iq31244_init_machine(void)
285 register_iop32x_gpio();
286 gpiod_add_lookup_table(&iop3xx_i2c0_gpio_lookup);
287 gpiod_add_lookup_table(&iop3xx_i2c1_gpio_lookup);
288 platform_device_register(&iop3xx_i2c0_device);
289 platform_device_register(&iop3xx_i2c1_device);
290 platform_device_register(&iq31244_flash_device);
291 platform_device_register(&iq31244_serial_device);
292 platform_device_register(&iop3xx_dma_0_channel);
293 platform_device_register(&iop3xx_dma_1_channel);
295 if (is_ep80219())
296 pm_power_off = ep80219_power_off;
298 if (!is_80219())
299 platform_device_register(&iop3xx_aau_channel);
302 static int __init force_ep80219_setup(char *str)
304 force_ep80219 = 1;
305 return 1;
308 __setup("force_ep80219", force_ep80219_setup);
310 MACHINE_START(IQ31244, "Intel IQ31244")
311 /* Maintainer: Intel Corp. */
312 .atag_offset = 0x100,
313 .map_io = iq31244_map_io,
314 .init_irq = iop32x_init_irq,
315 .init_time = iq31244_timer_init,
316 .init_machine = iq31244_init_machine,
317 .restart = iop3xx_restart,
318 MACHINE_END
320 /* There should have been an ep80219 machine identifier from the beginning.
321 * Boot roms older than March 2007 do not know the ep80219 machine id. Pass
322 * "force_ep80219" on the kernel command line, otherwise iq31244 operation
323 * will be selected.
325 MACHINE_START(EP80219, "Intel EP80219")
326 /* Maintainer: Intel Corp. */
327 .atag_offset = 0x100,
328 .map_io = iq31244_map_io,
329 .init_irq = iop32x_init_irq,
330 .init_time = iq31244_timer_init,
331 .init_machine = iq31244_init_machine,
332 .restart = iop3xx_restart,
333 MACHINE_END