arch/arm/mach-omap2/usb.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #include <linux/platform_data/usb-omap.h>
   3
   4 /* AM35x */
   5 /* USB 2.0 PHY Control */
   6 #define CONF2_PHY_GPIOMODE      (1 << 23)
   7 #define CONF2_OTGMODE           (3 << 14)
   8 #define CONF2_NO_OVERRIDE       (0 << 14)
   9 #define CONF2_FORCE_HOST        (1 << 14)
  10 #define CONF2_FORCE_DEVICE      (2 << 14)
  11 #define CONF2_FORCE_HOST_VBUS_LOW (3 << 14)
  12 #define CONF2_SESENDEN          (1 << 13)
  13 #define CONF2_VBDTCTEN          (1 << 12)
  14 #define CONF2_REFFREQ_24MHZ     (2 << 8)
  15 #define CONF2_REFFREQ_26MHZ     (7 << 8)
  16 #define CONF2_REFFREQ_13MHZ     (6 << 8)
  17 #define CONF2_REFFREQ           (0xf << 8)
  18 #define CONF2_PHYCLKGD          (1 << 7)
  19 #define CONF2_VBUSSENSE         (1 << 6)
  20 #define CONF2_PHY_PLLON         (1 << 5)
  21 #define CONF2_RESET             (1 << 4)
  22 #define CONF2_PHYPWRDN          (1 << 3)
  23 #define CONF2_OTGPWRDN          (1 << 2)
  24 #define CONF2_DATPOL            (1 << 1)
  25
  26 /* TI81XX specific definitions */
  27 #define USBCTRL0        0x620
  28 #define USBSTAT0        0x624
  29
  30 /* TI816X PHY controls bits */
  31 #define TI816X_USBPHY0_NORMAL_MODE      (1 << 0)
  32 #define TI816X_USBPHY_REFCLK_OSC        (1 << 8)
  33
  34 /* TI814X PHY controls bits */
  35 #define USBPHY_CM_PWRDN         (1 << 0)
  36 #define USBPHY_OTG_PWRDN        (1 << 1)
  37 #define USBPHY_CHGDET_DIS       (1 << 2)
  38 #define USBPHY_CHGDET_RSTRT     (1 << 3)
  39 #define USBPHY_SRCONDM          (1 << 4)
  40 #define USBPHY_SINKONDP         (1 << 5)
  41 #define USBPHY_CHGISINK_EN      (1 << 6)
  42 #define USBPHY_CHGVSRC_EN       (1 << 7)
  43 #define USBPHY_DMPULLUP         (1 << 8)
  44 #define USBPHY_DPPULLUP         (1 << 9)
  45 #define USBPHY_CDET_EXTCTL      (1 << 10)
  46 #define USBPHY_GPIO_MODE        (1 << 12)
  47 #define USBPHY_DPOPBUFCTL       (1 << 13)
  48 #define USBPHY_DMOPBUFCTL       (1 << 14)
  49 #define USBPHY_DPINPUT          (1 << 15)
  50 #define USBPHY_DMINPUT          (1 << 16)
  51 #define USBPHY_DPGPIO_PD        (1 << 17)
  52 #define USBPHY_DMGPIO_PD        (1 << 18)
  53 #define USBPHY_OTGVDET_EN       (1 << 19)
  54 #define USBPHY_OTGSESSEND_EN    (1 << 20)
  55 #define USBPHY_DATA_POLARITY    (1 << 23)
  56
  57 struct usbhs_phy_data {
  58         int port;               /* 1 indexed port number */
  59         int reset_gpio;
  60         int vcc_gpio;
  61         bool vcc_polarity;      /* 1 active high, 0 active low */
  62 };
  63
  64 extern void usb_musb_init(struct omap_musb_board_data *board_data);
  65 extern void usbhs_init(struct usbhs_omap_platform_data *pdata);
  66 extern int usbhs_init_phys(struct usbhs_phy_data *phy, int num_phys);
  67
  68 extern void am35x_musb_reset(void);
  69 extern void am35x_musb_phy_power(u8 on);
  70 extern void am35x_musb_clear_irq(void);
  71 extern void am35x_set_mode(u8 musb_mode);