arch/riscv/include/asm/clint.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef _ASM_RISCV_CLINT_H
   3 #define _ASM_RISCV_CLINT_H 1
   4
   5 #include <linux/io.h>
   6 #include <linux/smp.h>
   7
   8 #ifdef CONFIG_RISCV_M_MODE
   9 extern u32 __iomem *clint_ipi_base;
  10
  11 void clint_init_boot_cpu(void);
  12
  13 static inline void clint_send_ipi_single(unsigned long hartid)
  14 {
  15         writel(1, clint_ipi_base + hartid);
  16 }
  17
  18 static inline void clint_send_ipi_mask(const struct cpumask *mask)
  19 {
  20         int cpu;
  21
  22         for_each_cpu(cpu, mask)
  23                 clint_send_ipi_single(cpuid_to_hartid_map(cpu));
  24 }
  25
  26 static inline void clint_clear_ipi(unsigned long hartid)
  27 {
  28         writel(0, clint_ipi_base + hartid);
  29 }
  30 #else /* CONFIG_RISCV_M_MODE */
  31 #define clint_init_boot_cpu()   do { } while (0)
  32
  33 /* stubs to for code is only reachable under IS_ENABLED(CONFIG_RISCV_M_MODE): */
  34 void clint_send_ipi_single(unsigned long hartid);
  35 void clint_send_ipi_mask(const struct cpumask *hartid_mask);
  36 void clint_clear_ipi(unsigned long hartid);
  37 #endif /* CONFIG_RISCV_M_MODE */
  38
  39 #endif /* _ASM_RISCV_CLINT_H */