include/dt-bindings/clock/exynos-audss-clk.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * This header provides constants for Samsung audio subsystem
   4  * clock controller.
   5  *
   6  * The constants defined in this header are being used in dts
   7  * and exynos audss driver.
   8  */
   9
  10 #ifndef _DT_BINDINGS_CLK_EXYNOS_AUDSS_H
  11 #define _DT_BINDINGS_CLK_EXYNOS_AUDSS_H
  12
  13 #define EXYNOS_MOUT_AUDSS       0
  14 #define EXYNOS_MOUT_I2S 1
  15 #define EXYNOS_DOUT_SRP 2
  16 #define EXYNOS_DOUT_AUD_BUS     3
  17 #define EXYNOS_DOUT_I2S 4
  18 #define EXYNOS_SRP_CLK          5
  19 #define EXYNOS_I2S_BUS          6
  20 #define EXYNOS_SCLK_I2S 7
  21 #define EXYNOS_PCM_BUS          8
  22 #define EXYNOS_SCLK_PCM 9
  23 #define EXYNOS_ADMA             10
  24
  25 #define EXYNOS_AUDSS_MAX_CLKS   11
  26
  27 #endif