1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, The Linux Foundation. All rights reserved. */
4 #ifndef _DT_BINDINGS_POWER_QCOM_RPMPD_H
5 #define _DT_BINDINGS_POWER_QCOM_RPMPD_H
7 /* SDM845 Power Domain Indexes */
10 #define SDM845_MX_AO 2
12 #define SDM845_CX_AO 4
18 /* SM8150 Power Domain Indexes */
25 #define SM8150_MX_AO 6
27 #define SM8150_CX_AO 8
29 #define SM8150_MMCX_AO 10
31 /* SC7180 Power Domain Indexes */
33 #define SC7180_CX_AO 1
36 #define SC7180_MX_AO 4
41 /* SDM845 Power Domain performance levels */
42 #define RPMH_REGULATOR_LEVEL_RETENTION 16
43 #define RPMH_REGULATOR_LEVEL_MIN_SVS 48
44 #define RPMH_REGULATOR_LEVEL_LOW_SVS 64
45 #define RPMH_REGULATOR_LEVEL_SVS 128
46 #define RPMH_REGULATOR_LEVEL_SVS_L1 192
47 #define RPMH_REGULATOR_LEVEL_SVS_L2 224
48 #define RPMH_REGULATOR_LEVEL_NOM 256
49 #define RPMH_REGULATOR_LEVEL_NOM_L1 320
50 #define RPMH_REGULATOR_LEVEL_NOM_L2 336
51 #define RPMH_REGULATOR_LEVEL_TURBO 384
52 #define RPMH_REGULATOR_LEVEL_TURBO_L1 416
54 /* MSM8976 Power Domain Indexes */
55 #define MSM8976_VDDCX 0
56 #define MSM8976_VDDCX_AO 1
57 #define MSM8976_VDDCX_VFL 2
58 #define MSM8976_VDDMX 3
59 #define MSM8976_VDDMX_AO 4
60 #define MSM8976_VDDMX_VFL 5
62 /* MSM8996 Power Domain Indexes */
63 #define MSM8996_VDDCX 0
64 #define MSM8996_VDDCX_AO 1
65 #define MSM8996_VDDCX_VFC 2
66 #define MSM8996_VDDMX 3
67 #define MSM8996_VDDMX_AO 4
68 #define MSM8996_VDDSSCX 5
69 #define MSM8996_VDDSSCX_VFC 6
71 /* MSM8998 Power Domain Indexes */
72 #define MSM8998_VDDCX 0
73 #define MSM8998_VDDCX_AO 1
74 #define MSM8998_VDDCX_VFL 2
75 #define MSM8998_VDDMX 3
76 #define MSM8998_VDDMX_AO 4
77 #define MSM8998_VDDMX_VFL 5
78 #define MSM8998_SSCCX 6
79 #define MSM8998_SSCCX_VFL 7
80 #define MSM8998_SSCMX 8
81 #define MSM8998_SSCMX_VFL 9
83 /* QCS404 Power Domains */
84 #define QCS404_VDDMX 0
85 #define QCS404_VDDMX_AO 1
86 #define QCS404_VDDMX_VFL 2
87 #define QCS404_LPICX 3
88 #define QCS404_LPICX_VFL 4
89 #define QCS404_LPIMX 5
90 #define QCS404_LPIMX_VFL 6
92 /* RPM SMD Power Domain performance levels */
93 #define RPM_SMD_LEVEL_RETENTION 16
94 #define RPM_SMD_LEVEL_RETENTION_PLUS 32
95 #define RPM_SMD_LEVEL_MIN_SVS 48
96 #define RPM_SMD_LEVEL_LOW_SVS 64
97 #define RPM_SMD_LEVEL_SVS 128
98 #define RPM_SMD_LEVEL_SVS_PLUS 192
99 #define RPM_SMD_LEVEL_NOM 256
100 #define RPM_SMD_LEVEL_NOM_PLUS 320
101 #define RPM_SMD_LEVEL_TURBO 384
102 #define RPM_SMD_LEVEL_TURBO_NO_CPR 416
103 #define RPM_SMD_LEVEL_TURBO_HIGH 448
104 #define RPM_SMD_LEVEL_BINNING 512