1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2001 by David Brownell
6 /* this file is part of ehci-hcd.c */
8 /*-------------------------------------------------------------------------*/
11 * There's basically three types of memory:
12 * - data used only by the HCD ... kmalloc is fine
13 * - async and periodic schedules, shared by HC and HCD ... these
14 * need to use dma_pool or dma_alloc_coherent
15 * - driver buffers, read/written by HC ... single shot DMA mapped
17 * There's also "register" data (e.g. PCI or SOC), which is memory mapped.
18 * No memory seen by this driver is pageable.
21 /*-------------------------------------------------------------------------*/
23 /* Allocate the key transfer structures from the previously allocated pool */
25 static inline void ehci_qtd_init(struct ehci_hcd
*ehci
, struct ehci_qtd
*qtd
,
28 memset (qtd
, 0, sizeof *qtd
);
30 qtd
->hw_token
= cpu_to_hc32(ehci
, QTD_STS_HALT
);
31 qtd
->hw_next
= EHCI_LIST_END(ehci
);
32 qtd
->hw_alt_next
= EHCI_LIST_END(ehci
);
33 INIT_LIST_HEAD (&qtd
->qtd_list
);
36 static struct ehci_qtd
*ehci_qtd_alloc (struct ehci_hcd
*ehci
, gfp_t flags
)
41 qtd
= dma_pool_alloc (ehci
->qtd_pool
, flags
, &dma
);
43 ehci_qtd_init(ehci
, qtd
, dma
);
48 static inline void ehci_qtd_free (struct ehci_hcd
*ehci
, struct ehci_qtd
*qtd
)
50 dma_pool_free (ehci
->qtd_pool
, qtd
, qtd
->qtd_dma
);
54 static void qh_destroy(struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
56 /* clean qtds first, and know this is not linked */
57 if (!list_empty (&qh
->qtd_list
) || qh
->qh_next
.ptr
) {
58 ehci_dbg (ehci
, "unused qh not empty!\n");
62 ehci_qtd_free (ehci
, qh
->dummy
);
63 dma_pool_free(ehci
->qh_pool
, qh
->hw
, qh
->qh_dma
);
67 static struct ehci_qh
*ehci_qh_alloc (struct ehci_hcd
*ehci
, gfp_t flags
)
72 qh
= kzalloc(sizeof *qh
, GFP_ATOMIC
);
75 qh
->hw
= (struct ehci_qh_hw
*)
76 dma_pool_alloc(ehci
->qh_pool
, flags
, &dma
);
79 memset(qh
->hw
, 0, sizeof *qh
->hw
);
81 // INIT_LIST_HEAD (&qh->qh_list);
82 INIT_LIST_HEAD (&qh
->qtd_list
);
83 INIT_LIST_HEAD(&qh
->unlink_node
);
85 /* dummy td enables safe urb queuing */
86 qh
->dummy
= ehci_qtd_alloc (ehci
, flags
);
87 if (qh
->dummy
== NULL
) {
88 ehci_dbg (ehci
, "no dummy td\n");
94 dma_pool_free(ehci
->qh_pool
, qh
->hw
, qh
->qh_dma
);
100 /*-------------------------------------------------------------------------*/
102 /* The queue heads and transfer descriptors are managed from pools tied
103 * to each of the "per device" structures.
104 * This is the initialisation and cleanup code.
107 static void ehci_mem_cleanup (struct ehci_hcd
*ehci
)
110 qh_destroy(ehci
, ehci
->async
);
114 qh_destroy(ehci
, ehci
->dummy
);
117 /* DMA consistent memory and pools */
118 dma_pool_destroy(ehci
->qtd_pool
);
119 ehci
->qtd_pool
= NULL
;
120 dma_pool_destroy(ehci
->qh_pool
);
121 ehci
->qh_pool
= NULL
;
122 dma_pool_destroy(ehci
->itd_pool
);
123 ehci
->itd_pool
= NULL
;
124 dma_pool_destroy(ehci
->sitd_pool
);
125 ehci
->sitd_pool
= NULL
;
128 dma_free_coherent(ehci_to_hcd(ehci
)->self
.sysdev
,
129 ehci
->periodic_size
* sizeof (u32
),
130 ehci
->periodic
, ehci
->periodic_dma
);
131 ehci
->periodic
= NULL
;
133 /* shadow periodic table */
134 kfree(ehci
->pshadow
);
135 ehci
->pshadow
= NULL
;
138 /* remember to add cleanup code (above) if you add anything here */
139 static int ehci_mem_init (struct ehci_hcd
*ehci
, gfp_t flags
)
143 /* QTDs for control/bulk/intr transfers */
144 ehci
->qtd_pool
= dma_pool_create ("ehci_qtd",
145 ehci_to_hcd(ehci
)->self
.sysdev
,
146 sizeof (struct ehci_qtd
),
147 32 /* byte alignment (for hw parts) */,
148 4096 /* can't cross 4K */);
149 if (!ehci
->qtd_pool
) {
153 /* QHs for control/bulk/intr transfers */
154 ehci
->qh_pool
= dma_pool_create ("ehci_qh",
155 ehci_to_hcd(ehci
)->self
.sysdev
,
156 sizeof(struct ehci_qh_hw
),
157 32 /* byte alignment (for hw parts) */,
158 4096 /* can't cross 4K */);
159 if (!ehci
->qh_pool
) {
162 ehci
->async
= ehci_qh_alloc (ehci
, flags
);
167 /* ITD for high speed ISO transfers */
168 ehci
->itd_pool
= dma_pool_create ("ehci_itd",
169 ehci_to_hcd(ehci
)->self
.sysdev
,
170 sizeof (struct ehci_itd
),
171 32 /* byte alignment (for hw parts) */,
172 4096 /* can't cross 4K */);
173 if (!ehci
->itd_pool
) {
177 /* SITD for full/low speed split ISO transfers */
178 ehci
->sitd_pool
= dma_pool_create ("ehci_sitd",
179 ehci_to_hcd(ehci
)->self
.sysdev
,
180 sizeof (struct ehci_sitd
),
181 32 /* byte alignment (for hw parts) */,
182 4096 /* can't cross 4K */);
183 if (!ehci
->sitd_pool
) {
187 /* Hardware periodic table */
188 ehci
->periodic
= (__le32
*)
189 dma_alloc_coherent(ehci_to_hcd(ehci
)->self
.sysdev
,
190 ehci
->periodic_size
* sizeof(__le32
),
191 &ehci
->periodic_dma
, flags
);
192 if (ehci
->periodic
== NULL
) {
196 if (ehci
->use_dummy_qh
) {
197 struct ehci_qh_hw
*hw
;
198 ehci
->dummy
= ehci_qh_alloc(ehci
, flags
);
202 hw
= ehci
->dummy
->hw
;
203 hw
->hw_next
= EHCI_LIST_END(ehci
);
204 hw
->hw_qtd_next
= EHCI_LIST_END(ehci
);
205 hw
->hw_alt_next
= EHCI_LIST_END(ehci
);
206 ehci
->dummy
->hw
= hw
;
208 for (i
= 0; i
< ehci
->periodic_size
; i
++)
209 ehci
->periodic
[i
] = cpu_to_hc32(ehci
,
210 ehci
->dummy
->qh_dma
);
212 for (i
= 0; i
< ehci
->periodic_size
; i
++)
213 ehci
->periodic
[i
] = EHCI_LIST_END(ehci
);
216 /* software shadow of hardware table */
217 ehci
->pshadow
= kcalloc(ehci
->periodic_size
, sizeof(void *), flags
);
218 if (ehci
->pshadow
!= NULL
)
222 ehci_dbg (ehci
, "couldn't init memory\n");
223 ehci_mem_cleanup (ehci
);