1 // SPDX-License-Identifier: GPL-2.0+
3 * PowerPC Memory Protection Keys management
5 * Copyright 2017, Ram Pai, IBM Corporation.
10 #include <linux/pkeys.h>
11 #include <linux/of_device.h>
13 DEFINE_STATIC_KEY_TRUE(pkey_disabled
);
14 bool pkey_execute_disable_supported
;
15 int pkeys_total
; /* Total pkeys as per device tree */
16 bool pkeys_devtree_defined
; /* pkey property exported by device tree */
17 u32 initial_allocation_mask
; /* Bits set for the initially allocated keys */
18 u32 reserved_allocation_mask
; /* Bits set for reserved keys */
19 u64 pkey_amr_mask
; /* Bits in AMR not to be touched */
20 u64 pkey_iamr_mask
; /* Bits in AMR not to be touched */
21 u64 pkey_uamor_mask
; /* Bits in UMOR not to be touched */
22 int execute_only_key
= 2;
24 #define AMR_BITS_PER_PKEY 2
25 #define AMR_RD_BIT 0x1UL
26 #define AMR_WR_BIT 0x2UL
27 #define IAMR_EX_BIT 0x1UL
28 #define PKEY_REG_BITS (sizeof(u64)*8)
29 #define pkeyshift(pkey) (PKEY_REG_BITS - ((pkey+1) * AMR_BITS_PER_PKEY))
31 static void scan_pkey_feature(void)
34 struct device_node
*cpu
;
36 cpu
= of_find_node_by_type(NULL
, "cpu");
40 if (of_property_read_u32_array(cpu
,
41 "ibm,processor-storage-keys", vals
, 2))
45 * Since any pkey can be used for data or execute, we will just treat
46 * all keys as equal and track them as one entity.
48 pkeys_total
= vals
[0];
49 pkeys_devtree_defined
= true;
52 static inline bool pkey_mmu_enabled(void)
54 if (firmware_has_feature(FW_FEATURE_LPAR
))
57 return cpu_has_feature(CPU_FTR_PKEY
);
60 int pkey_initialize(void)
65 * We define PKEY_DISABLE_EXECUTE in addition to the arch-neutral
66 * generic defines for PKEY_DISABLE_ACCESS and PKEY_DISABLE_WRITE.
67 * Ensure that the bits a distinct.
69 BUILD_BUG_ON(PKEY_DISABLE_EXECUTE
&
70 (PKEY_DISABLE_ACCESS
| PKEY_DISABLE_WRITE
));
73 * pkey_to_vmflag_bits() assumes that the pkey bits are contiguous
74 * in the vmaflag. Make sure that is really the case.
76 BUILD_BUG_ON(__builtin_clzl(ARCH_VM_PKEY_FLAGS
>> VM_PKEY_SHIFT
) +
77 __builtin_popcountl(ARCH_VM_PKEY_FLAGS
>> VM_PKEY_SHIFT
)
78 != (sizeof(u64
) * BITS_PER_BYTE
));
80 /* scan the device tree for pkey feature */
84 * Let's assume 32 pkeys on P8 bare metal, if its not defined by device
85 * tree. We make this exception since skiboot forgot to expose this
88 if (!pkeys_devtree_defined
&& !firmware_has_feature(FW_FEATURE_LPAR
) &&
89 cpu_has_feature(CPU_FTRS_POWER8
))
93 * Adjust the upper limit, based on the number of bits supported by
96 pkeys_total
= min_t(int, pkeys_total
,
97 ((ARCH_VM_PKEY_FLAGS
>> VM_PKEY_SHIFT
)+1));
99 if (!pkey_mmu_enabled() || radix_enabled() || !pkeys_total
)
100 static_branch_enable(&pkey_disabled
);
102 static_branch_disable(&pkey_disabled
);
104 if (static_branch_likely(&pkey_disabled
))
108 * The device tree cannot be relied to indicate support for
109 * execute_disable support. Instead we use a PVR check.
111 if (pvr_version_is(PVR_POWER7
) || pvr_version_is(PVR_POWER7p
))
112 pkey_execute_disable_supported
= false;
114 pkey_execute_disable_supported
= true;
116 #ifdef CONFIG_PPC_4K_PAGES
118 * The OS can manage only 8 pkeys due to its inability to represent them
119 * in the Linux 4K PTE.
121 os_reserved
= pkeys_total
- 8;
125 /* Bits are in LE format. */
126 reserved_allocation_mask
= (0x1 << 1) | (0x1 << execute_only_key
);
128 /* register mask is in BE format */
129 pkey_amr_mask
= ~0x0ul
;
130 pkey_amr_mask
&= ~(0x3ul
<< pkeyshift(0));
132 pkey_iamr_mask
= ~0x0ul
;
133 pkey_iamr_mask
&= ~(0x3ul
<< pkeyshift(0));
134 pkey_iamr_mask
&= ~(0x3ul
<< pkeyshift(execute_only_key
));
136 pkey_uamor_mask
= ~0x0ul
;
137 pkey_uamor_mask
&= ~(0x3ul
<< pkeyshift(0));
138 pkey_uamor_mask
&= ~(0x3ul
<< pkeyshift(execute_only_key
));
140 /* mark the rest of the keys as reserved and hence unavailable */
141 for (i
= (pkeys_total
- os_reserved
); i
< pkeys_total
; i
++) {
142 reserved_allocation_mask
|= (0x1 << i
);
143 pkey_uamor_mask
&= ~(0x3ul
<< pkeyshift(i
));
145 initial_allocation_mask
= reserved_allocation_mask
| (0x1 << 0);
147 if (unlikely((pkeys_total
- os_reserved
) <= execute_only_key
)) {
149 * Insufficient number of keys to support
150 * execute only key. Mark it unavailable.
151 * Any AMR, UAMOR, IAMR bit set for
152 * this key is irrelevant since this key
153 * can never be allocated.
155 execute_only_key
= -1;
161 arch_initcall(pkey_initialize
);
163 void pkey_mm_init(struct mm_struct
*mm
)
165 if (static_branch_likely(&pkey_disabled
))
167 mm_pkey_allocation_map(mm
) = initial_allocation_mask
;
168 mm
->context
.execute_only_pkey
= execute_only_key
;
171 static inline u64
read_amr(void)
173 return mfspr(SPRN_AMR
);
176 static inline void write_amr(u64 value
)
178 mtspr(SPRN_AMR
, value
);
181 static inline u64
read_iamr(void)
183 if (!likely(pkey_execute_disable_supported
))
186 return mfspr(SPRN_IAMR
);
189 static inline void write_iamr(u64 value
)
191 if (!likely(pkey_execute_disable_supported
))
194 mtspr(SPRN_IAMR
, value
);
197 static inline u64
read_uamor(void)
199 return mfspr(SPRN_UAMOR
);
202 static inline void write_uamor(u64 value
)
204 mtspr(SPRN_UAMOR
, value
);
207 static bool is_pkey_enabled(int pkey
)
209 u64 uamor
= read_uamor();
210 u64 pkey_bits
= 0x3ul
<< pkeyshift(pkey
);
211 u64 uamor_pkey_bits
= (uamor
& pkey_bits
);
214 * Both the bits in UAMOR corresponding to the key should be set or
217 WARN_ON(uamor_pkey_bits
&& (uamor_pkey_bits
!= pkey_bits
));
218 return !!(uamor_pkey_bits
);
221 static inline void init_amr(int pkey
, u8 init_bits
)
223 u64 new_amr_bits
= (((u64
)init_bits
& 0x3UL
) << pkeyshift(pkey
));
224 u64 old_amr
= read_amr() & ~((u64
)(0x3ul
) << pkeyshift(pkey
));
226 write_amr(old_amr
| new_amr_bits
);
229 static inline void init_iamr(int pkey
, u8 init_bits
)
231 u64 new_iamr_bits
= (((u64
)init_bits
& 0x1UL
) << pkeyshift(pkey
));
232 u64 old_iamr
= read_iamr() & ~((u64
)(0x1ul
) << pkeyshift(pkey
));
234 write_iamr(old_iamr
| new_iamr_bits
);
238 * Set the access rights in AMR IAMR and UAMOR registers for @pkey to that
239 * specified in @init_val.
241 int __arch_set_user_pkey_access(struct task_struct
*tsk
, int pkey
,
242 unsigned long init_val
)
244 u64 new_amr_bits
= 0x0ul
;
245 u64 new_iamr_bits
= 0x0ul
;
247 if (!is_pkey_enabled(pkey
))
250 if (init_val
& PKEY_DISABLE_EXECUTE
) {
251 if (!pkey_execute_disable_supported
)
253 new_iamr_bits
|= IAMR_EX_BIT
;
255 init_iamr(pkey
, new_iamr_bits
);
257 /* Set the bits we need in AMR: */
258 if (init_val
& PKEY_DISABLE_ACCESS
)
259 new_amr_bits
|= AMR_RD_BIT
| AMR_WR_BIT
;
260 else if (init_val
& PKEY_DISABLE_WRITE
)
261 new_amr_bits
|= AMR_WR_BIT
;
263 init_amr(pkey
, new_amr_bits
);
267 void thread_pkey_regs_save(struct thread_struct
*thread
)
269 if (static_branch_likely(&pkey_disabled
))
273 * TODO: Skip saving registers if @thread hasn't used any keys yet.
275 thread
->amr
= read_amr();
276 thread
->iamr
= read_iamr();
277 thread
->uamor
= read_uamor();
280 void thread_pkey_regs_restore(struct thread_struct
*new_thread
,
281 struct thread_struct
*old_thread
)
283 if (static_branch_likely(&pkey_disabled
))
286 if (old_thread
->amr
!= new_thread
->amr
)
287 write_amr(new_thread
->amr
);
288 if (old_thread
->iamr
!= new_thread
->iamr
)
289 write_iamr(new_thread
->iamr
);
290 if (old_thread
->uamor
!= new_thread
->uamor
)
291 write_uamor(new_thread
->uamor
);
294 void thread_pkey_regs_init(struct thread_struct
*thread
)
296 if (static_branch_likely(&pkey_disabled
))
299 thread
->amr
= pkey_amr_mask
;
300 thread
->iamr
= pkey_iamr_mask
;
301 thread
->uamor
= pkey_uamor_mask
;
303 write_uamor(pkey_uamor_mask
);
304 write_amr(pkey_amr_mask
);
305 write_iamr(pkey_iamr_mask
);
308 static inline bool pkey_allows_readwrite(int pkey
)
310 int pkey_shift
= pkeyshift(pkey
);
312 if (!is_pkey_enabled(pkey
))
315 return !(read_amr() & ((AMR_RD_BIT
|AMR_WR_BIT
) << pkey_shift
));
318 int __execute_only_pkey(struct mm_struct
*mm
)
320 return mm
->context
.execute_only_pkey
;
323 static inline bool vma_is_pkey_exec_only(struct vm_area_struct
*vma
)
325 /* Do this check first since the vm_flags should be hot */
326 if ((vma
->vm_flags
& (VM_READ
| VM_WRITE
| VM_EXEC
)) != VM_EXEC
)
329 return (vma_pkey(vma
) == vma
->vm_mm
->context
.execute_only_pkey
);
333 * This should only be called for *plain* mprotect calls.
335 int __arch_override_mprotect_pkey(struct vm_area_struct
*vma
, int prot
,
339 * If the currently associated pkey is execute-only, but the requested
340 * protection is not execute-only, move it back to the default pkey.
342 if (vma_is_pkey_exec_only(vma
) && (prot
!= PROT_EXEC
))
346 * The requested protection is execute-only. Hence let's use an
349 if (prot
== PROT_EXEC
) {
350 pkey
= execute_only_pkey(vma
->vm_mm
);
355 /* Nothing to override. */
356 return vma_pkey(vma
);
359 static bool pkey_access_permitted(int pkey
, bool write
, bool execute
)
364 if (!is_pkey_enabled(pkey
))
367 pkey_shift
= pkeyshift(pkey
);
368 if (execute
&& !(read_iamr() & (IAMR_EX_BIT
<< pkey_shift
)))
371 amr
= read_amr(); /* Delay reading amr until absolutely needed */
372 return ((!write
&& !(amr
& (AMR_RD_BIT
<< pkey_shift
))) ||
373 (write
&& !(amr
& (AMR_WR_BIT
<< pkey_shift
))));
376 bool arch_pte_access_permitted(u64 pte
, bool write
, bool execute
)
378 if (static_branch_likely(&pkey_disabled
))
381 return pkey_access_permitted(pte_to_pkey_bits(pte
), write
, execute
);
385 * We only want to enforce protection keys on the current thread because we
386 * effectively have no access to AMR/IAMR for other threads or any way to tell
387 * which AMR/IAMR in a threaded process we could use.
389 * So do not enforce things if the VMA is not from the current mm, or if we are
390 * in a kernel thread.
392 static inline bool vma_is_foreign(struct vm_area_struct
*vma
)
397 /* if it is not our ->mm, it has to be foreign */
398 if (current
->mm
!= vma
->vm_mm
)
404 bool arch_vma_access_permitted(struct vm_area_struct
*vma
, bool write
,
405 bool execute
, bool foreign
)
407 if (static_branch_likely(&pkey_disabled
))
410 * Do not enforce our key-permissions on a foreign vma.
412 if (foreign
|| vma_is_foreign(vma
))
415 return pkey_access_permitted(vma_pkey(vma
), write
, execute
);