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arm: Add devicetree fixup machine function
[linux/fpc-iii.git] / drivers / base / regmap / regmap.c
blob74d8c0672cf6162e9d3d28afbd68f742a5ecb732
1 /*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/device.h>
14 #include <linux/slab.h>
15 #include <linux/export.h>
16 #include <linux/mutex.h>
17 #include <linux/err.h>
18 #include <linux/rbtree.h>
19 #include <linux/sched.h>
20
21 #define CREATE_TRACE_POINTS
22 #include <trace/events/regmap.h>
23
24 #include "internal.h"
25
26 /*
27 * Sometimes for failures during very early init the trace
28 * infrastructure isn't available early enough to be used. For this
29 * sort of problem defining LOG_DEVICE will add printks for basic
30 * register I/O on a specific device.
31 */
32 #undef LOG_DEVICE
33
34 static int _regmap_update_bits(struct regmap *map, unsigned int reg,
35 unsigned int mask, unsigned int val,
36 bool *change);
37
38 static int _regmap_bus_reg_read(void *context, unsigned int reg,
39 unsigned int *val);
40 static int _regmap_bus_read(void *context, unsigned int reg,
41 unsigned int *val);
42 static int _regmap_bus_formatted_write(void *context, unsigned int reg,
43 unsigned int val);
44 static int _regmap_bus_reg_write(void *context, unsigned int reg,
45 unsigned int val);
46 static int _regmap_bus_raw_write(void *context, unsigned int reg,
47 unsigned int val);
48
49 bool regmap_reg_in_ranges(unsigned int reg,
50 const struct regmap_range *ranges,
51 unsigned int nranges)
52 {
53 const struct regmap_range *r;
54 int i;
55
56 for (i = 0, r = ranges; i < nranges; i++, r++)
57 if (regmap_reg_in_range(reg, r))
58 return true;
59 return false;
60 }
61 EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
62
63 bool regmap_check_range_table(struct regmap *map, unsigned int reg,
64 const struct regmap_access_table *table)
65 {
66 /* Check "no ranges" first */
67 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
68 return false;
69
70 /* In case zero "yes ranges" are supplied, any reg is OK */
71 if (!table->n_yes_ranges)
72 return true;
73
74 return regmap_reg_in_ranges(reg, table->yes_ranges,
75 table->n_yes_ranges);
76 }
77 EXPORT_SYMBOL_GPL(regmap_check_range_table);
78
79 bool regmap_writeable(struct regmap *map, unsigned int reg)
80 {
81 if (map->max_register && reg > map->max_register)
82 return false;
83
84 if (map->writeable_reg)
85 return map->writeable_reg(map->dev, reg);
86
87 if (map->wr_table)
88 return regmap_check_range_table(map, reg, map->wr_table);
89
90 return true;
91 }
92
93 bool regmap_readable(struct regmap *map, unsigned int reg)
94 {
95 if (map->max_register && reg > map->max_register)
96 return false;
97
98 if (map->format.format_write)
99 return false;
100
101 if (map->readable_reg)
102 return map->readable_reg(map->dev, reg);
103
104 if (map->rd_table)
105 return regmap_check_range_table(map, reg, map->rd_table);
106
107 return true;
108 }
109
110 bool regmap_volatile(struct regmap *map, unsigned int reg)
111 {
112 if (!regmap_readable(map, reg))
113 return false;
114
115 if (map->volatile_reg)
116 return map->volatile_reg(map->dev, reg);
117
118 if (map->volatile_table)
119 return regmap_check_range_table(map, reg, map->volatile_table);
120
121 if (map->cache_ops)
122 return false;
123 else
124 return true;
125 }
126
127 bool regmap_precious(struct regmap *map, unsigned int reg)
128 {
129 if (!regmap_readable(map, reg))
130 return false;
131
132 if (map->precious_reg)
133 return map->precious_reg(map->dev, reg);
134
135 if (map->precious_table)
136 return regmap_check_range_table(map, reg, map->precious_table);
137
138 return false;
139 }
140
141 static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
142 size_t num)
143 {
144 unsigned int i;
145
146 for (i = 0; i < num; i++)
147 if (!regmap_volatile(map, reg + i))
148 return false;
149
150 return true;
151 }
152
153 static void regmap_format_2_6_write(struct regmap *map,
154 unsigned int reg, unsigned int val)
155 {
156 u8 *out = map->work_buf;
157
158 *out = (reg << 6) | val;
159 }
160
161 static void regmap_format_4_12_write(struct regmap *map,
162 unsigned int reg, unsigned int val)
163 {
164 __be16 *out = map->work_buf;
165 *out = cpu_to_be16((reg << 12) | val);
166 }
167
168 static void regmap_format_7_9_write(struct regmap *map,
169 unsigned int reg, unsigned int val)
170 {
171 __be16 *out = map->work_buf;
172 *out = cpu_to_be16((reg << 9) | val);
173 }
174
175 static void regmap_format_10_14_write(struct regmap *map,
176 unsigned int reg, unsigned int val)
177 {
178 u8 *out = map->work_buf;
179
180 out[2] = val;
181 out[1] = (val >> 8) | (reg << 6);
182 out[0] = reg >> 2;
183 }
184
185 static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
186 {
187 u8 *b = buf;
188
189 b[0] = val << shift;
190 }
191
192 static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
193 {
194 __be16 *b = buf;
195
196 b[0] = cpu_to_be16(val << shift);
197 }
198
199 static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
200 {
201 __le16 *b = buf;
202
203 b[0] = cpu_to_le16(val << shift);
204 }
205
206 static void regmap_format_16_native(void *buf, unsigned int val,
207 unsigned int shift)
208 {
209 *(u16 *)buf = val << shift;
210 }
211
212 static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
213 {
214 u8 *b = buf;
215
216 val <<= shift;
217
218 b[0] = val >> 16;
219 b[1] = val >> 8;
220 b[2] = val;
221 }
222
223 static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
224 {
225 __be32 *b = buf;
226
227 b[0] = cpu_to_be32(val << shift);
228 }
229
230 static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
231 {
232 __le32 *b = buf;
233
234 b[0] = cpu_to_le32(val << shift);
235 }
236
237 static void regmap_format_32_native(void *buf, unsigned int val,
238 unsigned int shift)
239 {
240 *(u32 *)buf = val << shift;
241 }
242
243 static void regmap_parse_inplace_noop(void *buf)
244 {
245 }
246
247 static unsigned int regmap_parse_8(const void *buf)
248 {
249 const u8 *b = buf;
250
251 return b[0];
252 }
253
254 static unsigned int regmap_parse_16_be(const void *buf)
255 {
256 const __be16 *b = buf;
257
258 return be16_to_cpu(b[0]);
259 }
260
261 static unsigned int regmap_parse_16_le(const void *buf)
262 {
263 const __le16 *b = buf;
264
265 return le16_to_cpu(b[0]);
266 }
267
268 static void regmap_parse_16_be_inplace(void *buf)
269 {
270 __be16 *b = buf;
271
272 b[0] = be16_to_cpu(b[0]);
273 }
274
275 static void regmap_parse_16_le_inplace(void *buf)
276 {
277 __le16 *b = buf;
278
279 b[0] = le16_to_cpu(b[0]);
280 }
281
282 static unsigned int regmap_parse_16_native(const void *buf)
283 {
284 return *(u16 *)buf;
285 }
286
287 static unsigned int regmap_parse_24(const void *buf)
288 {
289 const u8 *b = buf;
290 unsigned int ret = b[2];
291 ret |= ((unsigned int)b[1]) << 8;
292 ret |= ((unsigned int)b[0]) << 16;
293
294 return ret;
295 }
296
297 static unsigned int regmap_parse_32_be(const void *buf)
298 {
299 const __be32 *b = buf;
300
301 return be32_to_cpu(b[0]);
302 }
303
304 static unsigned int regmap_parse_32_le(const void *buf)
305 {
306 const __le32 *b = buf;
307
308 return le32_to_cpu(b[0]);
309 }
310
311 static void regmap_parse_32_be_inplace(void *buf)
312 {
313 __be32 *b = buf;
314
315 b[0] = be32_to_cpu(b[0]);
316 }
317
318 static void regmap_parse_32_le_inplace(void *buf)
319 {
320 __le32 *b = buf;
321
322 b[0] = le32_to_cpu(b[0]);
323 }
324
325 static unsigned int regmap_parse_32_native(const void *buf)
326 {
327 return *(u32 *)buf;
328 }
329
330 static void regmap_lock_mutex(void *__map)
331 {
332 struct regmap *map = __map;
333 mutex_lock(&map->mutex);
334 }
335
336 static void regmap_unlock_mutex(void *__map)
337 {
338 struct regmap *map = __map;
339 mutex_unlock(&map->mutex);
340 }
341
342 static void regmap_lock_spinlock(void *__map)
343 __acquires(&map->spinlock)
344 {
345 struct regmap *map = __map;
346 unsigned long flags;
347
348 spin_lock_irqsave(&map->spinlock, flags);
349 map->spinlock_flags = flags;
350 }
351
352 static void regmap_unlock_spinlock(void *__map)
353 __releases(&map->spinlock)
354 {
355 struct regmap *map = __map;
356 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
357 }
358
359 static void dev_get_regmap_release(struct device *dev, void *res)
360 {
361 /*
362 * We don't actually have anything to do here; the goal here
363 * is not to manage the regmap but to provide a simple way to
364 * get the regmap back given a struct device.
365 */
366 }
367
368 static bool _regmap_range_add(struct regmap *map,
369 struct regmap_range_node *data)
370 {
371 struct rb_root *root = &map->range_tree;
372 struct rb_node **new = &(root->rb_node), *parent = NULL;
373
374 while (*new) {
375 struct regmap_range_node *this =
376 container_of(*new, struct regmap_range_node, node);
377
378 parent = *new;
379 if (data->range_max < this->range_min)
380 new = &((*new)->rb_left);
381 else if (data->range_min > this->range_max)
382 new = &((*new)->rb_right);
383 else
384 return false;
385 }
386
387 rb_link_node(&data->node, parent, new);
388 rb_insert_color(&data->node, root);
389
390 return true;
391 }
392
393 static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
394 unsigned int reg)
395 {
396 struct rb_node *node = map->range_tree.rb_node;
397
398 while (node) {
399 struct regmap_range_node *this =
400 container_of(node, struct regmap_range_node, node);
401
402 if (reg < this->range_min)
403 node = node->rb_left;
404 else if (reg > this->range_max)
405 node = node->rb_right;
406 else
407 return this;
408 }
409
410 return NULL;
411 }
412
413 static void regmap_range_exit(struct regmap *map)
414 {
415 struct rb_node *next;
416 struct regmap_range_node *range_node;
417
418 next = rb_first(&map->range_tree);
419 while (next) {
420 range_node = rb_entry(next, struct regmap_range_node, node);
421 next = rb_next(&range_node->node);
422 rb_erase(&range_node->node, &map->range_tree);
423 kfree(range_node);
424 }
425
426 kfree(map->selector_work_buf);
427 }
428
429 int regmap_attach_dev(struct device *dev, struct regmap *map,
430 const struct regmap_config *config)
431 {
432 struct regmap **m;
433
434 map->dev = dev;
435
436 regmap_debugfs_init(map, config->name);
437
438 /* Add a devres resource for dev_get_regmap() */
439 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
440 if (!m) {
441 regmap_debugfs_exit(map);
442 return -ENOMEM;
443 }
444 *m = map;
445 devres_add(dev, m);
446
447 return 0;
448 }
449 EXPORT_SYMBOL_GPL(regmap_attach_dev);
450
451 /**
452 * regmap_init(): Initialise register map
453 *
454 * @dev: Device that will be interacted with
455 * @bus: Bus-specific callbacks to use with device
456 * @bus_context: Data passed to bus-specific callbacks
457 * @config: Configuration for register map
458 *
459 * The return value will be an ERR_PTR() on error or a valid pointer to
460 * a struct regmap. This function should generally not be called
461 * directly, it should be called by bus-specific init functions.
462 */
463 struct regmap *regmap_init(struct device *dev,
464 const struct regmap_bus *bus,
465 void *bus_context,
466 const struct regmap_config *config)
467 {
468 struct regmap *map;
469 int ret = -EINVAL;
470 enum regmap_endian reg_endian, val_endian;
471 int i, j;
472
473 if (!config)
474 goto err;
475
476 map = kzalloc(sizeof(*map), GFP_KERNEL);
477 if (map == NULL) {
478 ret = -ENOMEM;
479 goto err;
480 }
481
482 if (config->lock && config->unlock) {
483 map->lock = config->lock;
484 map->unlock = config->unlock;
485 map->lock_arg = config->lock_arg;
486 } else {
487 if ((bus && bus->fast_io) ||
488 config->fast_io) {
489 spin_lock_init(&map->spinlock);
490 map->lock = regmap_lock_spinlock;
491 map->unlock = regmap_unlock_spinlock;
492 } else {
493 mutex_init(&map->mutex);
494 map->lock = regmap_lock_mutex;
495 map->unlock = regmap_unlock_mutex;
496 }
497 map->lock_arg = map;
498 }
499 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
500 map->format.pad_bytes = config->pad_bits / 8;
501 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
502 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
503 config->val_bits + config->pad_bits, 8);
504 map->reg_shift = config->pad_bits % 8;
505 if (config->reg_stride)
506 map->reg_stride = config->reg_stride;
507 else
508 map->reg_stride = 1;
509 map->use_single_rw = config->use_single_rw;
510 map->can_multi_write = config->can_multi_write;
511 map->dev = dev;
512 map->bus = bus;
513 map->bus_context = bus_context;
514 map->max_register = config->max_register;
515 map->wr_table = config->wr_table;
516 map->rd_table = config->rd_table;
517 map->volatile_table = config->volatile_table;
518 map->precious_table = config->precious_table;
519 map->writeable_reg = config->writeable_reg;
520 map->readable_reg = config->readable_reg;
521 map->volatile_reg = config->volatile_reg;
522 map->precious_reg = config->precious_reg;
523 map->cache_type = config->cache_type;
524 map->name = config->name;
525
526 spin_lock_init(&map->async_lock);
527 INIT_LIST_HEAD(&map->async_list);
528 INIT_LIST_HEAD(&map->async_free);
529 init_waitqueue_head(&map->async_waitq);
530
531 if (config->read_flag_mask || config->write_flag_mask) {
532 map->read_flag_mask = config->read_flag_mask;
533 map->write_flag_mask = config->write_flag_mask;
534 } else if (bus) {
535 map->read_flag_mask = bus->read_flag_mask;
536 }
537
538 if (!bus) {
539 map->reg_read = config->reg_read;
540 map->reg_write = config->reg_write;
541
542 map->defer_caching = false;
543 goto skip_format_initialization;
544 } else if (!bus->read || !bus->write) {
545 map->reg_read = _regmap_bus_reg_read;
546 map->reg_write = _regmap_bus_reg_write;
547
548 map->defer_caching = false;
549 goto skip_format_initialization;
550 } else {
551 map->reg_read = _regmap_bus_read;
552 }
553
554 reg_endian = config->reg_format_endian;
555 if (reg_endian == REGMAP_ENDIAN_DEFAULT)
556 reg_endian = bus->reg_format_endian_default;
557 if (reg_endian == REGMAP_ENDIAN_DEFAULT)
558 reg_endian = REGMAP_ENDIAN_BIG;
559
560 val_endian = config->val_format_endian;
561 if (val_endian == REGMAP_ENDIAN_DEFAULT)
562 val_endian = bus->val_format_endian_default;
563 if (val_endian == REGMAP_ENDIAN_DEFAULT)
564 val_endian = REGMAP_ENDIAN_BIG;
565
566 switch (config->reg_bits + map->reg_shift) {
567 case 2:
568 switch (config->val_bits) {
569 case 6:
570 map->format.format_write = regmap_format_2_6_write;
571 break;
572 default:
573 goto err_map;
574 }
575 break;
576
577 case 4:
578 switch (config->val_bits) {
579 case 12:
580 map->format.format_write = regmap_format_4_12_write;
581 break;
582 default:
583 goto err_map;
584 }
585 break;
586
587 case 7:
588 switch (config->val_bits) {
589 case 9:
590 map->format.format_write = regmap_format_7_9_write;
591 break;
592 default:
593 goto err_map;
594 }
595 break;
596
597 case 10:
598 switch (config->val_bits) {
599 case 14:
600 map->format.format_write = regmap_format_10_14_write;
601 break;
602 default:
603 goto err_map;
604 }
605 break;
606
607 case 8:
608 map->format.format_reg = regmap_format_8;
609 break;
610
611 case 16:
612 switch (reg_endian) {
613 case REGMAP_ENDIAN_BIG:
614 map->format.format_reg = regmap_format_16_be;
615 break;
616 case REGMAP_ENDIAN_NATIVE:
617 map->format.format_reg = regmap_format_16_native;
618 break;
619 default:
620 goto err_map;
621 }
622 break;
623
624 case 24:
625 if (reg_endian != REGMAP_ENDIAN_BIG)
626 goto err_map;
627 map->format.format_reg = regmap_format_24;
628 break;
629
630 case 32:
631 switch (reg_endian) {
632 case REGMAP_ENDIAN_BIG:
633 map->format.format_reg = regmap_format_32_be;
634 break;
635 case REGMAP_ENDIAN_NATIVE:
636 map->format.format_reg = regmap_format_32_native;
637 break;
638 default:
639 goto err_map;
640 }
641 break;
642
643 default:
644 goto err_map;
645 }
646
647 if (val_endian == REGMAP_ENDIAN_NATIVE)
648 map->format.parse_inplace = regmap_parse_inplace_noop;
649
650 switch (config->val_bits) {
651 case 8:
652 map->format.format_val = regmap_format_8;
653 map->format.parse_val = regmap_parse_8;
654 map->format.parse_inplace = regmap_parse_inplace_noop;
655 break;
656 case 16:
657 switch (val_endian) {
658 case REGMAP_ENDIAN_BIG:
659 map->format.format_val = regmap_format_16_be;
660 map->format.parse_val = regmap_parse_16_be;
661 map->format.parse_inplace = regmap_parse_16_be_inplace;
662 break;
663 case REGMAP_ENDIAN_LITTLE:
664 map->format.format_val = regmap_format_16_le;
665 map->format.parse_val = regmap_parse_16_le;
666 map->format.parse_inplace = regmap_parse_16_le_inplace;
667 break;
668 case REGMAP_ENDIAN_NATIVE:
669 map->format.format_val = regmap_format_16_native;
670 map->format.parse_val = regmap_parse_16_native;
671 break;
672 default:
673 goto err_map;
674 }
675 break;
676 case 24:
677 if (val_endian != REGMAP_ENDIAN_BIG)
678 goto err_map;
679 map->format.format_val = regmap_format_24;
680 map->format.parse_val = regmap_parse_24;
681 break;
682 case 32:
683 switch (val_endian) {
684 case REGMAP_ENDIAN_BIG:
685 map->format.format_val = regmap_format_32_be;
686 map->format.parse_val = regmap_parse_32_be;
687 map->format.parse_inplace = regmap_parse_32_be_inplace;
688 break;
689 case REGMAP_ENDIAN_LITTLE:
690 map->format.format_val = regmap_format_32_le;
691 map->format.parse_val = regmap_parse_32_le;
692 map->format.parse_inplace = regmap_parse_32_le_inplace;
693 break;
694 case REGMAP_ENDIAN_NATIVE:
695 map->format.format_val = regmap_format_32_native;
696 map->format.parse_val = regmap_parse_32_native;
697 break;
698 default:
699 goto err_map;
700 }
701 break;
702 }
703
704 if (map->format.format_write) {
705 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
706 (val_endian != REGMAP_ENDIAN_BIG))
707 goto err_map;
708 map->use_single_rw = true;
709 }
710
711 if (!map->format.format_write &&
712 !(map->format.format_reg && map->format.format_val))
713 goto err_map;
714
715 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
716 if (map->work_buf == NULL) {
717 ret = -ENOMEM;
718 goto err_map;
719 }
720
721 if (map->format.format_write) {
722 map->defer_caching = false;
723 map->reg_write = _regmap_bus_formatted_write;
724 } else if (map->format.format_val) {
725 map->defer_caching = true;
726 map->reg_write = _regmap_bus_raw_write;
727 }
728
729 skip_format_initialization:
730
731 map->range_tree = RB_ROOT;
732 for (i = 0; i < config->num_ranges; i++) {
733 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
734 struct regmap_range_node *new;
735
736 /* Sanity check */
737 if (range_cfg->range_max < range_cfg->range_min) {
738 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
739 range_cfg->range_max, range_cfg->range_min);
740 goto err_range;
741 }
742
743 if (range_cfg->range_max > map->max_register) {
744 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
745 range_cfg->range_max, map->max_register);
746 goto err_range;
747 }
748
749 if (range_cfg->selector_reg > map->max_register) {
750 dev_err(map->dev,
751 "Invalid range %d: selector out of map\n", i);
752 goto err_range;
753 }
754
755 if (range_cfg->window_len == 0) {
756 dev_err(map->dev, "Invalid range %d: window_len 0\n",
757 i);
758 goto err_range;
759 }
760
761 /* Make sure, that this register range has no selector
762 or data window within its boundary */
763 for (j = 0; j < config->num_ranges; j++) {
764 unsigned sel_reg = config->ranges[j].selector_reg;
765 unsigned win_min = config->ranges[j].window_start;
766 unsigned win_max = win_min +
767 config->ranges[j].window_len - 1;
768
769 /* Allow data window inside its own virtual range */
770 if (j == i)
771 continue;
772
773 if (range_cfg->range_min <= sel_reg &&
774 sel_reg <= range_cfg->range_max) {
775 dev_err(map->dev,
776 "Range %d: selector for %d in window\n",
777 i, j);
778 goto err_range;
779 }
780
781 if (!(win_max < range_cfg->range_min ||
782 win_min > range_cfg->range_max)) {
783 dev_err(map->dev,
784 "Range %d: window for %d in window\n",
785 i, j);
786 goto err_range;
787 }
788 }
789
790 new = kzalloc(sizeof(*new), GFP_KERNEL);
791 if (new == NULL) {
792 ret = -ENOMEM;
793 goto err_range;
794 }
795
796 new->map = map;
797 new->name = range_cfg->name;
798 new->range_min = range_cfg->range_min;
799 new->range_max = range_cfg->range_max;
800 new->selector_reg = range_cfg->selector_reg;
801 new->selector_mask = range_cfg->selector_mask;
802 new->selector_shift = range_cfg->selector_shift;
803 new->window_start = range_cfg->window_start;
804 new->window_len = range_cfg->window_len;
805
806 if (!_regmap_range_add(map, new)) {
807 dev_err(map->dev, "Failed to add range %d\n", i);
808 kfree(new);
809 goto err_range;
810 }
811
812 if (map->selector_work_buf == NULL) {
813 map->selector_work_buf =
814 kzalloc(map->format.buf_size, GFP_KERNEL);
815 if (map->selector_work_buf == NULL) {
816 ret = -ENOMEM;
817 goto err_range;
818 }
819 }
820 }
821
822 ret = regcache_init(map, config);
823 if (ret != 0)
824 goto err_range;
825
826 if (dev) {
827 ret = regmap_attach_dev(dev, map, config);
828 if (ret != 0)
829 goto err_regcache;
830 }
831
832 return map;
833
834 err_regcache:
835 regcache_exit(map);
836 err_range:
837 regmap_range_exit(map);
838 kfree(map->work_buf);
839 err_map:
840 kfree(map);
841 err:
842 return ERR_PTR(ret);
843 }
844 EXPORT_SYMBOL_GPL(regmap_init);
845
846 static void devm_regmap_release(struct device *dev, void *res)
847 {
848 regmap_exit(*(struct regmap **)res);
849 }
850
851 /**
852 * devm_regmap_init(): Initialise managed register map
853 *
854 * @dev: Device that will be interacted with
855 * @bus: Bus-specific callbacks to use with device
856 * @bus_context: Data passed to bus-specific callbacks
857 * @config: Configuration for register map
858 *
859 * The return value will be an ERR_PTR() on error or a valid pointer
860 * to a struct regmap. This function should generally not be called
861 * directly, it should be called by bus-specific init functions. The
862 * map will be automatically freed by the device management code.
863 */
864 struct regmap *devm_regmap_init(struct device *dev,
865 const struct regmap_bus *bus,
866 void *bus_context,
867 const struct regmap_config *config)
868 {
869 struct regmap **ptr, *regmap;
870
871 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
872 if (!ptr)
873 return ERR_PTR(-ENOMEM);
874
875 regmap = regmap_init(dev, bus, bus_context, config);
876 if (!IS_ERR(regmap)) {
877 *ptr = regmap;
878 devres_add(dev, ptr);
879 } else {
880 devres_free(ptr);
881 }
882
883 return regmap;
884 }
885 EXPORT_SYMBOL_GPL(devm_regmap_init);
886
887 static void regmap_field_init(struct regmap_field *rm_field,
888 struct regmap *regmap, struct reg_field reg_field)
889 {
890 int field_bits = reg_field.msb - reg_field.lsb + 1;
891 rm_field->regmap = regmap;
892 rm_field->reg = reg_field.reg;
893 rm_field->shift = reg_field.lsb;
894 rm_field->mask = ((BIT(field_bits) - 1) << reg_field.lsb);
895 rm_field->id_size = reg_field.id_size;
896 rm_field->id_offset = reg_field.id_offset;
897 }
898
899 /**
900 * devm_regmap_field_alloc(): Allocate and initialise a register field
901 * in a register map.
902 *
903 * @dev: Device that will be interacted with
904 * @regmap: regmap bank in which this register field is located.
905 * @reg_field: Register field with in the bank.
906 *
907 * The return value will be an ERR_PTR() on error or a valid pointer
908 * to a struct regmap_field. The regmap_field will be automatically freed
909 * by the device management code.
910 */
911 struct regmap_field *devm_regmap_field_alloc(struct device *dev,
912 struct regmap *regmap, struct reg_field reg_field)
913 {
914 struct regmap_field *rm_field = devm_kzalloc(dev,
915 sizeof(*rm_field), GFP_KERNEL);
916 if (!rm_field)
917 return ERR_PTR(-ENOMEM);
918
919 regmap_field_init(rm_field, regmap, reg_field);
920
921 return rm_field;
922
923 }
924 EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
925
926 /**
927 * devm_regmap_field_free(): Free register field allocated using
928 * devm_regmap_field_alloc. Usally drivers need not call this function,
929 * as the memory allocated via devm will be freed as per device-driver
930 * life-cyle.
931 *
932 * @dev: Device that will be interacted with
933 * @field: regmap field which should be freed.
934 */
935 void devm_regmap_field_free(struct device *dev,
936 struct regmap_field *field)
937 {
938 devm_kfree(dev, field);
939 }
940 EXPORT_SYMBOL_GPL(devm_regmap_field_free);
941
942 /**
943 * regmap_field_alloc(): Allocate and initialise a register field
944 * in a register map.
945 *
946 * @regmap: regmap bank in which this register field is located.
947 * @reg_field: Register field with in the bank.
948 *
949 * The return value will be an ERR_PTR() on error or a valid pointer
950 * to a struct regmap_field. The regmap_field should be freed by the
951 * user once its finished working with it using regmap_field_free().
952 */
953 struct regmap_field *regmap_field_alloc(struct regmap *regmap,
954 struct reg_field reg_field)
955 {
956 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
957
958 if (!rm_field)
959 return ERR_PTR(-ENOMEM);
960
961 regmap_field_init(rm_field, regmap, reg_field);
962
963 return rm_field;
964 }
965 EXPORT_SYMBOL_GPL(regmap_field_alloc);
966
967 /**
968 * regmap_field_free(): Free register field allocated using regmap_field_alloc
969 *
970 * @field: regmap field which should be freed.
971 */
972 void regmap_field_free(struct regmap_field *field)
973 {
974 kfree(field);
975 }
976 EXPORT_SYMBOL_GPL(regmap_field_free);
977
978 /**
979 * regmap_reinit_cache(): Reinitialise the current register cache
980 *
981 * @map: Register map to operate on.
982 * @config: New configuration. Only the cache data will be used.
983 *
984 * Discard any existing register cache for the map and initialize a
985 * new cache. This can be used to restore the cache to defaults or to
986 * update the cache configuration to reflect runtime discovery of the
987 * hardware.
988 *
989 * No explicit locking is done here, the user needs to ensure that
990 * this function will not race with other calls to regmap.
991 */
992 int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
993 {
994 regcache_exit(map);
995 regmap_debugfs_exit(map);
996
997 map->max_register = config->max_register;
998 map->writeable_reg = config->writeable_reg;
999 map->readable_reg = config->readable_reg;
1000 map->volatile_reg = config->volatile_reg;
1001 map->precious_reg = config->precious_reg;
1002 map->cache_type = config->cache_type;
1003
1004 regmap_debugfs_init(map, config->name);
1005
1006 map->cache_bypass = false;
1007 map->cache_only = false;
1008
1009 return regcache_init(map, config);
1010 }
1011 EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1012
1013 /**
1014 * regmap_exit(): Free a previously allocated register map
1015 */
1016 void regmap_exit(struct regmap *map)
1017 {
1018 struct regmap_async *async;
1019
1020 regcache_exit(map);
1021 regmap_debugfs_exit(map);
1022 regmap_range_exit(map);
1023 if (map->bus && map->bus->free_context)
1024 map->bus->free_context(map->bus_context);
1025 kfree(map->work_buf);
1026 while (!list_empty(&map->async_free)) {
1027 async = list_first_entry_or_null(&map->async_free,
1028 struct regmap_async,
1029 list);
1030 list_del(&async->list);
1031 kfree(async->work_buf);
1032 kfree(async);
1033 }
1034 kfree(map);
1035 }
1036 EXPORT_SYMBOL_GPL(regmap_exit);
1037
1038 static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1039 {
1040 struct regmap **r = res;
1041 if (!r || !*r) {
1042 WARN_ON(!r || !*r);
1043 return 0;
1044 }
1045
1046 /* If the user didn't specify a name match any */
1047 if (data)
1048 return (*r)->name == data;
1049 else
1050 return 1;
1051 }
1052
1053 /**
1054 * dev_get_regmap(): Obtain the regmap (if any) for a device
1055 *
1056 * @dev: Device to retrieve the map for
1057 * @name: Optional name for the register map, usually NULL.
1058 *
1059 * Returns the regmap for the device if one is present, or NULL. If
1060 * name is specified then it must match the name specified when
1061 * registering the device, if it is NULL then the first regmap found
1062 * will be used. Devices with multiple register maps are very rare,
1063 * generic code should normally not need to specify a name.
1064 */
1065 struct regmap *dev_get_regmap(struct device *dev, const char *name)
1066 {
1067 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1068 dev_get_regmap_match, (void *)name);
1069
1070 if (!r)
1071 return NULL;
1072 return *r;
1073 }
1074 EXPORT_SYMBOL_GPL(dev_get_regmap);
1075
1076 static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1077 struct regmap_range_node *range,
1078 unsigned int val_num)
1079 {
1080 void *orig_work_buf;
1081 unsigned int win_offset;
1082 unsigned int win_page;
1083 bool page_chg;
1084 int ret;
1085
1086 win_offset = (*reg - range->range_min) % range->window_len;
1087 win_page = (*reg - range->range_min) / range->window_len;
1088
1089 if (val_num > 1) {
1090 /* Bulk write shouldn't cross range boundary */
1091 if (*reg + val_num - 1 > range->range_max)
1092 return -EINVAL;
1093
1094 /* ... or single page boundary */
1095 if (val_num > range->window_len - win_offset)
1096 return -EINVAL;
1097 }
1098
1099 /* It is possible to have selector register inside data window.
1100 In that case, selector register is located on every page and
1101 it needs no page switching, when accessed alone. */
1102 if (val_num > 1 ||
1103 range->window_start + win_offset != range->selector_reg) {
1104 /* Use separate work_buf during page switching */
1105 orig_work_buf = map->work_buf;
1106 map->work_buf = map->selector_work_buf;
1107
1108 ret = _regmap_update_bits(map, range->selector_reg,
1109 range->selector_mask,
1110 win_page << range->selector_shift,
1111 &page_chg);
1112
1113 map->work_buf = orig_work_buf;
1114
1115 if (ret != 0)
1116 return ret;
1117 }
1118
1119 *reg = range->window_start + win_offset;
1120
1121 return 0;
1122 }
1123
1124 int _regmap_raw_write(struct regmap *map, unsigned int reg,
1125 const void *val, size_t val_len)
1126 {
1127 struct regmap_range_node *range;
1128 unsigned long flags;
1129 u8 *u8 = map->work_buf;
1130 void *work_val = map->work_buf + map->format.reg_bytes +
1131 map->format.pad_bytes;
1132 void *buf;
1133 int ret = -ENOTSUPP;
1134 size_t len;
1135 int i;
1136
1137 WARN_ON(!map->bus);
1138
1139 /* Check for unwritable registers before we start */
1140 if (map->writeable_reg)
1141 for (i = 0; i < val_len / map->format.val_bytes; i++)
1142 if (!map->writeable_reg(map->dev,
1143 reg + (i * map->reg_stride)))
1144 return -EINVAL;
1145
1146 if (!map->cache_bypass && map->format.parse_val) {
1147 unsigned int ival;
1148 int val_bytes = map->format.val_bytes;
1149 for (i = 0; i < val_len / val_bytes; i++) {
1150 ival = map->format.parse_val(val + (i * val_bytes));
1151 ret = regcache_write(map, reg + (i * map->reg_stride),
1152 ival);
1153 if (ret) {
1154 dev_err(map->dev,
1155 "Error in caching of register: %x ret: %d\n",
1156 reg + i, ret);
1157 return ret;
1158 }
1159 }
1160 if (map->cache_only) {
1161 map->cache_dirty = true;
1162 return 0;
1163 }
1164 }
1165
1166 range = _regmap_range_lookup(map, reg);
1167 if (range) {
1168 int val_num = val_len / map->format.val_bytes;
1169 int win_offset = (reg - range->range_min) % range->window_len;
1170 int win_residue = range->window_len - win_offset;
1171
1172 /* If the write goes beyond the end of the window split it */
1173 while (val_num > win_residue) {
1174 dev_dbg(map->dev, "Writing window %d/%zu\n",
1175 win_residue, val_len / map->format.val_bytes);
1176 ret = _regmap_raw_write(map, reg, val, win_residue *
1177 map->format.val_bytes);
1178 if (ret != 0)
1179 return ret;
1180
1181 reg += win_residue;
1182 val_num -= win_residue;
1183 val += win_residue * map->format.val_bytes;
1184 val_len -= win_residue * map->format.val_bytes;
1185
1186 win_offset = (reg - range->range_min) %
1187 range->window_len;
1188 win_residue = range->window_len - win_offset;
1189 }
1190
1191 ret = _regmap_select_page(map, &reg, range, val_num);
1192 if (ret != 0)
1193 return ret;
1194 }
1195
1196 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1197
1198 u8[0] |= map->write_flag_mask;
1199
1200 /*
1201 * Essentially all I/O mechanisms will be faster with a single
1202 * buffer to write. Since register syncs often generate raw
1203 * writes of single registers optimise that case.
1204 */
1205 if (val != work_val && val_len == map->format.val_bytes) {
1206 memcpy(work_val, val, map->format.val_bytes);
1207 val = work_val;
1208 }
1209
1210 if (map->async && map->bus->async_write) {
1211 struct regmap_async *async;
1212
1213 trace_regmap_async_write_start(map->dev, reg, val_len);
1214
1215 spin_lock_irqsave(&map->async_lock, flags);
1216 async = list_first_entry_or_null(&map->async_free,
1217 struct regmap_async,
1218 list);
1219 if (async)
1220 list_del(&async->list);
1221 spin_unlock_irqrestore(&map->async_lock, flags);
1222
1223 if (!async) {
1224 async = map->bus->async_alloc();
1225 if (!async)
1226 return -ENOMEM;
1227
1228 async->work_buf = kzalloc(map->format.buf_size,
1229 GFP_KERNEL | GFP_DMA);
1230 if (!async->work_buf) {
1231 kfree(async);
1232 return -ENOMEM;
1233 }
1234 }
1235
1236 async->map = map;
1237
1238 /* If the caller supplied the value we can use it safely. */
1239 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1240 map->format.reg_bytes + map->format.val_bytes);
1241
1242 spin_lock_irqsave(&map->async_lock, flags);
1243 list_add_tail(&async->list, &map->async_list);
1244 spin_unlock_irqrestore(&map->async_lock, flags);
1245
1246 if (val != work_val)
1247 ret = map->bus->async_write(map->bus_context,
1248 async->work_buf,
1249 map->format.reg_bytes +
1250 map->format.pad_bytes,
1251 val, val_len, async);
1252 else
1253 ret = map->bus->async_write(map->bus_context,
1254 async->work_buf,
1255 map->format.reg_bytes +
1256 map->format.pad_bytes +
1257 val_len, NULL, 0, async);
1258
1259 if (ret != 0) {
1260 dev_err(map->dev, "Failed to schedule write: %d\n",
1261 ret);
1262
1263 spin_lock_irqsave(&map->async_lock, flags);
1264 list_move(&async->list, &map->async_free);
1265 spin_unlock_irqrestore(&map->async_lock, flags);
1266 }
1267
1268 return ret;
1269 }
1270
1271 trace_regmap_hw_write_start(map->dev, reg,
1272 val_len / map->format.val_bytes);
1273
1274 /* If we're doing a single register write we can probably just
1275 * send the work_buf directly, otherwise try to do a gather
1276 * write.
1277 */
1278 if (val == work_val)
1279 ret = map->bus->write(map->bus_context, map->work_buf,
1280 map->format.reg_bytes +
1281 map->format.pad_bytes +
1282 val_len);
1283 else if (map->bus->gather_write)
1284 ret = map->bus->gather_write(map->bus_context, map->work_buf,
1285 map->format.reg_bytes +
1286 map->format.pad_bytes,
1287 val, val_len);
1288
1289 /* If that didn't work fall back on linearising by hand. */
1290 if (ret == -ENOTSUPP) {
1291 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1292 buf = kzalloc(len, GFP_KERNEL);
1293 if (!buf)
1294 return -ENOMEM;
1295
1296 memcpy(buf, map->work_buf, map->format.reg_bytes);
1297 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1298 val, val_len);
1299 ret = map->bus->write(map->bus_context, buf, len);
1300
1301 kfree(buf);
1302 }
1303
1304 trace_regmap_hw_write_done(map->dev, reg,
1305 val_len / map->format.val_bytes);
1306
1307 return ret;
1308 }
1309
1310 /**
1311 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1312 *
1313 * @map: Map to check.
1314 */
1315 bool regmap_can_raw_write(struct regmap *map)
1316 {
1317 return map->bus && map->format.format_val && map->format.format_reg;
1318 }
1319 EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1320
1321 static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1322 unsigned int val)
1323 {
1324 int ret;
1325 struct regmap_range_node *range;
1326 struct regmap *map = context;
1327
1328 WARN_ON(!map->bus || !map->format.format_write);
1329
1330 range = _regmap_range_lookup(map, reg);
1331 if (range) {
1332 ret = _regmap_select_page(map, &reg, range, 1);
1333 if (ret != 0)
1334 return ret;
1335 }
1336
1337 map->format.format_write(map, reg, val);
1338
1339 trace_regmap_hw_write_start(map->dev, reg, 1);
1340
1341 ret = map->bus->write(map->bus_context, map->work_buf,
1342 map->format.buf_size);
1343
1344 trace_regmap_hw_write_done(map->dev, reg, 1);
1345
1346 return ret;
1347 }
1348
1349 static int _regmap_bus_reg_write(void *context, unsigned int reg,
1350 unsigned int val)
1351 {
1352 struct regmap *map = context;
1353
1354 return map->bus->reg_write(map->bus_context, reg, val);
1355 }
1356
1357 static int _regmap_bus_raw_write(void *context, unsigned int reg,
1358 unsigned int val)
1359 {
1360 struct regmap *map = context;
1361
1362 WARN_ON(!map->bus || !map->format.format_val);
1363
1364 map->format.format_val(map->work_buf + map->format.reg_bytes
1365 + map->format.pad_bytes, val, 0);
1366 return _regmap_raw_write(map, reg,
1367 map->work_buf +
1368 map->format.reg_bytes +
1369 map->format.pad_bytes,
1370 map->format.val_bytes);
1371 }
1372
1373 static inline void *_regmap_map_get_context(struct regmap *map)
1374 {
1375 return (map->bus) ? map : map->bus_context;
1376 }
1377
1378 int _regmap_write(struct regmap *map, unsigned int reg,
1379 unsigned int val)
1380 {
1381 int ret;
1382 void *context = _regmap_map_get_context(map);
1383
1384 if (!regmap_writeable(map, reg))
1385 return -EIO;
1386
1387 if (!map->cache_bypass && !map->defer_caching) {
1388 ret = regcache_write(map, reg, val);
1389 if (ret != 0)
1390 return ret;
1391 if (map->cache_only) {
1392 map->cache_dirty = true;
1393 return 0;
1394 }
1395 }
1396
1397 #ifdef LOG_DEVICE
1398 if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1399 dev_info(map->dev, "%x <= %x\n", reg, val);
1400 #endif
1401
1402 trace_regmap_reg_write(map->dev, reg, val);
1403
1404 return map->reg_write(context, reg, val);
1405 }
1406
1407 /**
1408 * regmap_write(): Write a value to a single register
1409 *
1410 * @map: Register map to write to
1411 * @reg: Register to write to
1412 * @val: Value to be written
1413 *
1414 * A value of zero will be returned on success, a negative errno will
1415 * be returned in error cases.
1416 */
1417 int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1418 {
1419 int ret;
1420
1421 if (reg % map->reg_stride)
1422 return -EINVAL;
1423
1424 map->lock(map->lock_arg);
1425
1426 ret = _regmap_write(map, reg, val);
1427
1428 map->unlock(map->lock_arg);
1429
1430 return ret;
1431 }
1432 EXPORT_SYMBOL_GPL(regmap_write);
1433
1434 /**
1435 * regmap_write_async(): Write a value to a single register asynchronously
1436 *
1437 * @map: Register map to write to
1438 * @reg: Register to write to
1439 * @val: Value to be written
1440 *
1441 * A value of zero will be returned on success, a negative errno will
1442 * be returned in error cases.
1443 */
1444 int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1445 {
1446 int ret;
1447
1448 if (reg % map->reg_stride)
1449 return -EINVAL;
1450
1451 map->lock(map->lock_arg);
1452
1453 map->async = true;
1454
1455 ret = _regmap_write(map, reg, val);
1456
1457 map->async = false;
1458
1459 map->unlock(map->lock_arg);
1460
1461 return ret;
1462 }
1463 EXPORT_SYMBOL_GPL(regmap_write_async);
1464
1465 /**
1466 * regmap_raw_write(): Write raw values to one or more registers
1467 *
1468 * @map: Register map to write to
1469 * @reg: Initial register to write to
1470 * @val: Block of data to be written, laid out for direct transmission to the
1471 * device
1472 * @val_len: Length of data pointed to by val.
1473 *
1474 * This function is intended to be used for things like firmware
1475 * download where a large block of data needs to be transferred to the
1476 * device. No formatting will be done on the data provided.
1477 *
1478 * A value of zero will be returned on success, a negative errno will
1479 * be returned in error cases.
1480 */
1481 int regmap_raw_write(struct regmap *map, unsigned int reg,
1482 const void *val, size_t val_len)
1483 {
1484 int ret;
1485
1486 if (!regmap_can_raw_write(map))
1487 return -EINVAL;
1488 if (val_len % map->format.val_bytes)
1489 return -EINVAL;
1490
1491 map->lock(map->lock_arg);
1492
1493 ret = _regmap_raw_write(map, reg, val, val_len);
1494
1495 map->unlock(map->lock_arg);
1496
1497 return ret;
1498 }
1499 EXPORT_SYMBOL_GPL(regmap_raw_write);
1500
1501 /**
1502 * regmap_field_write(): Write a value to a single register field
1503 *
1504 * @field: Register field to write to
1505 * @val: Value to be written
1506 *
1507 * A value of zero will be returned on success, a negative errno will
1508 * be returned in error cases.
1509 */
1510 int regmap_field_write(struct regmap_field *field, unsigned int val)
1511 {
1512 return regmap_update_bits(field->regmap, field->reg,
1513 field->mask, val << field->shift);
1514 }
1515 EXPORT_SYMBOL_GPL(regmap_field_write);
1516
1517 /**
1518 * regmap_field_update_bits(): Perform a read/modify/write cycle
1519 * on the register field
1520 *
1521 * @field: Register field to write to
1522 * @mask: Bitmask to change
1523 * @val: Value to be written
1524 *
1525 * A value of zero will be returned on success, a negative errno will
1526 * be returned in error cases.
1527 */
1528 int regmap_field_update_bits(struct regmap_field *field, unsigned int mask, unsigned int val)
1529 {
1530 mask = (mask << field->shift) & field->mask;
1531
1532 return regmap_update_bits(field->regmap, field->reg,
1533 mask, val << field->shift);
1534 }
1535 EXPORT_SYMBOL_GPL(regmap_field_update_bits);
1536
1537 /**
1538 * regmap_fields_write(): Write a value to a single register field with port ID
1539 *
1540 * @field: Register field to write to
1541 * @id: port ID
1542 * @val: Value to be written
1543 *
1544 * A value of zero will be returned on success, a negative errno will
1545 * be returned in error cases.
1546 */
1547 int regmap_fields_write(struct regmap_field *field, unsigned int id,
1548 unsigned int val)
1549 {
1550 if (id >= field->id_size)
1551 return -EINVAL;
1552
1553 return regmap_update_bits(field->regmap,
1554 field->reg + (field->id_offset * id),
1555 field->mask, val << field->shift);
1556 }
1557 EXPORT_SYMBOL_GPL(regmap_fields_write);
1558
1559 /**
1560 * regmap_fields_update_bits(): Perform a read/modify/write cycle
1561 * on the register field
1562 *
1563 * @field: Register field to write to
1564 * @id: port ID
1565 * @mask: Bitmask to change
1566 * @val: Value to be written
1567 *
1568 * A value of zero will be returned on success, a negative errno will
1569 * be returned in error cases.
1570 */
1571 int regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1572 unsigned int mask, unsigned int val)
1573 {
1574 if (id >= field->id_size)
1575 return -EINVAL;
1576
1577 mask = (mask << field->shift) & field->mask;
1578
1579 return regmap_update_bits(field->regmap,
1580 field->reg + (field->id_offset * id),
1581 mask, val << field->shift);
1582 }
1583 EXPORT_SYMBOL_GPL(regmap_fields_update_bits);
1584
1585 /*
1586 * regmap_bulk_write(): Write multiple registers to the device
1587 *
1588 * @map: Register map to write to
1589 * @reg: First register to be write from
1590 * @val: Block of data to be written, in native register size for device
1591 * @val_count: Number of registers to write
1592 *
1593 * This function is intended to be used for writing a large block of
1594 * data to the device either in single transfer or multiple transfer.
1595 *
1596 * A value of zero will be returned on success, a negative errno will
1597 * be returned in error cases.
1598 */
1599 int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1600 size_t val_count)
1601 {
1602 int ret = 0, i;
1603 size_t val_bytes = map->format.val_bytes;
1604
1605 if (map->bus && !map->format.parse_inplace)
1606 return -EINVAL;
1607 if (reg % map->reg_stride)
1608 return -EINVAL;
1609
1610 /*
1611 * Some devices don't support bulk write, for
1612 * them we have a series of single write operations.
1613 */
1614 if (!map->bus || map->use_single_rw) {
1615 map->lock(map->lock_arg);
1616 for (i = 0; i < val_count; i++) {
1617 unsigned int ival;
1618
1619 switch (val_bytes) {
1620 case 1:
1621 ival = *(u8 *)(val + (i * val_bytes));
1622 break;
1623 case 2:
1624 ival = *(u16 *)(val + (i * val_bytes));
1625 break;
1626 case 4:
1627 ival = *(u32 *)(val + (i * val_bytes));
1628 break;
1629 #ifdef CONFIG_64BIT
1630 case 8:
1631 ival = *(u64 *)(val + (i * val_bytes));
1632 break;
1633 #endif
1634 default:
1635 ret = -EINVAL;
1636 goto out;
1637 }
1638
1639 ret = _regmap_write(map, reg + (i * map->reg_stride),
1640 ival);
1641 if (ret != 0)
1642 goto out;
1643 }
1644 out:
1645 map->unlock(map->lock_arg);
1646 } else {
1647 void *wval;
1648
1649 wval = kmemdup(val, val_count * val_bytes, GFP_KERNEL);
1650 if (!wval) {
1651 dev_err(map->dev, "Error in memory allocation\n");
1652 return -ENOMEM;
1653 }
1654 for (i = 0; i < val_count * val_bytes; i += val_bytes)
1655 map->format.parse_inplace(wval + i);
1656
1657 map->lock(map->lock_arg);
1658 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);
1659 map->unlock(map->lock_arg);
1660
1661 kfree(wval);
1662 }
1663 return ret;
1664 }
1665 EXPORT_SYMBOL_GPL(regmap_bulk_write);
1666
1667 /*
1668 * _regmap_raw_multi_reg_write()
1669 *
1670 * the (register,newvalue) pairs in regs have not been formatted, but
1671 * they are all in the same page and have been changed to being page
1672 * relative. The page register has been written if that was neccessary.
1673 */
1674 static int _regmap_raw_multi_reg_write(struct regmap *map,
1675 const struct reg_default *regs,
1676 size_t num_regs)
1677 {
1678 int ret;
1679 void *buf;
1680 int i;
1681 u8 *u8;
1682 size_t val_bytes = map->format.val_bytes;
1683 size_t reg_bytes = map->format.reg_bytes;
1684 size_t pad_bytes = map->format.pad_bytes;
1685 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
1686 size_t len = pair_size * num_regs;
1687
1688 if (!len)
1689 return -EINVAL;
1690
1691 buf = kzalloc(len, GFP_KERNEL);
1692 if (!buf)
1693 return -ENOMEM;
1694
1695 /* We have to linearise by hand. */
1696
1697 u8 = buf;
1698
1699 for (i = 0; i < num_regs; i++) {
1700 int reg = regs[i].reg;
1701 int val = regs[i].def;
1702 trace_regmap_hw_write_start(map->dev, reg, 1);
1703 map->format.format_reg(u8, reg, map->reg_shift);
1704 u8 += reg_bytes + pad_bytes;
1705 map->format.format_val(u8, val, 0);
1706 u8 += val_bytes;
1707 }
1708 u8 = buf;
1709 *u8 |= map->write_flag_mask;
1710
1711 ret = map->bus->write(map->bus_context, buf, len);
1712
1713 kfree(buf);
1714
1715 for (i = 0; i < num_regs; i++) {
1716 int reg = regs[i].reg;
1717 trace_regmap_hw_write_done(map->dev, reg, 1);
1718 }
1719 return ret;
1720 }
1721
1722 static unsigned int _regmap_register_page(struct regmap *map,
1723 unsigned int reg,
1724 struct regmap_range_node *range)
1725 {
1726 unsigned int win_page = (reg - range->range_min) / range->window_len;
1727
1728 return win_page;
1729 }
1730
1731 static int _regmap_range_multi_paged_reg_write(struct regmap *map,
1732 struct reg_default *regs,
1733 size_t num_regs)
1734 {
1735 int ret;
1736 int i, n;
1737 struct reg_default *base;
1738 unsigned int this_page = 0;
1739 /*
1740 * the set of registers are not neccessarily in order, but
1741 * since the order of write must be preserved this algorithm
1742 * chops the set each time the page changes
1743 */
1744 base = regs;
1745 for (i = 0, n = 0; i < num_regs; i++, n++) {
1746 unsigned int reg = regs[i].reg;
1747 struct regmap_range_node *range;
1748
1749 range = _regmap_range_lookup(map, reg);
1750 if (range) {
1751 unsigned int win_page = _regmap_register_page(map, reg,
1752 range);
1753
1754 if (i == 0)
1755 this_page = win_page;
1756 if (win_page != this_page) {
1757 this_page = win_page;
1758 ret = _regmap_raw_multi_reg_write(map, base, n);
1759 if (ret != 0)
1760 return ret;
1761 base += n;
1762 n = 0;
1763 }
1764 ret = _regmap_select_page(map, &base[n].reg, range, 1);
1765 if (ret != 0)
1766 return ret;
1767 }
1768 }
1769 if (n > 0)
1770 return _regmap_raw_multi_reg_write(map, base, n);
1771 return 0;
1772 }
1773
1774 static int _regmap_multi_reg_write(struct regmap *map,
1775 const struct reg_default *regs,
1776 size_t num_regs)
1777 {
1778 int i;
1779 int ret;
1780
1781 if (!map->can_multi_write) {
1782 for (i = 0; i < num_regs; i++) {
1783 ret = _regmap_write(map, regs[i].reg, regs[i].def);
1784 if (ret != 0)
1785 return ret;
1786 }
1787 return 0;
1788 }
1789
1790 if (!map->format.parse_inplace)
1791 return -EINVAL;
1792
1793 if (map->writeable_reg)
1794 for (i = 0; i < num_regs; i++) {
1795 int reg = regs[i].reg;
1796 if (!map->writeable_reg(map->dev, reg))
1797 return -EINVAL;
1798 if (reg % map->reg_stride)
1799 return -EINVAL;
1800 }
1801
1802 if (!map->cache_bypass) {
1803 for (i = 0; i < num_regs; i++) {
1804 unsigned int val = regs[i].def;
1805 unsigned int reg = regs[i].reg;
1806 ret = regcache_write(map, reg, val);
1807 if (ret) {
1808 dev_err(map->dev,
1809 "Error in caching of register: %x ret: %d\n",
1810 reg, ret);
1811 return ret;
1812 }
1813 }
1814 if (map->cache_only) {
1815 map->cache_dirty = true;
1816 return 0;
1817 }
1818 }
1819
1820 WARN_ON(!map->bus);
1821
1822 for (i = 0; i < num_regs; i++) {
1823 unsigned int reg = regs[i].reg;
1824 struct regmap_range_node *range;
1825 range = _regmap_range_lookup(map, reg);
1826 if (range) {
1827 size_t len = sizeof(struct reg_default)*num_regs;
1828 struct reg_default *base = kmemdup(regs, len,
1829 GFP_KERNEL);
1830 if (!base)
1831 return -ENOMEM;
1832 ret = _regmap_range_multi_paged_reg_write(map, base,
1833 num_regs);
1834 kfree(base);
1835
1836 return ret;
1837 }
1838 }
1839 return _regmap_raw_multi_reg_write(map, regs, num_regs);
1840 }
1841
1842 /*
1843 * regmap_multi_reg_write(): Write multiple registers to the device
1844 *
1845 * where the set of register,value pairs are supplied in any order,
1846 * possibly not all in a single range.
1847 *
1848 * @map: Register map to write to
1849 * @regs: Array of structures containing register,value to be written
1850 * @num_regs: Number of registers to write
1851 *
1852 * The 'normal' block write mode will send ultimately send data on the
1853 * target bus as R,V1,V2,V3,..,Vn where successively higer registers are
1854 * addressed. However, this alternative block multi write mode will send
1855 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
1856 * must of course support the mode.
1857 *
1858 * A value of zero will be returned on success, a negative errno will be
1859 * returned in error cases.
1860 */
1861 int regmap_multi_reg_write(struct regmap *map, const struct reg_default *regs,
1862 int num_regs)
1863 {
1864 int ret;
1865
1866 map->lock(map->lock_arg);
1867
1868 ret = _regmap_multi_reg_write(map, regs, num_regs);
1869
1870 map->unlock(map->lock_arg);
1871
1872 return ret;
1873 }
1874 EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
1875
1876 /*
1877 * regmap_multi_reg_write_bypassed(): Write multiple registers to the
1878 * device but not the cache
1879 *
1880 * where the set of register are supplied in any order
1881 *
1882 * @map: Register map to write to
1883 * @regs: Array of structures containing register,value to be written
1884 * @num_regs: Number of registers to write
1885 *
1886 * This function is intended to be used for writing a large block of data
1887 * atomically to the device in single transfer for those I2C client devices
1888 * that implement this alternative block write mode.
1889 *
1890 * A value of zero will be returned on success, a negative errno will
1891 * be returned in error cases.
1892 */
1893 int regmap_multi_reg_write_bypassed(struct regmap *map,
1894 const struct reg_default *regs,
1895 int num_regs)
1896 {
1897 int ret;
1898 bool bypass;
1899
1900 map->lock(map->lock_arg);
1901
1902 bypass = map->cache_bypass;
1903 map->cache_bypass = true;
1904
1905 ret = _regmap_multi_reg_write(map, regs, num_regs);
1906
1907 map->cache_bypass = bypass;
1908
1909 map->unlock(map->lock_arg);
1910
1911 return ret;
1912 }
1913 EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
1914
1915 /**
1916 * regmap_raw_write_async(): Write raw values to one or more registers
1917 * asynchronously
1918 *
1919 * @map: Register map to write to
1920 * @reg: Initial register to write to
1921 * @val: Block of data to be written, laid out for direct transmission to the
1922 * device. Must be valid until regmap_async_complete() is called.
1923 * @val_len: Length of data pointed to by val.
1924 *
1925 * This function is intended to be used for things like firmware
1926 * download where a large block of data needs to be transferred to the
1927 * device. No formatting will be done on the data provided.
1928 *
1929 * If supported by the underlying bus the write will be scheduled
1930 * asynchronously, helping maximise I/O speed on higher speed buses
1931 * like SPI. regmap_async_complete() can be called to ensure that all
1932 * asynchrnous writes have been completed.
1933 *
1934 * A value of zero will be returned on success, a negative errno will
1935 * be returned in error cases.
1936 */
1937 int regmap_raw_write_async(struct regmap *map, unsigned int reg,
1938 const void *val, size_t val_len)
1939 {
1940 int ret;
1941
1942 if (val_len % map->format.val_bytes)
1943 return -EINVAL;
1944 if (reg % map->reg_stride)
1945 return -EINVAL;
1946
1947 map->lock(map->lock_arg);
1948
1949 map->async = true;
1950
1951 ret = _regmap_raw_write(map, reg, val, val_len);
1952
1953 map->async = false;
1954
1955 map->unlock(map->lock_arg);
1956
1957 return ret;
1958 }
1959 EXPORT_SYMBOL_GPL(regmap_raw_write_async);
1960
1961 static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
1962 unsigned int val_len)
1963 {
1964 struct regmap_range_node *range;
1965 u8 *u8 = map->work_buf;
1966 int ret;
1967
1968 WARN_ON(!map->bus);
1969
1970 range = _regmap_range_lookup(map, reg);
1971 if (range) {
1972 ret = _regmap_select_page(map, &reg, range,
1973 val_len / map->format.val_bytes);
1974 if (ret != 0)
1975 return ret;
1976 }
1977
1978 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1979
1980 /*
1981 * Some buses or devices flag reads by setting the high bits in the
1982 * register addresss; since it's always the high bits for all
1983 * current formats we can do this here rather than in
1984 * formatting. This may break if we get interesting formats.
1985 */
1986 u8[0] |= map->read_flag_mask;
1987
1988 trace_regmap_hw_read_start(map->dev, reg,
1989 val_len / map->format.val_bytes);
1990
1991 ret = map->bus->read(map->bus_context, map->work_buf,
1992 map->format.reg_bytes + map->format.pad_bytes,
1993 val, val_len);
1994
1995 trace_regmap_hw_read_done(map->dev, reg,
1996 val_len / map->format.val_bytes);
1997
1998 return ret;
1999 }
2000
2001 static int _regmap_bus_reg_read(void *context, unsigned int reg,
2002 unsigned int *val)
2003 {
2004 struct regmap *map = context;
2005
2006 return map->bus->reg_read(map->bus_context, reg, val);
2007 }
2008
2009 static int _regmap_bus_read(void *context, unsigned int reg,
2010 unsigned int *val)
2011 {
2012 int ret;
2013 struct regmap *map = context;
2014
2015 if (!map->format.parse_val)
2016 return -EINVAL;
2017
2018 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
2019 if (ret == 0)
2020 *val = map->format.parse_val(map->work_buf);
2021
2022 return ret;
2023 }
2024
2025 static int _regmap_read(struct regmap *map, unsigned int reg,
2026 unsigned int *val)
2027 {
2028 int ret;
2029 void *context = _regmap_map_get_context(map);
2030
2031 WARN_ON(!map->reg_read);
2032
2033 if (!map->cache_bypass) {
2034 ret = regcache_read(map, reg, val);
2035 if (ret == 0)
2036 return 0;
2037 }
2038
2039 if (map->cache_only)
2040 return -EBUSY;
2041
2042 if (!regmap_readable(map, reg))
2043 return -EIO;
2044
2045 ret = map->reg_read(context, reg, val);
2046 if (ret == 0) {
2047 #ifdef LOG_DEVICE
2048 if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
2049 dev_info(map->dev, "%x => %x\n", reg, *val);
2050 #endif
2051
2052 trace_regmap_reg_read(map->dev, reg, *val);
2053
2054 if (!map->cache_bypass)
2055 regcache_write(map, reg, *val);
2056 }
2057
2058 return ret;
2059 }
2060
2061 /**
2062 * regmap_read(): Read a value from a single register
2063 *
2064 * @map: Register map to read from
2065 * @reg: Register to be read from
2066 * @val: Pointer to store read value
2067 *
2068 * A value of zero will be returned on success, a negative errno will
2069 * be returned in error cases.
2070 */
2071 int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2072 {
2073 int ret;
2074
2075 if (reg % map->reg_stride)
2076 return -EINVAL;
2077
2078 map->lock(map->lock_arg);
2079
2080 ret = _regmap_read(map, reg, val);
2081
2082 map->unlock(map->lock_arg);
2083
2084 return ret;
2085 }
2086 EXPORT_SYMBOL_GPL(regmap_read);
2087
2088 /**
2089 * regmap_raw_read(): Read raw data from the device
2090 *
2091 * @map: Register map to read from
2092 * @reg: First register to be read from
2093 * @val: Pointer to store read value
2094 * @val_len: Size of data to read
2095 *
2096 * A value of zero will be returned on success, a negative errno will
2097 * be returned in error cases.
2098 */
2099 int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2100 size_t val_len)
2101 {
2102 size_t val_bytes = map->format.val_bytes;
2103 size_t val_count = val_len / val_bytes;
2104 unsigned int v;
2105 int ret, i;
2106
2107 if (!map->bus)
2108 return -EINVAL;
2109 if (val_len % map->format.val_bytes)
2110 return -EINVAL;
2111 if (reg % map->reg_stride)
2112 return -EINVAL;
2113
2114 map->lock(map->lock_arg);
2115
2116 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2117 map->cache_type == REGCACHE_NONE) {
2118 /* Physical block read if there's no cache involved */
2119 ret = _regmap_raw_read(map, reg, val, val_len);
2120
2121 } else {
2122 /* Otherwise go word by word for the cache; should be low
2123 * cost as we expect to hit the cache.
2124 */
2125 for (i = 0; i < val_count; i++) {
2126 ret = _regmap_read(map, reg + (i * map->reg_stride),
2127 &v);
2128 if (ret != 0)
2129 goto out;
2130
2131 map->format.format_val(val + (i * val_bytes), v, 0);
2132 }
2133 }
2134
2135 out:
2136 map->unlock(map->lock_arg);
2137
2138 return ret;
2139 }
2140 EXPORT_SYMBOL_GPL(regmap_raw_read);
2141
2142 /**
2143 * regmap_field_read(): Read a value to a single register field
2144 *
2145 * @field: Register field to read from
2146 * @val: Pointer to store read value
2147 *
2148 * A value of zero will be returned on success, a negative errno will
2149 * be returned in error cases.
2150 */
2151 int regmap_field_read(struct regmap_field *field, unsigned int *val)
2152 {
2153 int ret;
2154 unsigned int reg_val;
2155 ret = regmap_read(field->regmap, field->reg, &reg_val);
2156 if (ret != 0)
2157 return ret;
2158
2159 reg_val &= field->mask;
2160 reg_val >>= field->shift;
2161 *val = reg_val;
2162
2163 return ret;
2164 }
2165 EXPORT_SYMBOL_GPL(regmap_field_read);
2166
2167 /**
2168 * regmap_fields_read(): Read a value to a single register field with port ID
2169 *
2170 * @field: Register field to read from
2171 * @id: port ID
2172 * @val: Pointer to store read value
2173 *
2174 * A value of zero will be returned on success, a negative errno will
2175 * be returned in error cases.
2176 */
2177 int regmap_fields_read(struct regmap_field *field, unsigned int id,
2178 unsigned int *val)
2179 {
2180 int ret;
2181 unsigned int reg_val;
2182
2183 if (id >= field->id_size)
2184 return -EINVAL;
2185
2186 ret = regmap_read(field->regmap,
2187 field->reg + (field->id_offset * id),
2188 &reg_val);
2189 if (ret != 0)
2190 return ret;
2191
2192 reg_val &= field->mask;
2193 reg_val >>= field->shift;
2194 *val = reg_val;
2195
2196 return ret;
2197 }
2198 EXPORT_SYMBOL_GPL(regmap_fields_read);
2199
2200 /**
2201 * regmap_bulk_read(): Read multiple registers from the device
2202 *
2203 * @map: Register map to read from
2204 * @reg: First register to be read from
2205 * @val: Pointer to store read value, in native register size for device
2206 * @val_count: Number of registers to read
2207 *
2208 * A value of zero will be returned on success, a negative errno will
2209 * be returned in error cases.
2210 */
2211 int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2212 size_t val_count)
2213 {
2214 int ret, i;
2215 size_t val_bytes = map->format.val_bytes;
2216 bool vol = regmap_volatile_range(map, reg, val_count);
2217
2218 if (reg % map->reg_stride)
2219 return -EINVAL;
2220
2221 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
2222 /*
2223 * Some devices does not support bulk read, for
2224 * them we have a series of single read operations.
2225 */
2226 if (map->use_single_rw) {
2227 for (i = 0; i < val_count; i++) {
2228 ret = regmap_raw_read(map,
2229 reg + (i * map->reg_stride),
2230 val + (i * val_bytes),
2231 val_bytes);
2232 if (ret != 0)
2233 return ret;
2234 }
2235 } else {
2236 ret = regmap_raw_read(map, reg, val,
2237 val_bytes * val_count);
2238 if (ret != 0)
2239 return ret;
2240 }
2241
2242 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2243 map->format.parse_inplace(val + i);
2244 } else {
2245 for (i = 0; i < val_count; i++) {
2246 unsigned int ival;
2247 ret = regmap_read(map, reg + (i * map->reg_stride),
2248 &ival);
2249 if (ret != 0)
2250 return ret;
2251 memcpy(val + (i * val_bytes), &ival, val_bytes);
2252 }
2253 }
2254
2255 return 0;
2256 }
2257 EXPORT_SYMBOL_GPL(regmap_bulk_read);
2258
2259 static int _regmap_update_bits(struct regmap *map, unsigned int reg,
2260 unsigned int mask, unsigned int val,
2261 bool *change)
2262 {
2263 int ret;
2264 unsigned int tmp, orig;
2265
2266 ret = _regmap_read(map, reg, &orig);
2267 if (ret != 0)
2268 return ret;
2269
2270 tmp = orig & ~mask;
2271 tmp |= val & mask;
2272
2273 if (tmp != orig) {
2274 ret = _regmap_write(map, reg, tmp);
2275 if (change)
2276 *change = true;
2277 } else {
2278 if (change)
2279 *change = false;
2280 }
2281
2282 return ret;
2283 }
2284
2285 /**
2286 * regmap_update_bits: Perform a read/modify/write cycle on the register map
2287 *
2288 * @map: Register map to update
2289 * @reg: Register to update
2290 * @mask: Bitmask to change
2291 * @val: New value for bitmask
2292 *
2293 * Returns zero for success, a negative number on error.
2294 */
2295 int regmap_update_bits(struct regmap *map, unsigned int reg,
2296 unsigned int mask, unsigned int val)
2297 {
2298 int ret;
2299
2300 map->lock(map->lock_arg);
2301 ret = _regmap_update_bits(map, reg, mask, val, NULL);
2302 map->unlock(map->lock_arg);
2303
2304 return ret;
2305 }
2306 EXPORT_SYMBOL_GPL(regmap_update_bits);
2307
2308 /**
2309 * regmap_update_bits_async: Perform a read/modify/write cycle on the register
2310 * map asynchronously
2311 *
2312 * @map: Register map to update
2313 * @reg: Register to update
2314 * @mask: Bitmask to change
2315 * @val: New value for bitmask
2316 *
2317 * With most buses the read must be done synchronously so this is most
2318 * useful for devices with a cache which do not need to interact with
2319 * the hardware to determine the current register value.
2320 *
2321 * Returns zero for success, a negative number on error.
2322 */
2323 int regmap_update_bits_async(struct regmap *map, unsigned int reg,
2324 unsigned int mask, unsigned int val)
2325 {
2326 int ret;
2327
2328 map->lock(map->lock_arg);
2329
2330 map->async = true;
2331
2332 ret = _regmap_update_bits(map, reg, mask, val, NULL);
2333
2334 map->async = false;
2335
2336 map->unlock(map->lock_arg);
2337
2338 return ret;
2339 }
2340 EXPORT_SYMBOL_GPL(regmap_update_bits_async);
2341
2342 /**
2343 * regmap_update_bits_check: Perform a read/modify/write cycle on the
2344 * register map and report if updated
2345 *
2346 * @map: Register map to update
2347 * @reg: Register to update
2348 * @mask: Bitmask to change
2349 * @val: New value for bitmask
2350 * @change: Boolean indicating if a write was done
2351 *
2352 * Returns zero for success, a negative number on error.
2353 */
2354 int regmap_update_bits_check(struct regmap *map, unsigned int reg,
2355 unsigned int mask, unsigned int val,
2356 bool *change)
2357 {
2358 int ret;
2359
2360 map->lock(map->lock_arg);
2361 ret = _regmap_update_bits(map, reg, mask, val, change);
2362 map->unlock(map->lock_arg);
2363 return ret;
2364 }
2365 EXPORT_SYMBOL_GPL(regmap_update_bits_check);
2366
2367 /**
2368 * regmap_update_bits_check_async: Perform a read/modify/write cycle on the
2369 * register map asynchronously and report if
2370 * updated
2371 *
2372 * @map: Register map to update
2373 * @reg: Register to update
2374 * @mask: Bitmask to change
2375 * @val: New value for bitmask
2376 * @change: Boolean indicating if a write was done
2377 *
2378 * With most buses the read must be done synchronously so this is most
2379 * useful for devices with a cache which do not need to interact with
2380 * the hardware to determine the current register value.
2381 *
2382 * Returns zero for success, a negative number on error.
2383 */
2384 int regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
2385 unsigned int mask, unsigned int val,
2386 bool *change)
2387 {
2388 int ret;
2389
2390 map->lock(map->lock_arg);
2391
2392 map->async = true;
2393
2394 ret = _regmap_update_bits(map, reg, mask, val, change);
2395
2396 map->async = false;
2397
2398 map->unlock(map->lock_arg);
2399
2400 return ret;
2401 }
2402 EXPORT_SYMBOL_GPL(regmap_update_bits_check_async);
2403
2404 void regmap_async_complete_cb(struct regmap_async *async, int ret)
2405 {
2406 struct regmap *map = async->map;
2407 bool wake;
2408
2409 trace_regmap_async_io_complete(map->dev);
2410
2411 spin_lock(&map->async_lock);
2412 list_move(&async->list, &map->async_free);
2413 wake = list_empty(&map->async_list);
2414
2415 if (ret != 0)
2416 map->async_ret = ret;
2417
2418 spin_unlock(&map->async_lock);
2419
2420 if (wake)
2421 wake_up(&map->async_waitq);
2422 }
2423 EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
2424
2425 static int regmap_async_is_done(struct regmap *map)
2426 {
2427 unsigned long flags;
2428 int ret;
2429
2430 spin_lock_irqsave(&map->async_lock, flags);
2431 ret = list_empty(&map->async_list);
2432 spin_unlock_irqrestore(&map->async_lock, flags);
2433
2434 return ret;
2435 }
2436
2437 /**
2438 * regmap_async_complete: Ensure all asynchronous I/O has completed.
2439 *
2440 * @map: Map to operate on.
2441 *
2442 * Blocks until any pending asynchronous I/O has completed. Returns
2443 * an error code for any failed I/O operations.
2444 */
2445 int regmap_async_complete(struct regmap *map)
2446 {
2447 unsigned long flags;
2448 int ret;
2449
2450 /* Nothing to do with no async support */
2451 if (!map->bus || !map->bus->async_write)
2452 return 0;
2453
2454 trace_regmap_async_complete_start(map->dev);
2455
2456 wait_event(map->async_waitq, regmap_async_is_done(map));
2457
2458 spin_lock_irqsave(&map->async_lock, flags);
2459 ret = map->async_ret;
2460 map->async_ret = 0;
2461 spin_unlock_irqrestore(&map->async_lock, flags);
2462
2463 trace_regmap_async_complete_done(map->dev);
2464
2465 return ret;
2466 }
2467 EXPORT_SYMBOL_GPL(regmap_async_complete);
2468
2469 /**
2470 * regmap_register_patch: Register and apply register updates to be applied
2471 * on device initialistion
2472 *
2473 * @map: Register map to apply updates to.
2474 * @regs: Values to update.
2475 * @num_regs: Number of entries in regs.
2476 *
2477 * Register a set of register updates to be applied to the device
2478 * whenever the device registers are synchronised with the cache and
2479 * apply them immediately. Typically this is used to apply
2480 * corrections to be applied to the device defaults on startup, such
2481 * as the updates some vendors provide to undocumented registers.
2482 *
2483 * The caller must ensure that this function cannot be called
2484 * concurrently with either itself or regcache_sync().
2485 */
2486 int regmap_register_patch(struct regmap *map, const struct reg_default *regs,
2487 int num_regs)
2488 {
2489 struct reg_default *p;
2490 int ret;
2491 bool bypass;
2492
2493 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
2494 num_regs))
2495 return 0;
2496
2497 p = krealloc(map->patch,
2498 sizeof(struct reg_default) * (map->patch_regs + num_regs),
2499 GFP_KERNEL);
2500 if (p) {
2501 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
2502 map->patch = p;
2503 map->patch_regs += num_regs;
2504 } else {
2505 return -ENOMEM;
2506 }
2507
2508 map->lock(map->lock_arg);
2509
2510 bypass = map->cache_bypass;
2511
2512 map->cache_bypass = true;
2513 map->async = true;
2514
2515 ret = _regmap_multi_reg_write(map, regs, num_regs);
2516 if (ret != 0)
2517 goto out;
2518
2519 out:
2520 map->async = false;
2521 map->cache_bypass = bypass;
2522
2523 map->unlock(map->lock_arg);
2524
2525 regmap_async_complete(map);
2526
2527 return ret;
2528 }
2529 EXPORT_SYMBOL_GPL(regmap_register_patch);
2530
2531 /*
2532 * regmap_get_val_bytes(): Report the size of a register value
2533 *
2534 * Report the size of a register value, mainly intended to for use by
2535 * generic infrastructure built on top of regmap.
2536 */
2537 int regmap_get_val_bytes(struct regmap *map)
2538 {
2539 if (map->format.format_write)
2540 return -EINVAL;
2541
2542 return map->format.val_bytes;
2543 }
2544 EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
2545
2546 int regmap_parse_val(struct regmap *map, const void *buf,
2547 unsigned int *val)
2548 {
2549 if (!map->format.parse_val)
2550 return -EINVAL;
2551
2552 *val = map->format.parse_val(buf);
2553
2554 return 0;
2555 }
2556 EXPORT_SYMBOL_GPL(regmap_parse_val);
2557
2558 static int __init regmap_initcall(void)
2559 {
2560 regmap_debugfs_initcall();
2561
2562 return 0;
2563 }
2564 postcore_initcall(regmap_initcall);
Linux with added FPC-III support