?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
cdc-acm: add TIOCMIWAIT
[linux/fpc-iii.git] / drivers / regulator / tps65910-regulator.c
bloba00132e31ec7ab245f2017f13e110c6730c906fd
1 /*
2 * tps65910.c -- TI tps65910
3 *
4 * Copyright 2010 Texas Instruments Inc.
5 *
6 * Author: Graeme Gregory <gg@slimlogic.co.uk>
7 * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16 #include <linux/kernel.h>
17 #include <linux/module.h>
18 #include <linux/init.h>
19 #include <linux/err.h>
20 #include <linux/platform_device.h>
21 #include <linux/regulator/driver.h>
22 #include <linux/regulator/machine.h>
23 #include <linux/slab.h>
24 #include <linux/gpio.h>
25 #include <linux/mfd/tps65910.h>
26 #include <linux/regulator/of_regulator.h>
27
28 #define TPS65910_SUPPLY_STATE_ENABLED 0x1
29 #define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
30 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
31 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
32 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
33
34 /* supported VIO voltages in microvolts */
35 static const unsigned int VIO_VSEL_table[] = {
36 1500000, 1800000, 2500000, 3300000,
37 };
38
39 /* VSEL tables for TPS65910 specific LDOs and dcdc's */
40
41 /* supported VRTC voltages in microvolts */
42 static const unsigned int VRTC_VSEL_table[] = {
43 1800000,
44 };
45
46 /* supported VDD3 voltages in microvolts */
47 static const unsigned int VDD3_VSEL_table[] = {
48 5000000,
49 };
50
51 /* supported VDIG1 voltages in microvolts */
52 static const unsigned int VDIG1_VSEL_table[] = {
53 1200000, 1500000, 1800000, 2700000,
54 };
55
56 /* supported VDIG2 voltages in microvolts */
57 static const unsigned int VDIG2_VSEL_table[] = {
58 1000000, 1100000, 1200000, 1800000,
59 };
60
61 /* supported VPLL voltages in microvolts */
62 static const unsigned int VPLL_VSEL_table[] = {
63 1000000, 1100000, 1800000, 2500000,
64 };
65
66 /* supported VDAC voltages in microvolts */
67 static const unsigned int VDAC_VSEL_table[] = {
68 1800000, 2600000, 2800000, 2850000,
69 };
70
71 /* supported VAUX1 voltages in microvolts */
72 static const unsigned int VAUX1_VSEL_table[] = {
73 1800000, 2500000, 2800000, 2850000,
74 };
75
76 /* supported VAUX2 voltages in microvolts */
77 static const unsigned int VAUX2_VSEL_table[] = {
78 1800000, 2800000, 2900000, 3300000,
79 };
80
81 /* supported VAUX33 voltages in microvolts */
82 static const unsigned int VAUX33_VSEL_table[] = {
83 1800000, 2000000, 2800000, 3300000,
84 };
85
86 /* supported VMMC voltages in microvolts */
87 static const unsigned int VMMC_VSEL_table[] = {
88 1800000, 2800000, 3000000, 3300000,
89 };
90
91 struct tps_info {
92 const char *name;
93 const char *vin_name;
94 u8 n_voltages;
95 const unsigned int *voltage_table;
96 int enable_time_us;
97 };
98
99 static struct tps_info tps65910_regs[] = {
100 {
101 .name = "vrtc",
102 .vin_name = "vcc7",
103 .n_voltages = ARRAY_SIZE(VRTC_VSEL_table),
104 .voltage_table = VRTC_VSEL_table,
105 .enable_time_us = 2200,
106 },
107 {
108 .name = "vio",
109 .vin_name = "vccio",
110 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
111 .voltage_table = VIO_VSEL_table,
112 .enable_time_us = 350,
113 },
114 {
115 .name = "vdd1",
116 .vin_name = "vcc1",
117 .enable_time_us = 350,
118 },
119 {
120 .name = "vdd2",
121 .vin_name = "vcc2",
122 .enable_time_us = 350,
123 },
124 {
125 .name = "vdd3",
126 .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
127 .voltage_table = VDD3_VSEL_table,
128 .enable_time_us = 200,
129 },
130 {
131 .name = "vdig1",
132 .vin_name = "vcc6",
133 .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
134 .voltage_table = VDIG1_VSEL_table,
135 .enable_time_us = 100,
136 },
137 {
138 .name = "vdig2",
139 .vin_name = "vcc6",
140 .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
141 .voltage_table = VDIG2_VSEL_table,
142 .enable_time_us = 100,
143 },
144 {
145 .name = "vpll",
146 .vin_name = "vcc5",
147 .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
148 .voltage_table = VPLL_VSEL_table,
149 .enable_time_us = 100,
150 },
151 {
152 .name = "vdac",
153 .vin_name = "vcc5",
154 .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
155 .voltage_table = VDAC_VSEL_table,
156 .enable_time_us = 100,
157 },
158 {
159 .name = "vaux1",
160 .vin_name = "vcc4",
161 .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
162 .voltage_table = VAUX1_VSEL_table,
163 .enable_time_us = 100,
164 },
165 {
166 .name = "vaux2",
167 .vin_name = "vcc4",
168 .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
169 .voltage_table = VAUX2_VSEL_table,
170 .enable_time_us = 100,
171 },
172 {
173 .name = "vaux33",
174 .vin_name = "vcc3",
175 .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
176 .voltage_table = VAUX33_VSEL_table,
177 .enable_time_us = 100,
178 },
179 {
180 .name = "vmmc",
181 .vin_name = "vcc3",
182 .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
183 .voltage_table = VMMC_VSEL_table,
184 .enable_time_us = 100,
185 },
186 };
187
188 static struct tps_info tps65911_regs[] = {
189 {
190 .name = "vrtc",
191 .vin_name = "vcc7",
192 .enable_time_us = 2200,
193 },
194 {
195 .name = "vio",
196 .vin_name = "vccio",
197 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
198 .voltage_table = VIO_VSEL_table,
199 .enable_time_us = 350,
200 },
201 {
202 .name = "vdd1",
203 .vin_name = "vcc1",
204 .n_voltages = 0x4C,
205 .enable_time_us = 350,
206 },
207 {
208 .name = "vdd2",
209 .vin_name = "vcc2",
210 .n_voltages = 0x4C,
211 .enable_time_us = 350,
212 },
213 {
214 .name = "vddctrl",
215 .n_voltages = 0x44,
216 .enable_time_us = 900,
217 },
218 {
219 .name = "ldo1",
220 .vin_name = "vcc6",
221 .n_voltages = 0x33,
222 .enable_time_us = 420,
223 },
224 {
225 .name = "ldo2",
226 .vin_name = "vcc6",
227 .n_voltages = 0x33,
228 .enable_time_us = 420,
229 },
230 {
231 .name = "ldo3",
232 .vin_name = "vcc5",
233 .n_voltages = 0x1A,
234 .enable_time_us = 230,
235 },
236 {
237 .name = "ldo4",
238 .vin_name = "vcc5",
239 .n_voltages = 0x33,
240 .enable_time_us = 230,
241 },
242 {
243 .name = "ldo5",
244 .vin_name = "vcc4",
245 .n_voltages = 0x1A,
246 .enable_time_us = 230,
247 },
248 {
249 .name = "ldo6",
250 .vin_name = "vcc3",
251 .n_voltages = 0x1A,
252 .enable_time_us = 230,
253 },
254 {
255 .name = "ldo7",
256 .vin_name = "vcc3",
257 .n_voltages = 0x1A,
258 .enable_time_us = 230,
259 },
260 {
261 .name = "ldo8",
262 .vin_name = "vcc3",
263 .n_voltages = 0x1A,
264 .enable_time_us = 230,
265 },
266 };
267
268 #define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
269 static unsigned int tps65910_ext_sleep_control[] = {
270 0,
271 EXT_CONTROL_REG_BITS(VIO, 1, 0),
272 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
273 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
274 EXT_CONTROL_REG_BITS(VDD3, 1, 3),
275 EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
276 EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
277 EXT_CONTROL_REG_BITS(VPLL, 0, 6),
278 EXT_CONTROL_REG_BITS(VDAC, 0, 7),
279 EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
280 EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
281 EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
282 EXT_CONTROL_REG_BITS(VMMC, 0, 0),
283 };
284
285 static unsigned int tps65911_ext_sleep_control[] = {
286 0,
287 EXT_CONTROL_REG_BITS(VIO, 1, 0),
288 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
289 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
290 EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
291 EXT_CONTROL_REG_BITS(LDO1, 0, 1),
292 EXT_CONTROL_REG_BITS(LDO2, 0, 2),
293 EXT_CONTROL_REG_BITS(LDO3, 0, 7),
294 EXT_CONTROL_REG_BITS(LDO4, 0, 6),
295 EXT_CONTROL_REG_BITS(LDO5, 0, 3),
296 EXT_CONTROL_REG_BITS(LDO6, 0, 0),
297 EXT_CONTROL_REG_BITS(LDO7, 0, 5),
298 EXT_CONTROL_REG_BITS(LDO8, 0, 4),
299 };
300
301 struct tps65910_reg {
302 struct regulator_desc *desc;
303 struct tps65910 *mfd;
304 struct regulator_dev **rdev;
305 struct tps_info **info;
306 int num_regulators;
307 int mode;
308 int (*get_ctrl_reg)(int);
309 unsigned int *ext_sleep_control;
310 unsigned int board_ext_control[TPS65910_NUM_REGS];
311 };
312
313 static int tps65910_get_ctrl_register(int id)
314 {
315 switch (id) {
316 case TPS65910_REG_VRTC:
317 return TPS65910_VRTC;
318 case TPS65910_REG_VIO:
319 return TPS65910_VIO;
320 case TPS65910_REG_VDD1:
321 return TPS65910_VDD1;
322 case TPS65910_REG_VDD2:
323 return TPS65910_VDD2;
324 case TPS65910_REG_VDD3:
325 return TPS65910_VDD3;
326 case TPS65910_REG_VDIG1:
327 return TPS65910_VDIG1;
328 case TPS65910_REG_VDIG2:
329 return TPS65910_VDIG2;
330 case TPS65910_REG_VPLL:
331 return TPS65910_VPLL;
332 case TPS65910_REG_VDAC:
333 return TPS65910_VDAC;
334 case TPS65910_REG_VAUX1:
335 return TPS65910_VAUX1;
336 case TPS65910_REG_VAUX2:
337 return TPS65910_VAUX2;
338 case TPS65910_REG_VAUX33:
339 return TPS65910_VAUX33;
340 case TPS65910_REG_VMMC:
341 return TPS65910_VMMC;
342 default:
343 return -EINVAL;
344 }
345 }
346
347 static int tps65911_get_ctrl_register(int id)
348 {
349 switch (id) {
350 case TPS65910_REG_VRTC:
351 return TPS65910_VRTC;
352 case TPS65910_REG_VIO:
353 return TPS65910_VIO;
354 case TPS65910_REG_VDD1:
355 return TPS65910_VDD1;
356 case TPS65910_REG_VDD2:
357 return TPS65910_VDD2;
358 case TPS65911_REG_VDDCTRL:
359 return TPS65911_VDDCTRL;
360 case TPS65911_REG_LDO1:
361 return TPS65911_LDO1;
362 case TPS65911_REG_LDO2:
363 return TPS65911_LDO2;
364 case TPS65911_REG_LDO3:
365 return TPS65911_LDO3;
366 case TPS65911_REG_LDO4:
367 return TPS65911_LDO4;
368 case TPS65911_REG_LDO5:
369 return TPS65911_LDO5;
370 case TPS65911_REG_LDO6:
371 return TPS65911_LDO6;
372 case TPS65911_REG_LDO7:
373 return TPS65911_LDO7;
374 case TPS65911_REG_LDO8:
375 return TPS65911_LDO8;
376 default:
377 return -EINVAL;
378 }
379 }
380
381 static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
382 {
383 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
384 struct tps65910 *mfd = pmic->mfd;
385 int reg, value, id = rdev_get_id(dev);
386
387 reg = pmic->get_ctrl_reg(id);
388 if (reg < 0)
389 return reg;
390
391 switch (mode) {
392 case REGULATOR_MODE_NORMAL:
393 return tps65910_reg_update_bits(pmic->mfd, reg,
394 LDO_ST_MODE_BIT | LDO_ST_ON_BIT,
395 LDO_ST_ON_BIT);
396 case REGULATOR_MODE_IDLE:
397 value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
398 return tps65910_reg_set_bits(mfd, reg, value);
399 case REGULATOR_MODE_STANDBY:
400 return tps65910_reg_clear_bits(mfd, reg, LDO_ST_ON_BIT);
401 }
402
403 return -EINVAL;
404 }
405
406 static unsigned int tps65910_get_mode(struct regulator_dev *dev)
407 {
408 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
409 int ret, reg, value, id = rdev_get_id(dev);
410
411 reg = pmic->get_ctrl_reg(id);
412 if (reg < 0)
413 return reg;
414
415 ret = tps65910_reg_read(pmic->mfd, reg, &value);
416 if (ret < 0)
417 return ret;
418
419 if (!(value & LDO_ST_ON_BIT))
420 return REGULATOR_MODE_STANDBY;
421 else if (value & LDO_ST_MODE_BIT)
422 return REGULATOR_MODE_IDLE;
423 else
424 return REGULATOR_MODE_NORMAL;
425 }
426
427 static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
428 {
429 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
430 int ret, id = rdev_get_id(dev);
431 int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
432
433 switch (id) {
434 case TPS65910_REG_VDD1:
435 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1_OP, &opvsel);
436 if (ret < 0)
437 return ret;
438 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1, &mult);
439 if (ret < 0)
440 return ret;
441 mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
442 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1_SR, &srvsel);
443 if (ret < 0)
444 return ret;
445 sr = opvsel & VDD1_OP_CMD_MASK;
446 opvsel &= VDD1_OP_SEL_MASK;
447 srvsel &= VDD1_SR_SEL_MASK;
448 vselmax = 75;
449 break;
450 case TPS65910_REG_VDD2:
451 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2_OP, &opvsel);
452 if (ret < 0)
453 return ret;
454 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2, &mult);
455 if (ret < 0)
456 return ret;
457 mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
458 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2_SR, &srvsel);
459 if (ret < 0)
460 return ret;
461 sr = opvsel & VDD2_OP_CMD_MASK;
462 opvsel &= VDD2_OP_SEL_MASK;
463 srvsel &= VDD2_SR_SEL_MASK;
464 vselmax = 75;
465 break;
466 case TPS65911_REG_VDDCTRL:
467 ret = tps65910_reg_read(pmic->mfd, TPS65911_VDDCTRL_OP,
468 &opvsel);
469 if (ret < 0)
470 return ret;
471 ret = tps65910_reg_read(pmic->mfd, TPS65911_VDDCTRL_SR,
472 &srvsel);
473 if (ret < 0)
474 return ret;
475 sr = opvsel & VDDCTRL_OP_CMD_MASK;
476 opvsel &= VDDCTRL_OP_SEL_MASK;
477 srvsel &= VDDCTRL_SR_SEL_MASK;
478 vselmax = 64;
479 break;
480 }
481
482 /* multiplier 0 == 1 but 2,3 normal */
483 if (!mult)
484 mult = 1;
485
486 if (sr) {
487 /* normalise to valid range */
488 if (srvsel < 3)
489 srvsel = 3;
490 if (srvsel > vselmax)
491 srvsel = vselmax;
492 return srvsel - 3;
493 } else {
494
495 /* normalise to valid range*/
496 if (opvsel < 3)
497 opvsel = 3;
498 if (opvsel > vselmax)
499 opvsel = vselmax;
500 return opvsel - 3;
501 }
502 return -EINVAL;
503 }
504
505 static int tps65910_get_voltage_sel(struct regulator_dev *dev)
506 {
507 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
508 int ret, reg, value, id = rdev_get_id(dev);
509
510 reg = pmic->get_ctrl_reg(id);
511 if (reg < 0)
512 return reg;
513
514 ret = tps65910_reg_read(pmic->mfd, reg, &value);
515 if (ret < 0)
516 return ret;
517
518 switch (id) {
519 case TPS65910_REG_VIO:
520 case TPS65910_REG_VDIG1:
521 case TPS65910_REG_VDIG2:
522 case TPS65910_REG_VPLL:
523 case TPS65910_REG_VDAC:
524 case TPS65910_REG_VAUX1:
525 case TPS65910_REG_VAUX2:
526 case TPS65910_REG_VAUX33:
527 case TPS65910_REG_VMMC:
528 value &= LDO_SEL_MASK;
529 value >>= LDO_SEL_SHIFT;
530 break;
531 default:
532 return -EINVAL;
533 }
534
535 return value;
536 }
537
538 static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
539 {
540 return dev->desc->volt_table[0];
541 }
542
543 static int tps65911_get_voltage_sel(struct regulator_dev *dev)
544 {
545 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
546 int ret, id = rdev_get_id(dev);
547 unsigned int value, reg;
548
549 reg = pmic->get_ctrl_reg(id);
550
551 ret = tps65910_reg_read(pmic->mfd, reg, &value);
552 if (ret < 0)
553 return ret;
554
555 switch (id) {
556 case TPS65911_REG_LDO1:
557 case TPS65911_REG_LDO2:
558 case TPS65911_REG_LDO4:
559 value &= LDO1_SEL_MASK;
560 value >>= LDO_SEL_SHIFT;
561 break;
562 case TPS65911_REG_LDO3:
563 case TPS65911_REG_LDO5:
564 case TPS65911_REG_LDO6:
565 case TPS65911_REG_LDO7:
566 case TPS65911_REG_LDO8:
567 value &= LDO3_SEL_MASK;
568 value >>= LDO_SEL_SHIFT;
569 break;
570 case TPS65910_REG_VIO:
571 value &= LDO_SEL_MASK;
572 value >>= LDO_SEL_SHIFT;
573 break;
574 default:
575 return -EINVAL;
576 }
577
578 return value;
579 }
580
581 static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
582 unsigned selector)
583 {
584 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
585 int id = rdev_get_id(dev), vsel;
586 int dcdc_mult = 0;
587
588 switch (id) {
589 case TPS65910_REG_VDD1:
590 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
591 if (dcdc_mult == 1)
592 dcdc_mult--;
593 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
594
595 tps65910_reg_update_bits(pmic->mfd, TPS65910_VDD1,
596 VDD1_VGAIN_SEL_MASK,
597 dcdc_mult << VDD1_VGAIN_SEL_SHIFT);
598 tps65910_reg_write(pmic->mfd, TPS65910_VDD1_OP, vsel);
599 break;
600 case TPS65910_REG_VDD2:
601 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
602 if (dcdc_mult == 1)
603 dcdc_mult--;
604 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
605
606 tps65910_reg_update_bits(pmic->mfd, TPS65910_VDD2,
607 VDD1_VGAIN_SEL_MASK,
608 dcdc_mult << VDD2_VGAIN_SEL_SHIFT);
609 tps65910_reg_write(pmic->mfd, TPS65910_VDD2_OP, vsel);
610 break;
611 case TPS65911_REG_VDDCTRL:
612 vsel = selector + 3;
613 tps65910_reg_write(pmic->mfd, TPS65911_VDDCTRL_OP, vsel);
614 }
615
616 return 0;
617 }
618
619 static int tps65910_set_voltage_sel(struct regulator_dev *dev,
620 unsigned selector)
621 {
622 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
623 int reg, id = rdev_get_id(dev);
624
625 reg = pmic->get_ctrl_reg(id);
626 if (reg < 0)
627 return reg;
628
629 switch (id) {
630 case TPS65910_REG_VIO:
631 case TPS65910_REG_VDIG1:
632 case TPS65910_REG_VDIG2:
633 case TPS65910_REG_VPLL:
634 case TPS65910_REG_VDAC:
635 case TPS65910_REG_VAUX1:
636 case TPS65910_REG_VAUX2:
637 case TPS65910_REG_VAUX33:
638 case TPS65910_REG_VMMC:
639 return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK,
640 selector << LDO_SEL_SHIFT);
641 }
642
643 return -EINVAL;
644 }
645
646 static int tps65911_set_voltage_sel(struct regulator_dev *dev,
647 unsigned selector)
648 {
649 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
650 int reg, id = rdev_get_id(dev);
651
652 reg = pmic->get_ctrl_reg(id);
653 if (reg < 0)
654 return reg;
655
656 switch (id) {
657 case TPS65911_REG_LDO1:
658 case TPS65911_REG_LDO2:
659 case TPS65911_REG_LDO4:
660 return tps65910_reg_update_bits(pmic->mfd, reg, LDO1_SEL_MASK,
661 selector << LDO_SEL_SHIFT);
662 case TPS65911_REG_LDO3:
663 case TPS65911_REG_LDO5:
664 case TPS65911_REG_LDO6:
665 case TPS65911_REG_LDO7:
666 case TPS65911_REG_LDO8:
667 return tps65910_reg_update_bits(pmic->mfd, reg, LDO3_SEL_MASK,
668 selector << LDO_SEL_SHIFT);
669 case TPS65910_REG_VIO:
670 return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK,
671 selector << LDO_SEL_SHIFT);
672 }
673
674 return -EINVAL;
675 }
676
677
678 static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
679 unsigned selector)
680 {
681 int volt, mult = 1, id = rdev_get_id(dev);
682
683 switch (id) {
684 case TPS65910_REG_VDD1:
685 case TPS65910_REG_VDD2:
686 mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
687 volt = VDD1_2_MIN_VOLT +
688 (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
689 break;
690 case TPS65911_REG_VDDCTRL:
691 volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
692 break;
693 default:
694 BUG();
695 return -EINVAL;
696 }
697
698 return volt * 100 * mult;
699 }
700
701 static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
702 {
703 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
704 int step_mv = 0, id = rdev_get_id(dev);
705
706 switch (id) {
707 case TPS65911_REG_LDO1:
708 case TPS65911_REG_LDO2:
709 case TPS65911_REG_LDO4:
710 /* The first 5 values of the selector correspond to 1V */
711 if (selector < 5)
712 selector = 0;
713 else
714 selector -= 4;
715
716 step_mv = 50;
717 break;
718 case TPS65911_REG_LDO3:
719 case TPS65911_REG_LDO5:
720 case TPS65911_REG_LDO6:
721 case TPS65911_REG_LDO7:
722 case TPS65911_REG_LDO8:
723 /* The first 3 values of the selector correspond to 1V */
724 if (selector < 3)
725 selector = 0;
726 else
727 selector -= 2;
728
729 step_mv = 100;
730 break;
731 case TPS65910_REG_VIO:
732 return pmic->info[id]->voltage_table[selector];
733 default:
734 return -EINVAL;
735 }
736
737 return (LDO_MIN_VOLT + selector * step_mv) * 1000;
738 }
739
740 /* Regulator ops (except VRTC) */
741 static struct regulator_ops tps65910_ops_dcdc = {
742 .is_enabled = regulator_is_enabled_regmap,
743 .enable = regulator_enable_regmap,
744 .disable = regulator_disable_regmap,
745 .set_mode = tps65910_set_mode,
746 .get_mode = tps65910_get_mode,
747 .get_voltage_sel = tps65910_get_voltage_dcdc_sel,
748 .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
749 .set_voltage_time_sel = regulator_set_voltage_time_sel,
750 .list_voltage = tps65910_list_voltage_dcdc,
751 .map_voltage = regulator_map_voltage_ascend,
752 };
753
754 static struct regulator_ops tps65910_ops_vdd3 = {
755 .is_enabled = regulator_is_enabled_regmap,
756 .enable = regulator_enable_regmap,
757 .disable = regulator_disable_regmap,
758 .set_mode = tps65910_set_mode,
759 .get_mode = tps65910_get_mode,
760 .get_voltage = tps65910_get_voltage_vdd3,
761 .list_voltage = regulator_list_voltage_table,
762 .map_voltage = regulator_map_voltage_ascend,
763 };
764
765 static struct regulator_ops tps65910_ops = {
766 .is_enabled = regulator_is_enabled_regmap,
767 .enable = regulator_enable_regmap,
768 .disable = regulator_disable_regmap,
769 .set_mode = tps65910_set_mode,
770 .get_mode = tps65910_get_mode,
771 .get_voltage_sel = tps65910_get_voltage_sel,
772 .set_voltage_sel = tps65910_set_voltage_sel,
773 .list_voltage = regulator_list_voltage_table,
774 .map_voltage = regulator_map_voltage_ascend,
775 };
776
777 static struct regulator_ops tps65911_ops = {
778 .is_enabled = regulator_is_enabled_regmap,
779 .enable = regulator_enable_regmap,
780 .disable = regulator_disable_regmap,
781 .set_mode = tps65910_set_mode,
782 .get_mode = tps65910_get_mode,
783 .get_voltage_sel = tps65911_get_voltage_sel,
784 .set_voltage_sel = tps65911_set_voltage_sel,
785 .list_voltage = tps65911_list_voltage,
786 .map_voltage = regulator_map_voltage_ascend,
787 };
788
789 static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
790 int id, int ext_sleep_config)
791 {
792 struct tps65910 *mfd = pmic->mfd;
793 u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
794 u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
795 int ret;
796
797 /*
798 * Regulator can not be control from multiple external input EN1, EN2
799 * and EN3 together.
800 */
801 if (ext_sleep_config & EXT_SLEEP_CONTROL) {
802 int en_count;
803 en_count = ((ext_sleep_config &
804 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
805 en_count += ((ext_sleep_config &
806 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
807 en_count += ((ext_sleep_config &
808 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
809 en_count += ((ext_sleep_config &
810 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
811 if (en_count > 1) {
812 dev_err(mfd->dev,
813 "External sleep control flag is not proper\n");
814 return -EINVAL;
815 }
816 }
817
818 pmic->board_ext_control[id] = ext_sleep_config;
819
820 /* External EN1 control */
821 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
822 ret = tps65910_reg_set_bits(mfd,
823 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
824 else
825 ret = tps65910_reg_clear_bits(mfd,
826 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
827 if (ret < 0) {
828 dev_err(mfd->dev,
829 "Error in configuring external control EN1\n");
830 return ret;
831 }
832
833 /* External EN2 control */
834 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
835 ret = tps65910_reg_set_bits(mfd,
836 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
837 else
838 ret = tps65910_reg_clear_bits(mfd,
839 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
840 if (ret < 0) {
841 dev_err(mfd->dev,
842 "Error in configuring external control EN2\n");
843 return ret;
844 }
845
846 /* External EN3 control for TPS65910 LDO only */
847 if ((tps65910_chip_id(mfd) == TPS65910) &&
848 (id >= TPS65910_REG_VDIG1)) {
849 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
850 ret = tps65910_reg_set_bits(mfd,
851 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
852 else
853 ret = tps65910_reg_clear_bits(mfd,
854 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
855 if (ret < 0) {
856 dev_err(mfd->dev,
857 "Error in configuring external control EN3\n");
858 return ret;
859 }
860 }
861
862 /* Return if no external control is selected */
863 if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
864 /* Clear all sleep controls */
865 ret = tps65910_reg_clear_bits(mfd,
866 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
867 if (!ret)
868 ret = tps65910_reg_clear_bits(mfd,
869 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
870 if (ret < 0)
871 dev_err(mfd->dev,
872 "Error in configuring SLEEP register\n");
873 return ret;
874 }
875
876 /*
877 * For regulator that has separate operational and sleep register make
878 * sure that operational is used and clear sleep register to turn
879 * regulator off when external control is inactive
880 */
881 if ((id == TPS65910_REG_VDD1) ||
882 (id == TPS65910_REG_VDD2) ||
883 ((id == TPS65911_REG_VDDCTRL) &&
884 (tps65910_chip_id(mfd) == TPS65911))) {
885 int op_reg_add = pmic->get_ctrl_reg(id) + 1;
886 int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
887 int opvsel, srvsel;
888
889 ret = tps65910_reg_read(pmic->mfd, op_reg_add, &opvsel);
890 if (ret < 0)
891 return ret;
892 ret = tps65910_reg_read(pmic->mfd, sr_reg_add, &srvsel);
893 if (ret < 0)
894 return ret;
895
896 if (opvsel & VDD1_OP_CMD_MASK) {
897 u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
898
899 ret = tps65910_reg_write(pmic->mfd, op_reg_add,
900 reg_val);
901 if (ret < 0) {
902 dev_err(mfd->dev,
903 "Error in configuring op register\n");
904 return ret;
905 }
906 }
907 ret = tps65910_reg_write(pmic->mfd, sr_reg_add, 0);
908 if (ret < 0) {
909 dev_err(mfd->dev, "Error in setting sr register\n");
910 return ret;
911 }
912 }
913
914 ret = tps65910_reg_clear_bits(mfd,
915 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
916 if (!ret) {
917 if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
918 ret = tps65910_reg_set_bits(mfd,
919 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
920 else
921 ret = tps65910_reg_clear_bits(mfd,
922 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
923 }
924 if (ret < 0)
925 dev_err(mfd->dev,
926 "Error in configuring SLEEP register\n");
927
928 return ret;
929 }
930
931 #ifdef CONFIG_OF
932
933 static struct of_regulator_match tps65910_matches[] = {
934 { .name = "vrtc", .driver_data = (void *) &tps65910_regs[0] },
935 { .name = "vio", .driver_data = (void *) &tps65910_regs[1] },
936 { .name = "vdd1", .driver_data = (void *) &tps65910_regs[2] },
937 { .name = "vdd2", .driver_data = (void *) &tps65910_regs[3] },
938 { .name = "vdd3", .driver_data = (void *) &tps65910_regs[4] },
939 { .name = "vdig1", .driver_data = (void *) &tps65910_regs[5] },
940 { .name = "vdig2", .driver_data = (void *) &tps65910_regs[6] },
941 { .name = "vpll", .driver_data = (void *) &tps65910_regs[7] },
942 { .name = "vdac", .driver_data = (void *) &tps65910_regs[8] },
943 { .name = "vaux1", .driver_data = (void *) &tps65910_regs[9] },
944 { .name = "vaux2", .driver_data = (void *) &tps65910_regs[10] },
945 { .name = "vaux33", .driver_data = (void *) &tps65910_regs[11] },
946 { .name = "vmmc", .driver_data = (void *) &tps65910_regs[12] },
947 };
948
949 static struct of_regulator_match tps65911_matches[] = {
950 { .name = "vrtc", .driver_data = (void *) &tps65911_regs[0] },
951 { .name = "vio", .driver_data = (void *) &tps65911_regs[1] },
952 { .name = "vdd1", .driver_data = (void *) &tps65911_regs[2] },
953 { .name = "vdd2", .driver_data = (void *) &tps65911_regs[3] },
954 { .name = "vddctrl", .driver_data = (void *) &tps65911_regs[4] },
955 { .name = "ldo1", .driver_data = (void *) &tps65911_regs[5] },
956 { .name = "ldo2", .driver_data = (void *) &tps65911_regs[6] },
957 { .name = "ldo3", .driver_data = (void *) &tps65911_regs[7] },
958 { .name = "ldo4", .driver_data = (void *) &tps65911_regs[8] },
959 { .name = "ldo5", .driver_data = (void *) &tps65911_regs[9] },
960 { .name = "ldo6", .driver_data = (void *) &tps65911_regs[10] },
961 { .name = "ldo7", .driver_data = (void *) &tps65911_regs[11] },
962 { .name = "ldo8", .driver_data = (void *) &tps65911_regs[12] },
963 };
964
965 static struct tps65910_board *tps65910_parse_dt_reg_data(
966 struct platform_device *pdev,
967 struct of_regulator_match **tps65910_reg_matches)
968 {
969 struct tps65910_board *pmic_plat_data;
970 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
971 struct device_node *np, *regulators;
972 struct of_regulator_match *matches;
973 unsigned int prop;
974 int idx = 0, ret, count;
975
976 pmic_plat_data = devm_kzalloc(&pdev->dev, sizeof(*pmic_plat_data),
977 GFP_KERNEL);
978
979 if (!pmic_plat_data) {
980 dev_err(&pdev->dev, "Failure to alloc pdata for regulators.\n");
981 return NULL;
982 }
983
984 np = of_node_get(pdev->dev.parent->of_node);
985 regulators = of_get_child_by_name(np, "regulators");
986 if (!regulators) {
987 dev_err(&pdev->dev, "regulator node not found\n");
988 return NULL;
989 }
990
991 switch (tps65910_chip_id(tps65910)) {
992 case TPS65910:
993 count = ARRAY_SIZE(tps65910_matches);
994 matches = tps65910_matches;
995 break;
996 case TPS65911:
997 count = ARRAY_SIZE(tps65911_matches);
998 matches = tps65911_matches;
999 break;
1000 default:
1001 of_node_put(regulators);
1002 dev_err(&pdev->dev, "Invalid tps chip version\n");
1003 return NULL;
1004 }
1005
1006 ret = of_regulator_match(&pdev->dev, regulators, matches, count);
1007 of_node_put(regulators);
1008 if (ret < 0) {
1009 dev_err(&pdev->dev, "Error parsing regulator init data: %d\n",
1010 ret);
1011 return NULL;
1012 }
1013
1014 *tps65910_reg_matches = matches;
1015
1016 for (idx = 0; idx < count; idx++) {
1017 if (!matches[idx].init_data || !matches[idx].of_node)
1018 continue;
1019
1020 pmic_plat_data->tps65910_pmic_init_data[idx] =
1021 matches[idx].init_data;
1022
1023 ret = of_property_read_u32(matches[idx].of_node,
1024 "ti,regulator-ext-sleep-control", &prop);
1025 if (!ret)
1026 pmic_plat_data->regulator_ext_sleep_control[idx] = prop;
1027
1028 }
1029
1030 return pmic_plat_data;
1031 }
1032 #else
1033 static inline struct tps65910_board *tps65910_parse_dt_reg_data(
1034 struct platform_device *pdev,
1035 struct of_regulator_match **tps65910_reg_matches)
1036 {
1037 *tps65910_reg_matches = NULL;
1038 return NULL;
1039 }
1040 #endif
1041
1042 static int tps65910_probe(struct platform_device *pdev)
1043 {
1044 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
1045 struct regulator_config config = { };
1046 struct tps_info *info;
1047 struct regulator_init_data *reg_data;
1048 struct regulator_dev *rdev;
1049 struct tps65910_reg *pmic;
1050 struct tps65910_board *pmic_plat_data;
1051 struct of_regulator_match *tps65910_reg_matches = NULL;
1052 int i, err;
1053
1054 pmic_plat_data = dev_get_platdata(tps65910->dev);
1055 if (!pmic_plat_data && tps65910->dev->of_node)
1056 pmic_plat_data = tps65910_parse_dt_reg_data(pdev,
1057 &tps65910_reg_matches);
1058
1059 if (!pmic_plat_data) {
1060 dev_err(&pdev->dev, "Platform data not found\n");
1061 return -EINVAL;
1062 }
1063
1064 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
1065 if (!pmic) {
1066 dev_err(&pdev->dev, "Memory allocation failed for pmic\n");
1067 return -ENOMEM;
1068 }
1069
1070 pmic->mfd = tps65910;
1071 platform_set_drvdata(pdev, pmic);
1072
1073 /* Give control of all register to control port */
1074 tps65910_reg_set_bits(pmic->mfd, TPS65910_DEVCTRL,
1075 DEVCTRL_SR_CTL_I2C_SEL_MASK);
1076
1077 switch (tps65910_chip_id(tps65910)) {
1078 case TPS65910:
1079 pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
1080 pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
1081 pmic->ext_sleep_control = tps65910_ext_sleep_control;
1082 info = tps65910_regs;
1083 break;
1084 case TPS65911:
1085 pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
1086 pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
1087 pmic->ext_sleep_control = tps65911_ext_sleep_control;
1088 info = tps65911_regs;
1089 break;
1090 default:
1091 dev_err(&pdev->dev, "Invalid tps chip version\n");
1092 return -ENODEV;
1093 }
1094
1095 pmic->desc = devm_kzalloc(&pdev->dev, pmic->num_regulators *
1096 sizeof(struct regulator_desc), GFP_KERNEL);
1097 if (!pmic->desc) {
1098 dev_err(&pdev->dev, "Memory alloc fails for desc\n");
1099 return -ENOMEM;
1100 }
1101
1102 pmic->info = devm_kzalloc(&pdev->dev, pmic->num_regulators *
1103 sizeof(struct tps_info *), GFP_KERNEL);
1104 if (!pmic->info) {
1105 dev_err(&pdev->dev, "Memory alloc fails for info\n");
1106 return -ENOMEM;
1107 }
1108
1109 pmic->rdev = devm_kzalloc(&pdev->dev, pmic->num_regulators *
1110 sizeof(struct regulator_dev *), GFP_KERNEL);
1111 if (!pmic->rdev) {
1112 dev_err(&pdev->dev, "Memory alloc fails for rdev\n");
1113 return -ENOMEM;
1114 }
1115
1116 for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS;
1117 i++, info++) {
1118
1119 reg_data = pmic_plat_data->tps65910_pmic_init_data[i];
1120
1121 /* Regulator API handles empty constraints but not NULL
1122 * constraints */
1123 if (!reg_data)
1124 continue;
1125
1126 /* Register the regulators */
1127 pmic->info[i] = info;
1128
1129 pmic->desc[i].name = info->name;
1130 pmic->desc[i].supply_name = info->vin_name;
1131 pmic->desc[i].id = i;
1132 pmic->desc[i].n_voltages = info->n_voltages;
1133 pmic->desc[i].enable_time = info->enable_time_us;
1134
1135 if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
1136 pmic->desc[i].ops = &tps65910_ops_dcdc;
1137 pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
1138 VDD1_2_NUM_VOLT_COARSE;
1139 pmic->desc[i].ramp_delay = 12500;
1140 } else if (i == TPS65910_REG_VDD3) {
1141 if (tps65910_chip_id(tps65910) == TPS65910) {
1142 pmic->desc[i].ops = &tps65910_ops_vdd3;
1143 pmic->desc[i].volt_table = info->voltage_table;
1144 } else {
1145 pmic->desc[i].ops = &tps65910_ops_dcdc;
1146 pmic->desc[i].ramp_delay = 5000;
1147 }
1148 } else {
1149 if (tps65910_chip_id(tps65910) == TPS65910) {
1150 pmic->desc[i].ops = &tps65910_ops;
1151 pmic->desc[i].volt_table = info->voltage_table;
1152 } else {
1153 pmic->desc[i].ops = &tps65911_ops;
1154 }
1155 }
1156
1157 err = tps65910_set_ext_sleep_config(pmic, i,
1158 pmic_plat_data->regulator_ext_sleep_control[i]);
1159 /*
1160 * Failing on regulator for configuring externally control
1161 * is not a serious issue, just throw warning.
1162 */
1163 if (err < 0)
1164 dev_warn(tps65910->dev,
1165 "Failed to initialise ext control config\n");
1166
1167 pmic->desc[i].type = REGULATOR_VOLTAGE;
1168 pmic->desc[i].owner = THIS_MODULE;
1169 pmic->desc[i].enable_reg = pmic->get_ctrl_reg(i);
1170 pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED;
1171
1172 config.dev = tps65910->dev;
1173 config.init_data = reg_data;
1174 config.driver_data = pmic;
1175 config.regmap = tps65910->regmap;
1176
1177 if (tps65910_reg_matches)
1178 config.of_node = tps65910_reg_matches[i].of_node;
1179
1180 rdev = devm_regulator_register(&pdev->dev, &pmic->desc[i],
1181 &config);
1182 if (IS_ERR(rdev)) {
1183 dev_err(tps65910->dev,
1184 "failed to register %s regulator\n",
1185 pdev->name);
1186 return PTR_ERR(rdev);
1187 }
1188
1189 /* Save regulator for cleanup */
1190 pmic->rdev[i] = rdev;
1191 }
1192 return 0;
1193 }
1194
1195 static void tps65910_shutdown(struct platform_device *pdev)
1196 {
1197 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
1198 int i;
1199
1200 /*
1201 * Before bootloader jumps to kernel, it makes sure that required
1202 * external control signals are in desired state so that given rails
1203 * can be configure accordingly.
1204 * If rails are configured to be controlled from external control
1205 * then before shutting down/rebooting the system, the external
1206 * control configuration need to be remove from the rails so that
1207 * its output will be available as per register programming even
1208 * if external controls are removed. This is require when the POR
1209 * value of the control signals are not in active state and before
1210 * bootloader initializes it, the system requires the rail output
1211 * to be active for booting.
1212 */
1213 for (i = 0; i < pmic->num_regulators; i++) {
1214 int err;
1215 if (!pmic->rdev[i])
1216 continue;
1217
1218 err = tps65910_set_ext_sleep_config(pmic, i, 0);
1219 if (err < 0)
1220 dev_err(&pdev->dev,
1221 "Error in clearing external control\n");
1222 }
1223 }
1224
1225 static struct platform_driver tps65910_driver = {
1226 .driver = {
1227 .name = "tps65910-pmic",
1228 .owner = THIS_MODULE,
1229 },
1230 .probe = tps65910_probe,
1231 .shutdown = tps65910_shutdown,
1232 };
1233
1234 static int __init tps65910_init(void)
1235 {
1236 return platform_driver_register(&tps65910_driver);
1237 }
1238 subsys_initcall(tps65910_init);
1239
1240 static void __exit tps65910_cleanup(void)
1241 {
1242 platform_driver_unregister(&tps65910_driver);
1243 }
1244 module_exit(tps65910_cleanup);
1245
1246 MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
1247 MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
1248 MODULE_LICENSE("GPL v2");
1249 MODULE_ALIAS("platform:tps65910-pmic");
Linux with added FPC-III support