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Merge remote-tracking branches 'asoc/topic/sgtl5000', 'asoc/topic/simple', 'asoc...
[linux/fpc-iii.git] / drivers / hwmon / w83627hf.c
blob721295b9a05176704b156e7dd799ad17da5edd86
1 /*
2 * w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring
4 * Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
5 * Philip Edelbrock <phil@netroedge.com>,
6 * and Mark Studebaker <mdsxyz123@yahoo.com>
7 * Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
8 * Copyright (c) 2007 - 1012 Jean Delvare <jdelvare@suse.de>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25 /*
26 * Supports following chips:
27 *
28 * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
29 * w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
30 * w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
31 * w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
32 * w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
33 * w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
34 *
35 * For other winbond chips, and for i2c support in the above chips,
36 * use w83781d.c.
37 *
38 * Note: automatic ("cruise") fan control for 697, 637 & 627thf not
39 * supported yet.
40 */
41
42 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
43
44 #include <linux/module.h>
45 #include <linux/init.h>
46 #include <linux/slab.h>
47 #include <linux/jiffies.h>
48 #include <linux/platform_device.h>
49 #include <linux/hwmon.h>
50 #include <linux/hwmon-sysfs.h>
51 #include <linux/hwmon-vid.h>
52 #include <linux/err.h>
53 #include <linux/mutex.h>
54 #include <linux/ioport.h>
55 #include <linux/acpi.h>
56 #include <linux/io.h>
57 #include "lm75.h"
58
59 static struct platform_device *pdev;
60
61 #define DRVNAME "w83627hf"
62 enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf };
63
64 struct w83627hf_sio_data {
65 enum chips type;
66 int sioaddr;
67 };
68
69 static u8 force_i2c = 0x1f;
70 module_param(force_i2c, byte, 0);
71 MODULE_PARM_DESC(force_i2c,
72 "Initialize the i2c address of the sensors");
73
74 static bool init = 1;
75 module_param(init, bool, 0);
76 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
77
78 static unsigned short force_id;
79 module_param(force_id, ushort, 0);
80 MODULE_PARM_DESC(force_id, "Override the detected device ID");
81
82 /* modified from kernel/include/traps.c */
83 #define DEV 0x07 /* Register: Logical device select */
84
85 /* logical device numbers for superio_select (below) */
86 #define W83627HF_LD_FDC 0x00
87 #define W83627HF_LD_PRT 0x01
88 #define W83627HF_LD_UART1 0x02
89 #define W83627HF_LD_UART2 0x03
90 #define W83627HF_LD_KBC 0x05
91 #define W83627HF_LD_CIR 0x06 /* w83627hf only */
92 #define W83627HF_LD_GAME 0x07
93 #define W83627HF_LD_MIDI 0x07
94 #define W83627HF_LD_GPIO1 0x07
95 #define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
96 #define W83627HF_LD_GPIO2 0x08
97 #define W83627HF_LD_GPIO3 0x09
98 #define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
99 #define W83627HF_LD_ACPI 0x0a
100 #define W83627HF_LD_HWM 0x0b
101
102 #define DEVID 0x20 /* Register: Device ID */
103
104 #define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
105 #define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
106 #define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
107
108 #define W83687THF_VID_EN 0x29 /* w83687thf only */
109 #define W83687THF_VID_CFG 0xF0 /* w83687thf only */
110 #define W83687THF_VID_DATA 0xF1 /* w83687thf only */
111
112 static inline void
113 superio_outb(struct w83627hf_sio_data *sio, int reg, int val)
114 {
115 outb(reg, sio->sioaddr);
116 outb(val, sio->sioaddr + 1);
117 }
118
119 static inline int
120 superio_inb(struct w83627hf_sio_data *sio, int reg)
121 {
122 outb(reg, sio->sioaddr);
123 return inb(sio->sioaddr + 1);
124 }
125
126 static inline void
127 superio_select(struct w83627hf_sio_data *sio, int ld)
128 {
129 outb(DEV, sio->sioaddr);
130 outb(ld, sio->sioaddr + 1);
131 }
132
133 static inline void
134 superio_enter(struct w83627hf_sio_data *sio)
135 {
136 outb(0x87, sio->sioaddr);
137 outb(0x87, sio->sioaddr);
138 }
139
140 static inline void
141 superio_exit(struct w83627hf_sio_data *sio)
142 {
143 outb(0xAA, sio->sioaddr);
144 }
145
146 #define W627_DEVID 0x52
147 #define W627THF_DEVID 0x82
148 #define W697_DEVID 0x60
149 #define W637_DEVID 0x70
150 #define W687THF_DEVID 0x85
151 #define WINB_ACT_REG 0x30
152 #define WINB_BASE_REG 0x60
153 /* Constants specified below */
154
155 /* Alignment of the base address */
156 #define WINB_ALIGNMENT ~7
157
158 /* Offset & size of I/O region we are interested in */
159 #define WINB_REGION_OFFSET 5
160 #define WINB_REGION_SIZE 2
161
162 /* Where are the sensors address/data registers relative to the region offset */
163 #define W83781D_ADDR_REG_OFFSET 0
164 #define W83781D_DATA_REG_OFFSET 1
165
166 /* The W83781D registers */
167 /* The W83782D registers for nr=7,8 are in bank 5 */
168 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
169 (0x554 + (((nr) - 7) * 2)))
170 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
171 (0x555 + (((nr) - 7) * 2)))
172 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
173 (0x550 + (nr) - 7))
174
175 /* nr:0-2 for fans:1-3 */
176 #define W83627HF_REG_FAN_MIN(nr) (0x3b + (nr))
177 #define W83627HF_REG_FAN(nr) (0x28 + (nr))
178
179 #define W83627HF_REG_TEMP2_CONFIG 0x152
180 #define W83627HF_REG_TEMP3_CONFIG 0x252
181 /* these are zero-based, unlike config constants above */
182 static const u16 w83627hf_reg_temp[] = { 0x27, 0x150, 0x250 };
183 static const u16 w83627hf_reg_temp_hyst[] = { 0x3A, 0x153, 0x253 };
184 static const u16 w83627hf_reg_temp_over[] = { 0x39, 0x155, 0x255 };
185
186 #define W83781D_REG_BANK 0x4E
187
188 #define W83781D_REG_CONFIG 0x40
189 #define W83781D_REG_ALARM1 0x459
190 #define W83781D_REG_ALARM2 0x45A
191 #define W83781D_REG_ALARM3 0x45B
192
193 #define W83781D_REG_BEEP_CONFIG 0x4D
194 #define W83781D_REG_BEEP_INTS1 0x56
195 #define W83781D_REG_BEEP_INTS2 0x57
196 #define W83781D_REG_BEEP_INTS3 0x453
197
198 #define W83781D_REG_VID_FANDIV 0x47
199
200 #define W83781D_REG_CHIPID 0x49
201 #define W83781D_REG_WCHIPID 0x58
202 #define W83781D_REG_CHIPMAN 0x4F
203 #define W83781D_REG_PIN 0x4B
204
205 #define W83781D_REG_VBAT 0x5D
206
207 #define W83627HF_REG_PWM1 0x5A
208 #define W83627HF_REG_PWM2 0x5B
209
210 static const u8 W83627THF_REG_PWM_ENABLE[] = {
211 0x04, /* FAN 1 mode */
212 0x04, /* FAN 2 mode */
213 0x12, /* FAN AUX mode */
214 };
215 static const u8 W83627THF_PWM_ENABLE_SHIFT[] = { 2, 4, 1 };
216
217 #define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */
218 #define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */
219 #define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */
220
221 #define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */
222
223 static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
224 static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
225 W83627THF_REG_PWM3 };
226 #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
227 regpwm_627hf[nr] : regpwm[nr])
228
229 #define W83627HF_REG_PWM_FREQ 0x5C /* Only for the 627HF */
230
231 #define W83637HF_REG_PWM_FREQ1 0x00 /* 697HF/687THF too */
232 #define W83637HF_REG_PWM_FREQ2 0x02 /* 697HF/687THF too */
233 #define W83637HF_REG_PWM_FREQ3 0x10 /* 687THF too */
234
235 static const u8 W83637HF_REG_PWM_FREQ[] = { W83637HF_REG_PWM_FREQ1,
236 W83637HF_REG_PWM_FREQ2,
237 W83637HF_REG_PWM_FREQ3 };
238
239 #define W83627HF_BASE_PWM_FREQ 46870
240
241 #define W83781D_REG_I2C_ADDR 0x48
242 #define W83781D_REG_I2C_SUBADDR 0x4A
243
244 /* Sensor selection */
245 #define W83781D_REG_SCFG1 0x5D
246 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
247 #define W83781D_REG_SCFG2 0x59
248 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
249 #define W83781D_DEFAULT_BETA 3435
250
251 /*
252 * Conversions. Limit checking is only done on the TO_REG
253 * variants. Note that you should be a bit careful with which arguments
254 * these macros are called: arguments may be evaluated more than once.
255 * Fixing this is just not worth it.
256 */
257 #define IN_TO_REG(val) (clamp_val((((val) + 8) / 16), 0, 255))
258 #define IN_FROM_REG(val) ((val) * 16)
259
260 static inline u8 FAN_TO_REG(long rpm, int div)
261 {
262 if (rpm == 0)
263 return 255;
264 rpm = clamp_val(rpm, 1, 1000000);
265 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
266 }
267
268 #define TEMP_MIN (-128000)
269 #define TEMP_MAX ( 127000)
270
271 /*
272 * TEMP: 0.001C/bit (-128C to +127C)
273 * REG: 1C/bit, two's complement
274 */
275 static u8 TEMP_TO_REG(long temp)
276 {
277 int ntemp = clamp_val(temp, TEMP_MIN, TEMP_MAX);
278 ntemp += (ntemp < 0 ? -500 : 500);
279 return (u8)(ntemp / 1000);
280 }
281
282 static int TEMP_FROM_REG(u8 reg)
283 {
284 return (s8)reg * 1000;
285 }
286
287 #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
288
289 #define PWM_TO_REG(val) (clamp_val((val), 0, 255))
290
291 static inline unsigned long pwm_freq_from_reg_627hf(u8 reg)
292 {
293 unsigned long freq;
294 freq = W83627HF_BASE_PWM_FREQ >> reg;
295 return freq;
296 }
297 static inline u8 pwm_freq_to_reg_627hf(unsigned long val)
298 {
299 u8 i;
300 /*
301 * Only 5 dividers (1 2 4 8 16)
302 * Search for the nearest available frequency
303 */
304 for (i = 0; i < 4; i++) {
305 if (val > (((W83627HF_BASE_PWM_FREQ >> i) +
306 (W83627HF_BASE_PWM_FREQ >> (i+1))) / 2))
307 break;
308 }
309 return i;
310 }
311
312 static inline unsigned long pwm_freq_from_reg(u8 reg)
313 {
314 /* Clock bit 8 -> 180 kHz or 24 MHz */
315 unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL;
316
317 reg &= 0x7f;
318 /* This should not happen but anyway... */
319 if (reg == 0)
320 reg++;
321 return clock / (reg << 8);
322 }
323 static inline u8 pwm_freq_to_reg(unsigned long val)
324 {
325 /* Minimum divider value is 0x01 and maximum is 0x7F */
326 if (val >= 93750) /* The highest we can do */
327 return 0x01;
328 if (val >= 720) /* Use 24 MHz clock */
329 return 24000000UL / (val << 8);
330 if (val < 6) /* The lowest we can do */
331 return 0xFF;
332 else /* Use 180 kHz clock */
333 return 0x80 | (180000UL / (val << 8));
334 }
335
336 #define BEEP_MASK_FROM_REG(val) ((val) & 0xff7fff)
337 #define BEEP_MASK_TO_REG(val) ((val) & 0xff7fff)
338
339 #define DIV_FROM_REG(val) (1 << (val))
340
341 static inline u8 DIV_TO_REG(long val)
342 {
343 int i;
344 val = clamp_val(val, 1, 128) >> 1;
345 for (i = 0; i < 7; i++) {
346 if (val == 0)
347 break;
348 val >>= 1;
349 }
350 return (u8)i;
351 }
352
353 /*
354 * For each registered chip, we need to keep some data in memory.
355 * The structure is dynamically allocated.
356 */
357 struct w83627hf_data {
358 unsigned short addr;
359 const char *name;
360 struct device *hwmon_dev;
361 struct mutex lock;
362 enum chips type;
363
364 struct mutex update_lock;
365 char valid; /* !=0 if following fields are valid */
366 unsigned long last_updated; /* In jiffies */
367
368 u8 in[9]; /* Register value */
369 u8 in_max[9]; /* Register value */
370 u8 in_min[9]; /* Register value */
371 u8 fan[3]; /* Register value */
372 u8 fan_min[3]; /* Register value */
373 u16 temp[3]; /* Register value */
374 u16 temp_max[3]; /* Register value */
375 u16 temp_max_hyst[3]; /* Register value */
376 u8 fan_div[3]; /* Register encoding, shifted right */
377 u8 vid; /* Register encoding, combined */
378 u32 alarms; /* Register encoding, combined */
379 u32 beep_mask; /* Register encoding, combined */
380 u8 pwm[3]; /* Register value */
381 u8 pwm_enable[3]; /* 1 = manual
382 * 2 = thermal cruise (also called SmartFan I)
383 * 3 = fan speed cruise
384 */
385 u8 pwm_freq[3]; /* Register value */
386 u16 sens[3]; /* 1 = pentium diode; 2 = 3904 diode;
387 * 4 = thermistor
388 */
389 u8 vrm;
390 u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */
391
392 #ifdef CONFIG_PM
393 /* Remember extra register values over suspend/resume */
394 u8 scfg1;
395 u8 scfg2;
396 #endif
397 };
398
399
400 static int w83627hf_probe(struct platform_device *pdev);
401 static int w83627hf_remove(struct platform_device *pdev);
402
403 static int w83627hf_read_value(struct w83627hf_data *data, u16 reg);
404 static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value);
405 static void w83627hf_update_fan_div(struct w83627hf_data *data);
406 static struct w83627hf_data *w83627hf_update_device(struct device *dev);
407 static void w83627hf_init_device(struct platform_device *pdev);
408
409 #ifdef CONFIG_PM
410 static int w83627hf_suspend(struct device *dev)
411 {
412 struct w83627hf_data *data = w83627hf_update_device(dev);
413
414 mutex_lock(&data->update_lock);
415 data->scfg1 = w83627hf_read_value(data, W83781D_REG_SCFG1);
416 data->scfg2 = w83627hf_read_value(data, W83781D_REG_SCFG2);
417 mutex_unlock(&data->update_lock);
418
419 return 0;
420 }
421
422 static int w83627hf_resume(struct device *dev)
423 {
424 struct w83627hf_data *data = dev_get_drvdata(dev);
425 int i, num_temps = (data->type == w83697hf) ? 2 : 3;
426
427 /* Restore limits */
428 mutex_lock(&data->update_lock);
429 for (i = 0; i <= 8; i++) {
430 /* skip missing sensors */
431 if (((data->type == w83697hf) && (i == 1)) ||
432 ((data->type != w83627hf && data->type != w83697hf)
433 && (i == 5 || i == 6)))
434 continue;
435 w83627hf_write_value(data, W83781D_REG_IN_MAX(i),
436 data->in_max[i]);
437 w83627hf_write_value(data, W83781D_REG_IN_MIN(i),
438 data->in_min[i]);
439 }
440 for (i = 0; i <= 2; i++)
441 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(i),
442 data->fan_min[i]);
443 for (i = 0; i < num_temps; i++) {
444 w83627hf_write_value(data, w83627hf_reg_temp_over[i],
445 data->temp_max[i]);
446 w83627hf_write_value(data, w83627hf_reg_temp_hyst[i],
447 data->temp_max_hyst[i]);
448 }
449
450 /* Fixup BIOS bugs */
451 if (data->type == w83627thf || data->type == w83637hf ||
452 data->type == w83687thf)
453 w83627hf_write_value(data, W83627THF_REG_VRM_OVT_CFG,
454 data->vrm_ovt);
455 w83627hf_write_value(data, W83781D_REG_SCFG1, data->scfg1);
456 w83627hf_write_value(data, W83781D_REG_SCFG2, data->scfg2);
457
458 /* Force re-reading all values */
459 data->valid = 0;
460 mutex_unlock(&data->update_lock);
461
462 return 0;
463 }
464
465 static const struct dev_pm_ops w83627hf_dev_pm_ops = {
466 .suspend = w83627hf_suspend,
467 .resume = w83627hf_resume,
468 };
469
470 #define W83627HF_DEV_PM_OPS (&w83627hf_dev_pm_ops)
471 #else
472 #define W83627HF_DEV_PM_OPS NULL
473 #endif /* CONFIG_PM */
474
475 static struct platform_driver w83627hf_driver = {
476 .driver = {
477 .name = DRVNAME,
478 .pm = W83627HF_DEV_PM_OPS,
479 },
480 .probe = w83627hf_probe,
481 .remove = w83627hf_remove,
482 };
483
484 static ssize_t
485 show_in_input(struct device *dev, struct device_attribute *devattr, char *buf)
486 {
487 int nr = to_sensor_dev_attr(devattr)->index;
488 struct w83627hf_data *data = w83627hf_update_device(dev);
489 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in[nr]));
490 }
491 static ssize_t
492 show_in_min(struct device *dev, struct device_attribute *devattr, char *buf)
493 {
494 int nr = to_sensor_dev_attr(devattr)->index;
495 struct w83627hf_data *data = w83627hf_update_device(dev);
496 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_min[nr]));
497 }
498 static ssize_t
499 show_in_max(struct device *dev, struct device_attribute *devattr, char *buf)
500 {
501 int nr = to_sensor_dev_attr(devattr)->index;
502 struct w83627hf_data *data = w83627hf_update_device(dev);
503 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_max[nr]));
504 }
505 static ssize_t
506 store_in_min(struct device *dev, struct device_attribute *devattr,
507 const char *buf, size_t count)
508 {
509 int nr = to_sensor_dev_attr(devattr)->index;
510 struct w83627hf_data *data = dev_get_drvdata(dev);
511 long val;
512 int err;
513
514 err = kstrtol(buf, 10, &val);
515 if (err)
516 return err;
517
518 mutex_lock(&data->update_lock);
519 data->in_min[nr] = IN_TO_REG(val);
520 w83627hf_write_value(data, W83781D_REG_IN_MIN(nr), data->in_min[nr]);
521 mutex_unlock(&data->update_lock);
522 return count;
523 }
524 static ssize_t
525 store_in_max(struct device *dev, struct device_attribute *devattr,
526 const char *buf, size_t count)
527 {
528 int nr = to_sensor_dev_attr(devattr)->index;
529 struct w83627hf_data *data = dev_get_drvdata(dev);
530 long val;
531 int err;
532
533 err = kstrtol(buf, 10, &val);
534 if (err)
535 return err;
536
537 mutex_lock(&data->update_lock);
538 data->in_max[nr] = IN_TO_REG(val);
539 w83627hf_write_value(data, W83781D_REG_IN_MAX(nr), data->in_max[nr]);
540 mutex_unlock(&data->update_lock);
541 return count;
542 }
543 #define sysfs_vin_decl(offset) \
544 static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
545 show_in_input, NULL, offset); \
546 static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO|S_IWUSR, \
547 show_in_min, store_in_min, offset); \
548 static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO|S_IWUSR, \
549 show_in_max, store_in_max, offset);
550
551 sysfs_vin_decl(1);
552 sysfs_vin_decl(2);
553 sysfs_vin_decl(3);
554 sysfs_vin_decl(4);
555 sysfs_vin_decl(5);
556 sysfs_vin_decl(6);
557 sysfs_vin_decl(7);
558 sysfs_vin_decl(8);
559
560 /* use a different set of functions for in0 */
561 static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
562 {
563 long in0;
564
565 if ((data->vrm_ovt & 0x01) &&
566 (w83627thf == data->type || w83637hf == data->type
567 || w83687thf == data->type))
568
569 /* use VRM9 calculation */
570 in0 = (long)((reg * 488 + 70000 + 50) / 100);
571 else
572 /* use VRM8 (standard) calculation */
573 in0 = (long)IN_FROM_REG(reg);
574
575 return sprintf(buf,"%ld\n", in0);
576 }
577
578 static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf)
579 {
580 struct w83627hf_data *data = w83627hf_update_device(dev);
581 return show_in_0(data, buf, data->in[0]);
582 }
583
584 static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf)
585 {
586 struct w83627hf_data *data = w83627hf_update_device(dev);
587 return show_in_0(data, buf, data->in_min[0]);
588 }
589
590 static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf)
591 {
592 struct w83627hf_data *data = w83627hf_update_device(dev);
593 return show_in_0(data, buf, data->in_max[0]);
594 }
595
596 static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr,
597 const char *buf, size_t count)
598 {
599 struct w83627hf_data *data = dev_get_drvdata(dev);
600 unsigned long val;
601 int err;
602
603 err = kstrtoul(buf, 10, &val);
604 if (err)
605 return err;
606
607 mutex_lock(&data->update_lock);
608
609 if ((data->vrm_ovt & 0x01) &&
610 (w83627thf == data->type || w83637hf == data->type
611 || w83687thf == data->type))
612
613 /* use VRM9 calculation */
614 data->in_min[0] =
615 clamp_val(((val * 100) - 70000 + 244) / 488, 0, 255);
616 else
617 /* use VRM8 (standard) calculation */
618 data->in_min[0] = IN_TO_REG(val);
619
620 w83627hf_write_value(data, W83781D_REG_IN_MIN(0), data->in_min[0]);
621 mutex_unlock(&data->update_lock);
622 return count;
623 }
624
625 static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr,
626 const char *buf, size_t count)
627 {
628 struct w83627hf_data *data = dev_get_drvdata(dev);
629 unsigned long val;
630 int err;
631
632 err = kstrtoul(buf, 10, &val);
633 if (err)
634 return err;
635
636 mutex_lock(&data->update_lock);
637
638 if ((data->vrm_ovt & 0x01) &&
639 (w83627thf == data->type || w83637hf == data->type
640 || w83687thf == data->type))
641
642 /* use VRM9 calculation */
643 data->in_max[0] =
644 clamp_val(((val * 100) - 70000 + 244) / 488, 0, 255);
645 else
646 /* use VRM8 (standard) calculation */
647 data->in_max[0] = IN_TO_REG(val);
648
649 w83627hf_write_value(data, W83781D_REG_IN_MAX(0), data->in_max[0]);
650 mutex_unlock(&data->update_lock);
651 return count;
652 }
653
654 static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
655 static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
656 show_regs_in_min0, store_regs_in_min0);
657 static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
658 show_regs_in_max0, store_regs_in_max0);
659
660 static ssize_t
661 show_fan_input(struct device *dev, struct device_attribute *devattr, char *buf)
662 {
663 int nr = to_sensor_dev_attr(devattr)->index;
664 struct w83627hf_data *data = w83627hf_update_device(dev);
665 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan[nr],
666 (long)DIV_FROM_REG(data->fan_div[nr])));
667 }
668 static ssize_t
669 show_fan_min(struct device *dev, struct device_attribute *devattr, char *buf)
670 {
671 int nr = to_sensor_dev_attr(devattr)->index;
672 struct w83627hf_data *data = w83627hf_update_device(dev);
673 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan_min[nr],
674 (long)DIV_FROM_REG(data->fan_div[nr])));
675 }
676 static ssize_t
677 store_fan_min(struct device *dev, struct device_attribute *devattr,
678 const char *buf, size_t count)
679 {
680 int nr = to_sensor_dev_attr(devattr)->index;
681 struct w83627hf_data *data = dev_get_drvdata(dev);
682 unsigned long val;
683 int err;
684
685 err = kstrtoul(buf, 10, &val);
686 if (err)
687 return err;
688
689 mutex_lock(&data->update_lock);
690 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
691 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr),
692 data->fan_min[nr]);
693
694 mutex_unlock(&data->update_lock);
695 return count;
696 }
697 #define sysfs_fan_decl(offset) \
698 static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
699 show_fan_input, NULL, offset - 1); \
700 static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
701 show_fan_min, store_fan_min, offset - 1);
702
703 sysfs_fan_decl(1);
704 sysfs_fan_decl(2);
705 sysfs_fan_decl(3);
706
707 static ssize_t
708 show_temp(struct device *dev, struct device_attribute *devattr, char *buf)
709 {
710 int nr = to_sensor_dev_attr(devattr)->index;
711 struct w83627hf_data *data = w83627hf_update_device(dev);
712
713 u16 tmp = data->temp[nr];
714 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
715 : (long) TEMP_FROM_REG(tmp));
716 }
717
718 static ssize_t
719 show_temp_max(struct device *dev, struct device_attribute *devattr,
720 char *buf)
721 {
722 int nr = to_sensor_dev_attr(devattr)->index;
723 struct w83627hf_data *data = w83627hf_update_device(dev);
724
725 u16 tmp = data->temp_max[nr];
726 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
727 : (long) TEMP_FROM_REG(tmp));
728 }
729
730 static ssize_t
731 show_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
732 char *buf)
733 {
734 int nr = to_sensor_dev_attr(devattr)->index;
735 struct w83627hf_data *data = w83627hf_update_device(dev);
736
737 u16 tmp = data->temp_max_hyst[nr];
738 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
739 : (long) TEMP_FROM_REG(tmp));
740 }
741
742 static ssize_t
743 store_temp_max(struct device *dev, struct device_attribute *devattr,
744 const char *buf, size_t count)
745 {
746 int nr = to_sensor_dev_attr(devattr)->index;
747 struct w83627hf_data *data = dev_get_drvdata(dev);
748 u16 tmp;
749 long val;
750 int err;
751
752 err = kstrtol(buf, 10, &val);
753 if (err)
754 return err;
755
756 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
757 mutex_lock(&data->update_lock);
758 data->temp_max[nr] = tmp;
759 w83627hf_write_value(data, w83627hf_reg_temp_over[nr], tmp);
760 mutex_unlock(&data->update_lock);
761 return count;
762 }
763
764 static ssize_t
765 store_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
766 const char *buf, size_t count)
767 {
768 int nr = to_sensor_dev_attr(devattr)->index;
769 struct w83627hf_data *data = dev_get_drvdata(dev);
770 u16 tmp;
771 long val;
772 int err;
773
774 err = kstrtol(buf, 10, &val);
775 if (err)
776 return err;
777
778 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
779 mutex_lock(&data->update_lock);
780 data->temp_max_hyst[nr] = tmp;
781 w83627hf_write_value(data, w83627hf_reg_temp_hyst[nr], tmp);
782 mutex_unlock(&data->update_lock);
783 return count;
784 }
785
786 #define sysfs_temp_decl(offset) \
787 static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
788 show_temp, NULL, offset - 1); \
789 static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO|S_IWUSR, \
790 show_temp_max, store_temp_max, offset - 1); \
791 static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO|S_IWUSR, \
792 show_temp_max_hyst, store_temp_max_hyst, offset - 1);
793
794 sysfs_temp_decl(1);
795 sysfs_temp_decl(2);
796 sysfs_temp_decl(3);
797
798 static ssize_t
799 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
800 {
801 struct w83627hf_data *data = w83627hf_update_device(dev);
802 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
803 }
804 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
805
806 static ssize_t
807 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
808 {
809 struct w83627hf_data *data = dev_get_drvdata(dev);
810 return sprintf(buf, "%ld\n", (long) data->vrm);
811 }
812 static ssize_t
813 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
814 {
815 struct w83627hf_data *data = dev_get_drvdata(dev);
816 unsigned long val;
817 int err;
818
819 err = kstrtoul(buf, 10, &val);
820 if (err)
821 return err;
822
823 if (val > 255)
824 return -EINVAL;
825 data->vrm = val;
826
827 return count;
828 }
829 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
830
831 static ssize_t
832 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
833 {
834 struct w83627hf_data *data = w83627hf_update_device(dev);
835 return sprintf(buf, "%ld\n", (long) data->alarms);
836 }
837 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
838
839 static ssize_t
840 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
841 {
842 struct w83627hf_data *data = w83627hf_update_device(dev);
843 int bitnr = to_sensor_dev_attr(attr)->index;
844 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
845 }
846 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
847 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
848 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
849 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
850 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
851 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
852 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
853 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
854 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
855 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
856 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
857 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
858 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
859 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
860 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
861
862 static ssize_t
863 show_beep_mask(struct device *dev, struct device_attribute *attr, char *buf)
864 {
865 struct w83627hf_data *data = w83627hf_update_device(dev);
866 return sprintf(buf, "%ld\n",
867 (long)BEEP_MASK_FROM_REG(data->beep_mask));
868 }
869
870 static ssize_t
871 store_beep_mask(struct device *dev, struct device_attribute *attr,
872 const char *buf, size_t count)
873 {
874 struct w83627hf_data *data = dev_get_drvdata(dev);
875 unsigned long val;
876 int err;
877
878 err = kstrtoul(buf, 10, &val);
879 if (err)
880 return err;
881
882 mutex_lock(&data->update_lock);
883
884 /* preserve beep enable */
885 data->beep_mask = (data->beep_mask & 0x8000)
886 | BEEP_MASK_TO_REG(val);
887 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1,
888 data->beep_mask & 0xff);
889 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3,
890 ((data->beep_mask) >> 16) & 0xff);
891 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2,
892 (data->beep_mask >> 8) & 0xff);
893
894 mutex_unlock(&data->update_lock);
895 return count;
896 }
897
898 static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
899 show_beep_mask, store_beep_mask);
900
901 static ssize_t
902 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
903 {
904 struct w83627hf_data *data = w83627hf_update_device(dev);
905 int bitnr = to_sensor_dev_attr(attr)->index;
906 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
907 }
908
909 static ssize_t
910 store_beep(struct device *dev, struct device_attribute *attr,
911 const char *buf, size_t count)
912 {
913 struct w83627hf_data *data = dev_get_drvdata(dev);
914 int bitnr = to_sensor_dev_attr(attr)->index;
915 u8 reg;
916 unsigned long bit;
917 int err;
918
919 err = kstrtoul(buf, 10, &bit);
920 if (err)
921 return err;
922
923 if (bit & ~1)
924 return -EINVAL;
925
926 mutex_lock(&data->update_lock);
927 if (bit)
928 data->beep_mask |= (1 << bitnr);
929 else
930 data->beep_mask &= ~(1 << bitnr);
931
932 if (bitnr < 8) {
933 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS1);
934 if (bit)
935 reg |= (1 << bitnr);
936 else
937 reg &= ~(1 << bitnr);
938 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1, reg);
939 } else if (bitnr < 16) {
940 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
941 if (bit)
942 reg |= (1 << (bitnr - 8));
943 else
944 reg &= ~(1 << (bitnr - 8));
945 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, reg);
946 } else {
947 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS3);
948 if (bit)
949 reg |= (1 << (bitnr - 16));
950 else
951 reg &= ~(1 << (bitnr - 16));
952 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3, reg);
953 }
954 mutex_unlock(&data->update_lock);
955
956 return count;
957 }
958
959 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
960 show_beep, store_beep, 0);
961 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
962 show_beep, store_beep, 1);
963 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
964 show_beep, store_beep, 2);
965 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
966 show_beep, store_beep, 3);
967 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
968 show_beep, store_beep, 8);
969 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
970 show_beep, store_beep, 9);
971 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
972 show_beep, store_beep, 10);
973 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
974 show_beep, store_beep, 16);
975 static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
976 show_beep, store_beep, 17);
977 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
978 show_beep, store_beep, 6);
979 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
980 show_beep, store_beep, 7);
981 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
982 show_beep, store_beep, 11);
983 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
984 show_beep, store_beep, 4);
985 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
986 show_beep, store_beep, 5);
987 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO | S_IWUSR,
988 show_beep, store_beep, 13);
989 static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
990 show_beep, store_beep, 15);
991
992 static ssize_t
993 show_fan_div(struct device *dev, struct device_attribute *devattr, char *buf)
994 {
995 int nr = to_sensor_dev_attr(devattr)->index;
996 struct w83627hf_data *data = w83627hf_update_device(dev);
997 return sprintf(buf, "%ld\n",
998 (long) DIV_FROM_REG(data->fan_div[nr]));
999 }
1000 /*
1001 * Note: we save and restore the fan minimum here, because its value is
1002 * determined in part by the fan divisor. This follows the principle of
1003 * least surprise; the user doesn't expect the fan minimum to change just
1004 * because the divisor changed.
1005 */
1006 static ssize_t
1007 store_fan_div(struct device *dev, struct device_attribute *devattr,
1008 const char *buf, size_t count)
1009 {
1010 int nr = to_sensor_dev_attr(devattr)->index;
1011 struct w83627hf_data *data = dev_get_drvdata(dev);
1012 unsigned long min;
1013 u8 reg;
1014 unsigned long val;
1015 int err;
1016
1017 err = kstrtoul(buf, 10, &val);
1018 if (err)
1019 return err;
1020
1021 mutex_lock(&data->update_lock);
1022
1023 /* Save fan_min */
1024 min = FAN_FROM_REG(data->fan_min[nr],
1025 DIV_FROM_REG(data->fan_div[nr]));
1026
1027 data->fan_div[nr] = DIV_TO_REG(val);
1028
1029 reg = (w83627hf_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
1030 & (nr==0 ? 0xcf : 0x3f))
1031 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
1032 w83627hf_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
1033
1034 reg = (w83627hf_read_value(data, W83781D_REG_VBAT)
1035 & ~(1 << (5 + nr)))
1036 | ((data->fan_div[nr] & 0x04) << (3 + nr));
1037 w83627hf_write_value(data, W83781D_REG_VBAT, reg);
1038
1039 /* Restore fan_min */
1040 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1041 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr), data->fan_min[nr]);
1042
1043 mutex_unlock(&data->update_lock);
1044 return count;
1045 }
1046
1047 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO|S_IWUSR,
1048 show_fan_div, store_fan_div, 0);
1049 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO|S_IWUSR,
1050 show_fan_div, store_fan_div, 1);
1051 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO|S_IWUSR,
1052 show_fan_div, store_fan_div, 2);
1053
1054 static ssize_t
1055 show_pwm(struct device *dev, struct device_attribute *devattr, char *buf)
1056 {
1057 int nr = to_sensor_dev_attr(devattr)->index;
1058 struct w83627hf_data *data = w83627hf_update_device(dev);
1059 return sprintf(buf, "%ld\n", (long) data->pwm[nr]);
1060 }
1061
1062 static ssize_t
1063 store_pwm(struct device *dev, struct device_attribute *devattr,
1064 const char *buf, size_t count)
1065 {
1066 int nr = to_sensor_dev_attr(devattr)->index;
1067 struct w83627hf_data *data = dev_get_drvdata(dev);
1068 unsigned long val;
1069 int err;
1070
1071 err = kstrtoul(buf, 10, &val);
1072 if (err)
1073 return err;
1074
1075 mutex_lock(&data->update_lock);
1076
1077 if (data->type == w83627thf) {
1078 /* bits 0-3 are reserved in 627THF */
1079 data->pwm[nr] = PWM_TO_REG(val) & 0xf0;
1080 w83627hf_write_value(data,
1081 W836X7HF_REG_PWM(data->type, nr),
1082 data->pwm[nr] |
1083 (w83627hf_read_value(data,
1084 W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
1085 } else {
1086 data->pwm[nr] = PWM_TO_REG(val);
1087 w83627hf_write_value(data,
1088 W836X7HF_REG_PWM(data->type, nr),
1089 data->pwm[nr]);
1090 }
1091
1092 mutex_unlock(&data->update_lock);
1093 return count;
1094 }
1095
1096 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0);
1097 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 1);
1098 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 2);
1099
1100 static ssize_t
1101 show_pwm_enable(struct device *dev, struct device_attribute *devattr, char *buf)
1102 {
1103 int nr = to_sensor_dev_attr(devattr)->index;
1104 struct w83627hf_data *data = w83627hf_update_device(dev);
1105 return sprintf(buf, "%d\n", data->pwm_enable[nr]);
1106 }
1107
1108 static ssize_t
1109 store_pwm_enable(struct device *dev, struct device_attribute *devattr,
1110 const char *buf, size_t count)
1111 {
1112 int nr = to_sensor_dev_attr(devattr)->index;
1113 struct w83627hf_data *data = dev_get_drvdata(dev);
1114 u8 reg;
1115 unsigned long val;
1116 int err;
1117
1118 err = kstrtoul(buf, 10, &val);
1119 if (err)
1120 return err;
1121
1122 if (!val || val > 3) /* modes 1, 2 and 3 are supported */
1123 return -EINVAL;
1124 mutex_lock(&data->update_lock);
1125 data->pwm_enable[nr] = val;
1126 reg = w83627hf_read_value(data, W83627THF_REG_PWM_ENABLE[nr]);
1127 reg &= ~(0x03 << W83627THF_PWM_ENABLE_SHIFT[nr]);
1128 reg |= (val - 1) << W83627THF_PWM_ENABLE_SHIFT[nr];
1129 w83627hf_write_value(data, W83627THF_REG_PWM_ENABLE[nr], reg);
1130 mutex_unlock(&data->update_lock);
1131 return count;
1132 }
1133
1134 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
1135 store_pwm_enable, 0);
1136 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
1137 store_pwm_enable, 1);
1138 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
1139 store_pwm_enable, 2);
1140
1141 static ssize_t
1142 show_pwm_freq(struct device *dev, struct device_attribute *devattr, char *buf)
1143 {
1144 int nr = to_sensor_dev_attr(devattr)->index;
1145 struct w83627hf_data *data = w83627hf_update_device(dev);
1146 if (data->type == w83627hf)
1147 return sprintf(buf, "%ld\n",
1148 pwm_freq_from_reg_627hf(data->pwm_freq[nr]));
1149 else
1150 return sprintf(buf, "%ld\n",
1151 pwm_freq_from_reg(data->pwm_freq[nr]));
1152 }
1153
1154 static ssize_t
1155 store_pwm_freq(struct device *dev, struct device_attribute *devattr,
1156 const char *buf, size_t count)
1157 {
1158 int nr = to_sensor_dev_attr(devattr)->index;
1159 struct w83627hf_data *data = dev_get_drvdata(dev);
1160 static const u8 mask[]={0xF8, 0x8F};
1161 unsigned long val;
1162 int err;
1163
1164 err = kstrtoul(buf, 10, &val);
1165 if (err)
1166 return err;
1167
1168 mutex_lock(&data->update_lock);
1169
1170 if (data->type == w83627hf) {
1171 data->pwm_freq[nr] = pwm_freq_to_reg_627hf(val);
1172 w83627hf_write_value(data, W83627HF_REG_PWM_FREQ,
1173 (data->pwm_freq[nr] << (nr*4)) |
1174 (w83627hf_read_value(data,
1175 W83627HF_REG_PWM_FREQ) & mask[nr]));
1176 } else {
1177 data->pwm_freq[nr] = pwm_freq_to_reg(val);
1178 w83627hf_write_value(data, W83637HF_REG_PWM_FREQ[nr],
1179 data->pwm_freq[nr]);
1180 }
1181
1182 mutex_unlock(&data->update_lock);
1183 return count;
1184 }
1185
1186 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO|S_IWUSR,
1187 show_pwm_freq, store_pwm_freq, 0);
1188 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO|S_IWUSR,
1189 show_pwm_freq, store_pwm_freq, 1);
1190 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO|S_IWUSR,
1191 show_pwm_freq, store_pwm_freq, 2);
1192
1193 static ssize_t
1194 show_temp_type(struct device *dev, struct device_attribute *devattr,
1195 char *buf)
1196 {
1197 int nr = to_sensor_dev_attr(devattr)->index;
1198 struct w83627hf_data *data = w83627hf_update_device(dev);
1199 return sprintf(buf, "%ld\n", (long) data->sens[nr]);
1200 }
1201
1202 static ssize_t
1203 store_temp_type(struct device *dev, struct device_attribute *devattr,
1204 const char *buf, size_t count)
1205 {
1206 int nr = to_sensor_dev_attr(devattr)->index;
1207 struct w83627hf_data *data = dev_get_drvdata(dev);
1208 unsigned long val;
1209 u32 tmp;
1210 int err;
1211
1212 err = kstrtoul(buf, 10, &val);
1213 if (err)
1214 return err;
1215
1216 mutex_lock(&data->update_lock);
1217
1218 switch (val) {
1219 case 1: /* PII/Celeron diode */
1220 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1221 w83627hf_write_value(data, W83781D_REG_SCFG1,
1222 tmp | BIT_SCFG1[nr]);
1223 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
1224 w83627hf_write_value(data, W83781D_REG_SCFG2,
1225 tmp | BIT_SCFG2[nr]);
1226 data->sens[nr] = val;
1227 break;
1228 case 2: /* 3904 */
1229 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1230 w83627hf_write_value(data, W83781D_REG_SCFG1,
1231 tmp | BIT_SCFG1[nr]);
1232 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
1233 w83627hf_write_value(data, W83781D_REG_SCFG2,
1234 tmp & ~BIT_SCFG2[nr]);
1235 data->sens[nr] = val;
1236 break;
1237 case W83781D_DEFAULT_BETA:
1238 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
1239 "instead\n", W83781D_DEFAULT_BETA);
1240 /* fall through */
1241 case 4: /* thermistor */
1242 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1243 w83627hf_write_value(data, W83781D_REG_SCFG1,
1244 tmp & ~BIT_SCFG1[nr]);
1245 data->sens[nr] = val;
1246 break;
1247 default:
1248 dev_err(dev,
1249 "Invalid sensor type %ld; must be 1, 2, or 4\n",
1250 (long) val);
1251 break;
1252 }
1253
1254 mutex_unlock(&data->update_lock);
1255 return count;
1256 }
1257
1258 #define sysfs_temp_type(offset) \
1259 static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
1260 show_temp_type, store_temp_type, offset - 1);
1261
1262 sysfs_temp_type(1);
1263 sysfs_temp_type(2);
1264 sysfs_temp_type(3);
1265
1266 static ssize_t
1267 show_name(struct device *dev, struct device_attribute *devattr, char *buf)
1268 {
1269 struct w83627hf_data *data = dev_get_drvdata(dev);
1270
1271 return sprintf(buf, "%s\n", data->name);
1272 }
1273 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1274
1275 static int __init w83627hf_find(int sioaddr, unsigned short *addr,
1276 struct w83627hf_sio_data *sio_data)
1277 {
1278 int err = -ENODEV;
1279 u16 val;
1280
1281 static __initconst char *const names[] = {
1282 "W83627HF",
1283 "W83627THF",
1284 "W83697HF",
1285 "W83637HF",
1286 "W83687THF",
1287 };
1288
1289 sio_data->sioaddr = sioaddr;
1290 superio_enter(sio_data);
1291 val = force_id ? force_id : superio_inb(sio_data, DEVID);
1292 switch (val) {
1293 case W627_DEVID:
1294 sio_data->type = w83627hf;
1295 break;
1296 case W627THF_DEVID:
1297 sio_data->type = w83627thf;
1298 break;
1299 case W697_DEVID:
1300 sio_data->type = w83697hf;
1301 break;
1302 case W637_DEVID:
1303 sio_data->type = w83637hf;
1304 break;
1305 case W687THF_DEVID:
1306 sio_data->type = w83687thf;
1307 break;
1308 case 0xff: /* No device at all */
1309 goto exit;
1310 default:
1311 pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%02x)\n", val);
1312 goto exit;
1313 }
1314
1315 superio_select(sio_data, W83627HF_LD_HWM);
1316 val = (superio_inb(sio_data, WINB_BASE_REG) << 8) |
1317 superio_inb(sio_data, WINB_BASE_REG + 1);
1318 *addr = val & WINB_ALIGNMENT;
1319 if (*addr == 0) {
1320 pr_warn("Base address not set, skipping\n");
1321 goto exit;
1322 }
1323
1324 val = superio_inb(sio_data, WINB_ACT_REG);
1325 if (!(val & 0x01)) {
1326 pr_warn("Enabling HWM logical device\n");
1327 superio_outb(sio_data, WINB_ACT_REG, val | 0x01);
1328 }
1329
1330 err = 0;
1331 pr_info(DRVNAME ": Found %s chip at %#x\n",
1332 names[sio_data->type], *addr);
1333
1334 exit:
1335 superio_exit(sio_data);
1336 return err;
1337 }
1338
1339 #define VIN_UNIT_ATTRS(_X_) \
1340 &sensor_dev_attr_in##_X_##_input.dev_attr.attr, \
1341 &sensor_dev_attr_in##_X_##_min.dev_attr.attr, \
1342 &sensor_dev_attr_in##_X_##_max.dev_attr.attr, \
1343 &sensor_dev_attr_in##_X_##_alarm.dev_attr.attr, \
1344 &sensor_dev_attr_in##_X_##_beep.dev_attr.attr
1345
1346 #define FAN_UNIT_ATTRS(_X_) \
1347 &sensor_dev_attr_fan##_X_##_input.dev_attr.attr, \
1348 &sensor_dev_attr_fan##_X_##_min.dev_attr.attr, \
1349 &sensor_dev_attr_fan##_X_##_div.dev_attr.attr, \
1350 &sensor_dev_attr_fan##_X_##_alarm.dev_attr.attr, \
1351 &sensor_dev_attr_fan##_X_##_beep.dev_attr.attr
1352
1353 #define TEMP_UNIT_ATTRS(_X_) \
1354 &sensor_dev_attr_temp##_X_##_input.dev_attr.attr, \
1355 &sensor_dev_attr_temp##_X_##_max.dev_attr.attr, \
1356 &sensor_dev_attr_temp##_X_##_max_hyst.dev_attr.attr, \
1357 &sensor_dev_attr_temp##_X_##_type.dev_attr.attr, \
1358 &sensor_dev_attr_temp##_X_##_alarm.dev_attr.attr, \
1359 &sensor_dev_attr_temp##_X_##_beep.dev_attr.attr
1360
1361 static struct attribute *w83627hf_attributes[] = {
1362 &dev_attr_in0_input.attr,
1363 &dev_attr_in0_min.attr,
1364 &dev_attr_in0_max.attr,
1365 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1366 &sensor_dev_attr_in0_beep.dev_attr.attr,
1367 VIN_UNIT_ATTRS(2),
1368 VIN_UNIT_ATTRS(3),
1369 VIN_UNIT_ATTRS(4),
1370 VIN_UNIT_ATTRS(7),
1371 VIN_UNIT_ATTRS(8),
1372
1373 FAN_UNIT_ATTRS(1),
1374 FAN_UNIT_ATTRS(2),
1375
1376 TEMP_UNIT_ATTRS(1),
1377 TEMP_UNIT_ATTRS(2),
1378
1379 &dev_attr_alarms.attr,
1380 &sensor_dev_attr_beep_enable.dev_attr.attr,
1381 &dev_attr_beep_mask.attr,
1382
1383 &sensor_dev_attr_pwm1.dev_attr.attr,
1384 &sensor_dev_attr_pwm2.dev_attr.attr,
1385 &dev_attr_name.attr,
1386 NULL
1387 };
1388
1389 static const struct attribute_group w83627hf_group = {
1390 .attrs = w83627hf_attributes,
1391 };
1392
1393 static struct attribute *w83627hf_attributes_opt[] = {
1394 VIN_UNIT_ATTRS(1),
1395 VIN_UNIT_ATTRS(5),
1396 VIN_UNIT_ATTRS(6),
1397
1398 FAN_UNIT_ATTRS(3),
1399 TEMP_UNIT_ATTRS(3),
1400 &sensor_dev_attr_pwm3.dev_attr.attr,
1401
1402 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1403 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1404 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1405
1406 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1407 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1408 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1409
1410 NULL
1411 };
1412
1413 static const struct attribute_group w83627hf_group_opt = {
1414 .attrs = w83627hf_attributes_opt,
1415 };
1416
1417 static int w83627hf_probe(struct platform_device *pdev)
1418 {
1419 struct device *dev = &pdev->dev;
1420 struct w83627hf_sio_data *sio_data = dev_get_platdata(dev);
1421 struct w83627hf_data *data;
1422 struct resource *res;
1423 int err, i;
1424
1425 static const char *names[] = {
1426 "w83627hf",
1427 "w83627thf",
1428 "w83697hf",
1429 "w83637hf",
1430 "w83687thf",
1431 };
1432
1433 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1434 if (!devm_request_region(dev, res->start, WINB_REGION_SIZE, DRVNAME)) {
1435 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1436 (unsigned long)res->start,
1437 (unsigned long)(res->start + WINB_REGION_SIZE - 1));
1438 return -EBUSY;
1439 }
1440
1441 data = devm_kzalloc(dev, sizeof(struct w83627hf_data), GFP_KERNEL);
1442 if (!data)
1443 return -ENOMEM;
1444
1445 data->addr = res->start;
1446 data->type = sio_data->type;
1447 data->name = names[sio_data->type];
1448 mutex_init(&data->lock);
1449 mutex_init(&data->update_lock);
1450 platform_set_drvdata(pdev, data);
1451
1452 /* Initialize the chip */
1453 w83627hf_init_device(pdev);
1454
1455 /* A few vars need to be filled upon startup */
1456 for (i = 0; i <= 2; i++)
1457 data->fan_min[i] = w83627hf_read_value(
1458 data, W83627HF_REG_FAN_MIN(i));
1459 w83627hf_update_fan_div(data);
1460
1461 /* Register common device attributes */
1462 err = sysfs_create_group(&dev->kobj, &w83627hf_group);
1463 if (err)
1464 return err;
1465
1466 /* Register chip-specific device attributes */
1467 if (data->type == w83627hf || data->type == w83697hf)
1468 if ((err = device_create_file(dev,
1469 &sensor_dev_attr_in5_input.dev_attr))
1470 || (err = device_create_file(dev,
1471 &sensor_dev_attr_in5_min.dev_attr))
1472 || (err = device_create_file(dev,
1473 &sensor_dev_attr_in5_max.dev_attr))
1474 || (err = device_create_file(dev,
1475 &sensor_dev_attr_in5_alarm.dev_attr))
1476 || (err = device_create_file(dev,
1477 &sensor_dev_attr_in5_beep.dev_attr))
1478 || (err = device_create_file(dev,
1479 &sensor_dev_attr_in6_input.dev_attr))
1480 || (err = device_create_file(dev,
1481 &sensor_dev_attr_in6_min.dev_attr))
1482 || (err = device_create_file(dev,
1483 &sensor_dev_attr_in6_max.dev_attr))
1484 || (err = device_create_file(dev,
1485 &sensor_dev_attr_in6_alarm.dev_attr))
1486 || (err = device_create_file(dev,
1487 &sensor_dev_attr_in6_beep.dev_attr))
1488 || (err = device_create_file(dev,
1489 &sensor_dev_attr_pwm1_freq.dev_attr))
1490 || (err = device_create_file(dev,
1491 &sensor_dev_attr_pwm2_freq.dev_attr)))
1492 goto error;
1493
1494 if (data->type != w83697hf)
1495 if ((err = device_create_file(dev,
1496 &sensor_dev_attr_in1_input.dev_attr))
1497 || (err = device_create_file(dev,
1498 &sensor_dev_attr_in1_min.dev_attr))
1499 || (err = device_create_file(dev,
1500 &sensor_dev_attr_in1_max.dev_attr))
1501 || (err = device_create_file(dev,
1502 &sensor_dev_attr_in1_alarm.dev_attr))
1503 || (err = device_create_file(dev,
1504 &sensor_dev_attr_in1_beep.dev_attr))
1505 || (err = device_create_file(dev,
1506 &sensor_dev_attr_fan3_input.dev_attr))
1507 || (err = device_create_file(dev,
1508 &sensor_dev_attr_fan3_min.dev_attr))
1509 || (err = device_create_file(dev,
1510 &sensor_dev_attr_fan3_div.dev_attr))
1511 || (err = device_create_file(dev,
1512 &sensor_dev_attr_fan3_alarm.dev_attr))
1513 || (err = device_create_file(dev,
1514 &sensor_dev_attr_fan3_beep.dev_attr))
1515 || (err = device_create_file(dev,
1516 &sensor_dev_attr_temp3_input.dev_attr))
1517 || (err = device_create_file(dev,
1518 &sensor_dev_attr_temp3_max.dev_attr))
1519 || (err = device_create_file(dev,
1520 &sensor_dev_attr_temp3_max_hyst.dev_attr))
1521 || (err = device_create_file(dev,
1522 &sensor_dev_attr_temp3_alarm.dev_attr))
1523 || (err = device_create_file(dev,
1524 &sensor_dev_attr_temp3_beep.dev_attr))
1525 || (err = device_create_file(dev,
1526 &sensor_dev_attr_temp3_type.dev_attr)))
1527 goto error;
1528
1529 if (data->type != w83697hf && data->vid != 0xff) {
1530 /* Convert VID to voltage based on VRM */
1531 data->vrm = vid_which_vrm();
1532
1533 if ((err = device_create_file(dev, &dev_attr_cpu0_vid))
1534 || (err = device_create_file(dev, &dev_attr_vrm)))
1535 goto error;
1536 }
1537
1538 if (data->type == w83627thf || data->type == w83637hf
1539 || data->type == w83687thf) {
1540 err = device_create_file(dev, &sensor_dev_attr_pwm3.dev_attr);
1541 if (err)
1542 goto error;
1543 }
1544
1545 if (data->type == w83637hf || data->type == w83687thf)
1546 if ((err = device_create_file(dev,
1547 &sensor_dev_attr_pwm1_freq.dev_attr))
1548 || (err = device_create_file(dev,
1549 &sensor_dev_attr_pwm2_freq.dev_attr))
1550 || (err = device_create_file(dev,
1551 &sensor_dev_attr_pwm3_freq.dev_attr)))
1552 goto error;
1553
1554 if (data->type != w83627hf)
1555 if ((err = device_create_file(dev,
1556 &sensor_dev_attr_pwm1_enable.dev_attr))
1557 || (err = device_create_file(dev,
1558 &sensor_dev_attr_pwm2_enable.dev_attr)))
1559 goto error;
1560
1561 if (data->type == w83627thf || data->type == w83637hf
1562 || data->type == w83687thf) {
1563 err = device_create_file(dev,
1564 &sensor_dev_attr_pwm3_enable.dev_attr);
1565 if (err)
1566 goto error;
1567 }
1568
1569 data->hwmon_dev = hwmon_device_register(dev);
1570 if (IS_ERR(data->hwmon_dev)) {
1571 err = PTR_ERR(data->hwmon_dev);
1572 goto error;
1573 }
1574
1575 return 0;
1576
1577 error:
1578 sysfs_remove_group(&dev->kobj, &w83627hf_group);
1579 sysfs_remove_group(&dev->kobj, &w83627hf_group_opt);
1580 return err;
1581 }
1582
1583 static int w83627hf_remove(struct platform_device *pdev)
1584 {
1585 struct w83627hf_data *data = platform_get_drvdata(pdev);
1586
1587 hwmon_device_unregister(data->hwmon_dev);
1588
1589 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group);
1590 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group_opt);
1591
1592 return 0;
1593 }
1594
1595
1596 /* Registers 0x50-0x5f are banked */
1597 static inline void w83627hf_set_bank(struct w83627hf_data *data, u16 reg)
1598 {
1599 if ((reg & 0x00f0) == 0x50) {
1600 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1601 outb_p(reg >> 8, data->addr + W83781D_DATA_REG_OFFSET);
1602 }
1603 }
1604
1605 /* Not strictly necessary, but play it safe for now */
1606 static inline void w83627hf_reset_bank(struct w83627hf_data *data, u16 reg)
1607 {
1608 if (reg & 0xff00) {
1609 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1610 outb_p(0, data->addr + W83781D_DATA_REG_OFFSET);
1611 }
1612 }
1613
1614 static int w83627hf_read_value(struct w83627hf_data *data, u16 reg)
1615 {
1616 int res, word_sized;
1617
1618 mutex_lock(&data->lock);
1619 word_sized = (((reg & 0xff00) == 0x100)
1620 || ((reg & 0xff00) == 0x200))
1621 && (((reg & 0x00ff) == 0x50)
1622 || ((reg & 0x00ff) == 0x53)
1623 || ((reg & 0x00ff) == 0x55));
1624 w83627hf_set_bank(data, reg);
1625 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1626 res = inb_p(data->addr + W83781D_DATA_REG_OFFSET);
1627 if (word_sized) {
1628 outb_p((reg & 0xff) + 1,
1629 data->addr + W83781D_ADDR_REG_OFFSET);
1630 res =
1631 (res << 8) + inb_p(data->addr +
1632 W83781D_DATA_REG_OFFSET);
1633 }
1634 w83627hf_reset_bank(data, reg);
1635 mutex_unlock(&data->lock);
1636 return res;
1637 }
1638
1639 static int w83627thf_read_gpio5(struct platform_device *pdev)
1640 {
1641 struct w83627hf_sio_data *sio_data = dev_get_platdata(&pdev->dev);
1642 int res = 0xff, sel;
1643
1644 superio_enter(sio_data);
1645 superio_select(sio_data, W83627HF_LD_GPIO5);
1646
1647 /* Make sure these GPIO pins are enabled */
1648 if (!(superio_inb(sio_data, W83627THF_GPIO5_EN) & (1<<3))) {
1649 dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n");
1650 goto exit;
1651 }
1652
1653 /*
1654 * Make sure the pins are configured for input
1655 * There must be at least five (VRM 9), and possibly 6 (VRM 10)
1656 */
1657 sel = superio_inb(sio_data, W83627THF_GPIO5_IOSR) & 0x3f;
1658 if ((sel & 0x1f) != 0x1f) {
1659 dev_dbg(&pdev->dev, "GPIO5 not configured for VID "
1660 "function\n");
1661 goto exit;
1662 }
1663
1664 dev_info(&pdev->dev, "Reading VID from GPIO5\n");
1665 res = superio_inb(sio_data, W83627THF_GPIO5_DR) & sel;
1666
1667 exit:
1668 superio_exit(sio_data);
1669 return res;
1670 }
1671
1672 static int w83687thf_read_vid(struct platform_device *pdev)
1673 {
1674 struct w83627hf_sio_data *sio_data = dev_get_platdata(&pdev->dev);
1675 int res = 0xff;
1676
1677 superio_enter(sio_data);
1678 superio_select(sio_data, W83627HF_LD_HWM);
1679
1680 /* Make sure these GPIO pins are enabled */
1681 if (!(superio_inb(sio_data, W83687THF_VID_EN) & (1 << 2))) {
1682 dev_dbg(&pdev->dev, "VID disabled, no VID function\n");
1683 goto exit;
1684 }
1685
1686 /* Make sure the pins are configured for input */
1687 if (!(superio_inb(sio_data, W83687THF_VID_CFG) & (1 << 4))) {
1688 dev_dbg(&pdev->dev, "VID configured as output, "
1689 "no VID function\n");
1690 goto exit;
1691 }
1692
1693 res = superio_inb(sio_data, W83687THF_VID_DATA) & 0x3f;
1694
1695 exit:
1696 superio_exit(sio_data);
1697 return res;
1698 }
1699
1700 static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value)
1701 {
1702 int word_sized;
1703
1704 mutex_lock(&data->lock);
1705 word_sized = (((reg & 0xff00) == 0x100)
1706 || ((reg & 0xff00) == 0x200))
1707 && (((reg & 0x00ff) == 0x53)
1708 || ((reg & 0x00ff) == 0x55));
1709 w83627hf_set_bank(data, reg);
1710 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1711 if (word_sized) {
1712 outb_p(value >> 8,
1713 data->addr + W83781D_DATA_REG_OFFSET);
1714 outb_p((reg & 0xff) + 1,
1715 data->addr + W83781D_ADDR_REG_OFFSET);
1716 }
1717 outb_p(value & 0xff,
1718 data->addr + W83781D_DATA_REG_OFFSET);
1719 w83627hf_reset_bank(data, reg);
1720 mutex_unlock(&data->lock);
1721 return 0;
1722 }
1723
1724 static void w83627hf_init_device(struct platform_device *pdev)
1725 {
1726 struct w83627hf_data *data = platform_get_drvdata(pdev);
1727 int i;
1728 enum chips type = data->type;
1729 u8 tmp;
1730
1731 /* Minimize conflicts with other winbond i2c-only clients... */
1732 /* disable i2c subclients... how to disable main i2c client?? */
1733 /* force i2c address to relatively uncommon address */
1734 if (type == w83627hf) {
1735 w83627hf_write_value(data, W83781D_REG_I2C_SUBADDR, 0x89);
1736 w83627hf_write_value(data, W83781D_REG_I2C_ADDR, force_i2c);
1737 }
1738
1739 /* Read VID only once */
1740 if (type == w83627hf || type == w83637hf) {
1741 int lo = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1742 int hi = w83627hf_read_value(data, W83781D_REG_CHIPID);
1743 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
1744 } else if (type == w83627thf) {
1745 data->vid = w83627thf_read_gpio5(pdev);
1746 } else if (type == w83687thf) {
1747 data->vid = w83687thf_read_vid(pdev);
1748 }
1749
1750 /* Read VRM & OVT Config only once */
1751 if (type == w83627thf || type == w83637hf || type == w83687thf) {
1752 data->vrm_ovt =
1753 w83627hf_read_value(data, W83627THF_REG_VRM_OVT_CFG);
1754 }
1755
1756 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1757 for (i = 1; i <= 3; i++) {
1758 if (!(tmp & BIT_SCFG1[i - 1])) {
1759 data->sens[i - 1] = 4;
1760 } else {
1761 if (w83627hf_read_value
1762 (data,
1763 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1764 data->sens[i - 1] = 1;
1765 else
1766 data->sens[i - 1] = 2;
1767 }
1768 if ((type == w83697hf) && (i == 2))
1769 break;
1770 }
1771
1772 if(init) {
1773 /* Enable temp2 */
1774 tmp = w83627hf_read_value(data, W83627HF_REG_TEMP2_CONFIG);
1775 if (tmp & 0x01) {
1776 dev_warn(&pdev->dev, "Enabling temp2, readings "
1777 "might not make sense\n");
1778 w83627hf_write_value(data, W83627HF_REG_TEMP2_CONFIG,
1779 tmp & 0xfe);
1780 }
1781
1782 /* Enable temp3 */
1783 if (type != w83697hf) {
1784 tmp = w83627hf_read_value(data,
1785 W83627HF_REG_TEMP3_CONFIG);
1786 if (tmp & 0x01) {
1787 dev_warn(&pdev->dev, "Enabling temp3, "
1788 "readings might not make sense\n");
1789 w83627hf_write_value(data,
1790 W83627HF_REG_TEMP3_CONFIG, tmp & 0xfe);
1791 }
1792 }
1793 }
1794
1795 /* Start monitoring */
1796 w83627hf_write_value(data, W83781D_REG_CONFIG,
1797 (w83627hf_read_value(data,
1798 W83781D_REG_CONFIG) & 0xf7)
1799 | 0x01);
1800
1801 /* Enable VBAT monitoring if needed */
1802 tmp = w83627hf_read_value(data, W83781D_REG_VBAT);
1803 if (!(tmp & 0x01))
1804 w83627hf_write_value(data, W83781D_REG_VBAT, tmp | 0x01);
1805 }
1806
1807 static void w83627hf_update_fan_div(struct w83627hf_data *data)
1808 {
1809 int reg;
1810
1811 reg = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1812 data->fan_div[0] = (reg >> 4) & 0x03;
1813 data->fan_div[1] = (reg >> 6) & 0x03;
1814 if (data->type != w83697hf) {
1815 data->fan_div[2] = (w83627hf_read_value(data,
1816 W83781D_REG_PIN) >> 6) & 0x03;
1817 }
1818 reg = w83627hf_read_value(data, W83781D_REG_VBAT);
1819 data->fan_div[0] |= (reg >> 3) & 0x04;
1820 data->fan_div[1] |= (reg >> 4) & 0x04;
1821 if (data->type != w83697hf)
1822 data->fan_div[2] |= (reg >> 5) & 0x04;
1823 }
1824
1825 static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1826 {
1827 struct w83627hf_data *data = dev_get_drvdata(dev);
1828 int i, num_temps = (data->type == w83697hf) ? 2 : 3;
1829 int num_pwms = (data->type == w83697hf) ? 2 : 3;
1830
1831 mutex_lock(&data->update_lock);
1832
1833 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1834 || !data->valid) {
1835 for (i = 0; i <= 8; i++) {
1836 /* skip missing sensors */
1837 if (((data->type == w83697hf) && (i == 1)) ||
1838 ((data->type != w83627hf && data->type != w83697hf)
1839 && (i == 5 || i == 6)))
1840 continue;
1841 data->in[i] =
1842 w83627hf_read_value(data, W83781D_REG_IN(i));
1843 data->in_min[i] =
1844 w83627hf_read_value(data,
1845 W83781D_REG_IN_MIN(i));
1846 data->in_max[i] =
1847 w83627hf_read_value(data,
1848 W83781D_REG_IN_MAX(i));
1849 }
1850 for (i = 0; i <= 2; i++) {
1851 data->fan[i] =
1852 w83627hf_read_value(data, W83627HF_REG_FAN(i));
1853 data->fan_min[i] =
1854 w83627hf_read_value(data,
1855 W83627HF_REG_FAN_MIN(i));
1856 }
1857 for (i = 0; i <= 2; i++) {
1858 u8 tmp = w83627hf_read_value(data,
1859 W836X7HF_REG_PWM(data->type, i));
1860 /* bits 0-3 are reserved in 627THF */
1861 if (data->type == w83627thf)
1862 tmp &= 0xf0;
1863 data->pwm[i] = tmp;
1864 if (i == 1 &&
1865 (data->type == w83627hf || data->type == w83697hf))
1866 break;
1867 }
1868 if (data->type == w83627hf) {
1869 u8 tmp = w83627hf_read_value(data,
1870 W83627HF_REG_PWM_FREQ);
1871 data->pwm_freq[0] = tmp & 0x07;
1872 data->pwm_freq[1] = (tmp >> 4) & 0x07;
1873 } else if (data->type != w83627thf) {
1874 for (i = 1; i <= 3; i++) {
1875 data->pwm_freq[i - 1] =
1876 w83627hf_read_value(data,
1877 W83637HF_REG_PWM_FREQ[i - 1]);
1878 if (i == 2 && (data->type == w83697hf))
1879 break;
1880 }
1881 }
1882 if (data->type != w83627hf) {
1883 for (i = 0; i < num_pwms; i++) {
1884 u8 tmp = w83627hf_read_value(data,
1885 W83627THF_REG_PWM_ENABLE[i]);
1886 data->pwm_enable[i] =
1887 ((tmp >> W83627THF_PWM_ENABLE_SHIFT[i])
1888 & 0x03) + 1;
1889 }
1890 }
1891 for (i = 0; i < num_temps; i++) {
1892 data->temp[i] = w83627hf_read_value(
1893 data, w83627hf_reg_temp[i]);
1894 data->temp_max[i] = w83627hf_read_value(
1895 data, w83627hf_reg_temp_over[i]);
1896 data->temp_max_hyst[i] = w83627hf_read_value(
1897 data, w83627hf_reg_temp_hyst[i]);
1898 }
1899
1900 w83627hf_update_fan_div(data);
1901
1902 data->alarms =
1903 w83627hf_read_value(data, W83781D_REG_ALARM1) |
1904 (w83627hf_read_value(data, W83781D_REG_ALARM2) << 8) |
1905 (w83627hf_read_value(data, W83781D_REG_ALARM3) << 16);
1906 i = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
1907 data->beep_mask = (i << 8) |
1908 w83627hf_read_value(data, W83781D_REG_BEEP_INTS1) |
1909 w83627hf_read_value(data, W83781D_REG_BEEP_INTS3) << 16;
1910 data->last_updated = jiffies;
1911 data->valid = 1;
1912 }
1913
1914 mutex_unlock(&data->update_lock);
1915
1916 return data;
1917 }
1918
1919 static int __init w83627hf_device_add(unsigned short address,
1920 const struct w83627hf_sio_data *sio_data)
1921 {
1922 struct resource res = {
1923 .start = address + WINB_REGION_OFFSET,
1924 .end = address + WINB_REGION_OFFSET + WINB_REGION_SIZE - 1,
1925 .name = DRVNAME,
1926 .flags = IORESOURCE_IO,
1927 };
1928 int err;
1929
1930 err = acpi_check_resource_conflict(&res);
1931 if (err)
1932 goto exit;
1933
1934 pdev = platform_device_alloc(DRVNAME, address);
1935 if (!pdev) {
1936 err = -ENOMEM;
1937 pr_err("Device allocation failed\n");
1938 goto exit;
1939 }
1940
1941 err = platform_device_add_resources(pdev, &res, 1);
1942 if (err) {
1943 pr_err("Device resource addition failed (%d)\n", err);
1944 goto exit_device_put;
1945 }
1946
1947 err = platform_device_add_data(pdev, sio_data,
1948 sizeof(struct w83627hf_sio_data));
1949 if (err) {
1950 pr_err("Platform data allocation failed\n");
1951 goto exit_device_put;
1952 }
1953
1954 err = platform_device_add(pdev);
1955 if (err) {
1956 pr_err("Device addition failed (%d)\n", err);
1957 goto exit_device_put;
1958 }
1959
1960 return 0;
1961
1962 exit_device_put:
1963 platform_device_put(pdev);
1964 exit:
1965 return err;
1966 }
1967
1968 static int __init sensors_w83627hf_init(void)
1969 {
1970 int err;
1971 unsigned short address;
1972 struct w83627hf_sio_data sio_data;
1973
1974 if (w83627hf_find(0x2e, &address, &sio_data)
1975 && w83627hf_find(0x4e, &address, &sio_data))
1976 return -ENODEV;
1977
1978 err = platform_driver_register(&w83627hf_driver);
1979 if (err)
1980 goto exit;
1981
1982 /* Sets global pdev as a side effect */
1983 err = w83627hf_device_add(address, &sio_data);
1984 if (err)
1985 goto exit_driver;
1986
1987 return 0;
1988
1989 exit_driver:
1990 platform_driver_unregister(&w83627hf_driver);
1991 exit:
1992 return err;
1993 }
1994
1995 static void __exit sensors_w83627hf_exit(void)
1996 {
1997 platform_device_unregister(pdev);
1998 platform_driver_unregister(&w83627hf_driver);
1999 }
2000
2001 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
2002 "Philip Edelbrock <phil@netroedge.com>, "
2003 "and Mark Studebaker <mdsxyz123@yahoo.com>");
2004 MODULE_DESCRIPTION("W83627HF driver");
2005 MODULE_LICENSE("GPL");
2006
2007 module_init(sensors_w83627hf_init);
2008 module_exit(sensors_w83627hf_exit);
Linux with added FPC-III support