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[linux/fpc-iii.git] / include / asm-arm26 / dma.h
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1 #ifndef __ASM_ARM_DMA_H
2 #define __ASM_ARM_DMA_H
4 typedef unsigned int dmach_t;
6 #include <linux/config.h>
7 #include <linux/spinlock.h>
8 #include <asm/system.h>
9 #include <asm/memory.h>
10 #include <asm/scatterlist.h>
12 // FIXME - do we really need this? arm26 cant do 'proper' DMA
14 typedef struct dma_struct dma_t;
15 typedef unsigned int dmamode_t;
17 struct dma_ops {
18 int (*request)(dmach_t, dma_t *); /* optional */
19 void (*free)(dmach_t, dma_t *); /* optional */
20 void (*enable)(dmach_t, dma_t *); /* mandatory */
21 void (*disable)(dmach_t, dma_t *); /* mandatory */
22 int (*residue)(dmach_t, dma_t *); /* optional */
23 int (*setspeed)(dmach_t, dma_t *, int); /* optional */
24 char *type;
27 struct dma_struct {
28 struct scatterlist buf; /* single DMA */
29 int sgcount; /* number of DMA SG */
30 struct scatterlist *sg; /* DMA Scatter-Gather List */
32 unsigned int active:1; /* Transfer active */
33 unsigned int invalid:1; /* Address/Count changed */
34 unsigned int using_sg:1; /* using scatter list? */
35 dmamode_t dma_mode; /* DMA mode */
36 int speed; /* DMA speed */
38 unsigned int lock; /* Device is allocated */
39 const char *device_id; /* Device name */
41 unsigned int dma_base; /* Controller base address */
42 int dma_irq; /* Controller IRQ */
43 int state; /* Controller state */
44 struct scatterlist cur_sg; /* Current controller buffer */
46 struct dma_ops *d_ops;
49 /* Prototype: void arch_dma_init(dma)
50 * Purpose : Initialise architecture specific DMA
51 * Params : dma - pointer to array of DMA structures
53 extern void arch_dma_init(dma_t *dma);
55 extern void isa_init_dma(dma_t *dma);
58 #define MAX_DMA_ADDRESS 0x03000000
59 #define MAX_DMA_CHANNELS 3
61 /* ARC */
62 #define DMA_VIRTUAL_FLOPPY0 0
63 #define DMA_VIRTUAL_FLOPPY1 1
64 #define DMA_VIRTUAL_SOUND 2
66 /* A5K */
67 #define DMA_FLOPPY 0
70 * DMA modes
72 #define DMA_MODE_MASK 3
74 #define DMA_MODE_READ 0
75 #define DMA_MODE_WRITE 1
76 #define DMA_MODE_CASCADE 2
77 #define DMA_AUTOINIT 4
79 extern spinlock_t dma_spin_lock;
81 static inline unsigned long claim_dma_lock(void)
83 unsigned long flags;
84 spin_lock_irqsave(&dma_spin_lock, flags);
85 return flags;
88 static inline void release_dma_lock(unsigned long flags)
90 spin_unlock_irqrestore(&dma_spin_lock, flags);
93 /* Clear the 'DMA Pointer Flip Flop'.
94 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
96 #define clear_dma_ff(channel)
98 /* Set only the page register bits of the transfer address.
100 * NOTE: This is an architecture specific function, and should
101 * be hidden from the drivers
103 extern void set_dma_page(dmach_t channel, char pagenr);
105 /* Request a DMA channel
107 * Some architectures may need to do allocate an interrupt
109 extern int request_dma(dmach_t channel, const char * device_id);
111 /* Free a DMA channel
113 * Some architectures may need to do free an interrupt
115 extern void free_dma(dmach_t channel);
117 /* Enable DMA for this channel
119 * On some architectures, this may have other side effects like
120 * enabling an interrupt and setting the DMA registers.
122 extern void enable_dma(dmach_t channel);
124 /* Disable DMA for this channel
126 * On some architectures, this may have other side effects like
127 * disabling an interrupt or whatever.
129 extern void disable_dma(dmach_t channel);
131 /* Test whether the specified channel has an active DMA transfer
133 extern int dma_channel_active(dmach_t channel);
135 /* Set the DMA scatter gather list for this channel
137 * This should not be called if a DMA channel is enabled,
138 * especially since some DMA architectures don't update the
139 * DMA address immediately, but defer it to the enable_dma().
141 extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg);
143 /* Set the DMA address for this channel
145 * This should not be called if a DMA channel is enabled,
146 * especially since some DMA architectures don't update the
147 * DMA address immediately, but defer it to the enable_dma().
149 extern void set_dma_addr(dmach_t channel, unsigned long physaddr);
151 /* Set the DMA byte count for this channel
153 * This should not be called if a DMA channel is enabled,
154 * especially since some DMA architectures don't update the
155 * DMA count immediately, but defer it to the enable_dma().
157 extern void set_dma_count(dmach_t channel, unsigned long count);
159 /* Set the transfer direction for this channel
161 * This should not be called if a DMA channel is enabled,
162 * especially since some DMA architectures don't update the
163 * DMA transfer direction immediately, but defer it to the
164 * enable_dma().
166 extern void set_dma_mode(dmach_t channel, dmamode_t mode);
168 /* Set the transfer speed for this channel
170 extern void set_dma_speed(dmach_t channel, int cycle_ns);
172 /* Get DMA residue count. After a DMA transfer, this
173 * should return zero. Reading this while a DMA transfer is
174 * still in progress will return unpredictable results.
175 * If called before the channel has been used, it may return 1.
176 * Otherwise, it returns the number of _bytes_ left to transfer.
178 extern int get_dma_residue(dmach_t channel);
180 #ifndef NO_DMA
181 #define NO_DMA 255
182 #endif
184 #endif /* _ARM_DMA_H */