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Btrfs: fix list transaction->pending_ordered corruption
[linux/fpc-iii.git] / sound / soc / codecs / rt5631.c
blob1ba27db660a60519e05cf584caf10dec2a488836
1 /*
2 * rt5631.c -- RT5631 ALSA Soc Audio driver
3 *
4 * Copyright 2011 Realtek Microelectronics
5 *
6 * Author: flove <flove@realtek.com>
7 *
8 * Based on WM8753.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 */
15 #include <linux/module.h>
16 #include <linux/moduleparam.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/pm.h>
20 #include <linux/i2c.h>
21 #include <linux/regmap.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/pcm_params.h>
25 #include <sound/soc.h>
26 #include <sound/soc-dapm.h>
27 #include <sound/initval.h>
28 #include <sound/tlv.h>
29
30 #include "rt5631.h"
31
32 struct rt5631_priv {
33 struct regmap *regmap;
34 int codec_version;
35 int master;
36 int sysclk;
37 int rx_rate;
38 int bclk_rate;
39 int dmic_used_flag;
40 };
41
42 static const struct reg_default rt5631_reg[] = {
43 { RT5631_SPK_OUT_VOL, 0x8888 },
44 { RT5631_HP_OUT_VOL, 0x8080 },
45 { RT5631_MONO_AXO_1_2_VOL, 0xa080 },
46 { RT5631_AUX_IN_VOL, 0x0808 },
47 { RT5631_ADC_REC_MIXER, 0xf0f0 },
48 { RT5631_VDAC_DIG_VOL, 0x0010 },
49 { RT5631_OUTMIXER_L_CTRL, 0xffc0 },
50 { RT5631_OUTMIXER_R_CTRL, 0xffc0 },
51 { RT5631_AXO1MIXER_CTRL, 0x88c0 },
52 { RT5631_AXO2MIXER_CTRL, 0x88c0 },
53 { RT5631_DIG_MIC_CTRL, 0x3000 },
54 { RT5631_MONO_INPUT_VOL, 0x8808 },
55 { RT5631_SPK_MIXER_CTRL, 0xf8f8 },
56 { RT5631_SPK_MONO_OUT_CTRL, 0xfc00 },
57 { RT5631_SPK_MONO_HP_OUT_CTRL, 0x4440 },
58 { RT5631_SDP_CTRL, 0x8000 },
59 { RT5631_MONO_SDP_CTRL, 0x8000 },
60 { RT5631_STEREO_AD_DA_CLK_CTRL, 0x2010 },
61 { RT5631_GEN_PUR_CTRL_REG, 0x0e00 },
62 { RT5631_INT_ST_IRQ_CTRL_2, 0x071a },
63 { RT5631_MISC_CTRL, 0x2040 },
64 { RT5631_DEPOP_FUN_CTRL_2, 0x8000 },
65 { RT5631_SOFT_VOL_CTRL, 0x07e0 },
66 { RT5631_ALC_CTRL_1, 0x0206 },
67 { RT5631_ALC_CTRL_3, 0x2000 },
68 { RT5631_PSEUDO_SPATL_CTRL, 0x0553 },
69 };
70
71 /**
72 * rt5631_write_index - write index register of 2nd layer
73 */
74 static void rt5631_write_index(struct snd_soc_codec *codec,
75 unsigned int reg, unsigned int value)
76 {
77 snd_soc_write(codec, RT5631_INDEX_ADD, reg);
78 snd_soc_write(codec, RT5631_INDEX_DATA, value);
79 }
80
81 /**
82 * rt5631_read_index - read index register of 2nd layer
83 */
84 static unsigned int rt5631_read_index(struct snd_soc_codec *codec,
85 unsigned int reg)
86 {
87 unsigned int value;
88
89 snd_soc_write(codec, RT5631_INDEX_ADD, reg);
90 value = snd_soc_read(codec, RT5631_INDEX_DATA);
91
92 return value;
93 }
94
95 static int rt5631_reset(struct snd_soc_codec *codec)
96 {
97 return snd_soc_write(codec, RT5631_RESET, 0);
98 }
99
100 static bool rt5631_volatile_register(struct device *dev, unsigned int reg)
101 {
102 switch (reg) {
103 case RT5631_RESET:
104 case RT5631_INT_ST_IRQ_CTRL_2:
105 case RT5631_INDEX_ADD:
106 case RT5631_INDEX_DATA:
107 case RT5631_EQ_CTRL:
108 return 1;
109 default:
110 return 0;
111 }
112 }
113
114 static bool rt5631_readable_register(struct device *dev, unsigned int reg)
115 {
116 switch (reg) {
117 case RT5631_RESET:
118 case RT5631_SPK_OUT_VOL:
119 case RT5631_HP_OUT_VOL:
120 case RT5631_MONO_AXO_1_2_VOL:
121 case RT5631_AUX_IN_VOL:
122 case RT5631_STEREO_DAC_VOL_1:
123 case RT5631_MIC_CTRL_1:
124 case RT5631_STEREO_DAC_VOL_2:
125 case RT5631_ADC_CTRL_1:
126 case RT5631_ADC_REC_MIXER:
127 case RT5631_ADC_CTRL_2:
128 case RT5631_VDAC_DIG_VOL:
129 case RT5631_OUTMIXER_L_CTRL:
130 case RT5631_OUTMIXER_R_CTRL:
131 case RT5631_AXO1MIXER_CTRL:
132 case RT5631_AXO2MIXER_CTRL:
133 case RT5631_MIC_CTRL_2:
134 case RT5631_DIG_MIC_CTRL:
135 case RT5631_MONO_INPUT_VOL:
136 case RT5631_SPK_MIXER_CTRL:
137 case RT5631_SPK_MONO_OUT_CTRL:
138 case RT5631_SPK_MONO_HP_OUT_CTRL:
139 case RT5631_SDP_CTRL:
140 case RT5631_MONO_SDP_CTRL:
141 case RT5631_STEREO_AD_DA_CLK_CTRL:
142 case RT5631_PWR_MANAG_ADD1:
143 case RT5631_PWR_MANAG_ADD2:
144 case RT5631_PWR_MANAG_ADD3:
145 case RT5631_PWR_MANAG_ADD4:
146 case RT5631_GEN_PUR_CTRL_REG:
147 case RT5631_GLOBAL_CLK_CTRL:
148 case RT5631_PLL_CTRL:
149 case RT5631_INT_ST_IRQ_CTRL_1:
150 case RT5631_INT_ST_IRQ_CTRL_2:
151 case RT5631_GPIO_CTRL:
152 case RT5631_MISC_CTRL:
153 case RT5631_DEPOP_FUN_CTRL_1:
154 case RT5631_DEPOP_FUN_CTRL_2:
155 case RT5631_JACK_DET_CTRL:
156 case RT5631_SOFT_VOL_CTRL:
157 case RT5631_ALC_CTRL_1:
158 case RT5631_ALC_CTRL_2:
159 case RT5631_ALC_CTRL_3:
160 case RT5631_PSEUDO_SPATL_CTRL:
161 case RT5631_INDEX_ADD:
162 case RT5631_INDEX_DATA:
163 case RT5631_EQ_CTRL:
164 case RT5631_VENDOR_ID:
165 case RT5631_VENDOR_ID1:
166 case RT5631_VENDOR_ID2:
167 return 1;
168 default:
169 return 0;
170 }
171 }
172
173 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
174 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -95625, 375, 0);
175 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
176 /* {0, +20, +24, +30, +35, +40, +44, +50, +52}dB */
177 static unsigned int mic_bst_tlv[] = {
178 TLV_DB_RANGE_HEAD(7),
179 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
180 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
181 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
182 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
183 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
184 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
185 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
186 };
187
188 static int rt5631_dmic_get(struct snd_kcontrol *kcontrol,
189 struct snd_ctl_elem_value *ucontrol)
190 {
191 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
192 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
193
194 ucontrol->value.integer.value[0] = rt5631->dmic_used_flag;
195
196 return 0;
197 }
198
199 static int rt5631_dmic_put(struct snd_kcontrol *kcontrol,
200 struct snd_ctl_elem_value *ucontrol)
201 {
202 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
203 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
204
205 rt5631->dmic_used_flag = ucontrol->value.integer.value[0];
206 return 0;
207 }
208
209 /* MIC Input Type */
210 static const char *rt5631_input_mode[] = {
211 "Single ended", "Differential"};
212
213 static SOC_ENUM_SINGLE_DECL(rt5631_mic1_mode_enum, RT5631_MIC_CTRL_1,
214 RT5631_MIC1_DIFF_INPUT_SHIFT, rt5631_input_mode);
215
216 static SOC_ENUM_SINGLE_DECL(rt5631_mic2_mode_enum, RT5631_MIC_CTRL_1,
217 RT5631_MIC2_DIFF_INPUT_SHIFT, rt5631_input_mode);
218
219 /* MONO Input Type */
220 static SOC_ENUM_SINGLE_DECL(rt5631_monoin_mode_enum, RT5631_MONO_INPUT_VOL,
221 RT5631_MONO_DIFF_INPUT_SHIFT, rt5631_input_mode);
222
223 /* SPK Ratio Gain Control */
224 static const char *rt5631_spk_ratio[] = {"1.00x", "1.09x", "1.27x", "1.44x",
225 "1.56x", "1.68x", "1.99x", "2.34x"};
226
227 static SOC_ENUM_SINGLE_DECL(rt5631_spk_ratio_enum, RT5631_GEN_PUR_CTRL_REG,
228 RT5631_SPK_AMP_RATIO_CTRL_SHIFT, rt5631_spk_ratio);
229
230 static const struct snd_kcontrol_new rt5631_snd_controls[] = {
231 /* MIC */
232 SOC_ENUM("MIC1 Mode Control", rt5631_mic1_mode_enum),
233 SOC_SINGLE_TLV("MIC1 Boost", RT5631_MIC_CTRL_2,
234 RT5631_MIC1_BOOST_SHIFT, 8, 0, mic_bst_tlv),
235 SOC_ENUM("MIC2 Mode Control", rt5631_mic2_mode_enum),
236 SOC_SINGLE_TLV("MIC2 Boost", RT5631_MIC_CTRL_2,
237 RT5631_MIC2_BOOST_SHIFT, 8, 0, mic_bst_tlv),
238 /* MONO IN */
239 SOC_ENUM("MONOIN Mode Control", rt5631_monoin_mode_enum),
240 SOC_DOUBLE_TLV("MONOIN_RX Capture Volume", RT5631_MONO_INPUT_VOL,
241 RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT,
242 RT5631_VOL_MASK, 1, in_vol_tlv),
243 /* AXI */
244 SOC_DOUBLE_TLV("AXI Capture Volume", RT5631_AUX_IN_VOL,
245 RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT,
246 RT5631_VOL_MASK, 1, in_vol_tlv),
247 /* DAC */
248 SOC_DOUBLE_TLV("PCM Playback Volume", RT5631_STEREO_DAC_VOL_2,
249 RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT,
250 RT5631_DAC_VOL_MASK, 1, dac_vol_tlv),
251 SOC_DOUBLE("PCM Playback Switch", RT5631_STEREO_DAC_VOL_1,
252 RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1),
253 /* AXO */
254 SOC_SINGLE("AXO1 Playback Switch", RT5631_MONO_AXO_1_2_VOL,
255 RT5631_L_MUTE_SHIFT, 1, 1),
256 SOC_SINGLE("AXO2 Playback Switch", RT5631_MONO_AXO_1_2_VOL,
257 RT5631_R_VOL_SHIFT, 1, 1),
258 /* OUTVOL */
259 SOC_DOUBLE("OUTVOL Channel Switch", RT5631_SPK_OUT_VOL,
260 RT5631_L_EN_SHIFT, RT5631_R_EN_SHIFT, 1, 0),
261
262 /* SPK */
263 SOC_DOUBLE("Speaker Playback Switch", RT5631_SPK_OUT_VOL,
264 RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1),
265 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5631_SPK_OUT_VOL,
266 RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT, 39, 1, out_vol_tlv),
267 /* MONO OUT */
268 SOC_SINGLE("MONO Playback Switch", RT5631_MONO_AXO_1_2_VOL,
269 RT5631_MUTE_MONO_SHIFT, 1, 1),
270 /* HP */
271 SOC_DOUBLE("HP Playback Switch", RT5631_HP_OUT_VOL,
272 RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1),
273 SOC_DOUBLE_TLV("HP Playback Volume", RT5631_HP_OUT_VOL,
274 RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT,
275 RT5631_VOL_MASK, 1, out_vol_tlv),
276 /* DMIC */
277 SOC_SINGLE_EXT("DMIC Switch", 0, 0, 1, 0,
278 rt5631_dmic_get, rt5631_dmic_put),
279 SOC_DOUBLE("DMIC Capture Switch", RT5631_DIG_MIC_CTRL,
280 RT5631_DMIC_L_CH_MUTE_SHIFT,
281 RT5631_DMIC_R_CH_MUTE_SHIFT, 1, 1),
282
283 /* SPK Ratio Gain Control */
284 SOC_ENUM("SPK Ratio Control", rt5631_spk_ratio_enum),
285 };
286
287 static int check_sysclk1_source(struct snd_soc_dapm_widget *source,
288 struct snd_soc_dapm_widget *sink)
289 {
290 unsigned int reg;
291
292 reg = snd_soc_read(source->codec, RT5631_GLOBAL_CLK_CTRL);
293 return reg & RT5631_SYSCLK_SOUR_SEL_PLL;
294 }
295
296 static int check_dmic_used(struct snd_soc_dapm_widget *source,
297 struct snd_soc_dapm_widget *sink)
298 {
299 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(source->codec);
300 return rt5631->dmic_used_flag;
301 }
302
303 static int check_dacl_to_outmixl(struct snd_soc_dapm_widget *source,
304 struct snd_soc_dapm_widget *sink)
305 {
306 unsigned int reg;
307
308 reg = snd_soc_read(source->codec, RT5631_OUTMIXER_L_CTRL);
309 return !(reg & RT5631_M_DAC_L_TO_OUTMIXER_L);
310 }
311
312 static int check_dacr_to_outmixr(struct snd_soc_dapm_widget *source,
313 struct snd_soc_dapm_widget *sink)
314 {
315 unsigned int reg;
316
317 reg = snd_soc_read(source->codec, RT5631_OUTMIXER_R_CTRL);
318 return !(reg & RT5631_M_DAC_R_TO_OUTMIXER_R);
319 }
320
321 static int check_dacl_to_spkmixl(struct snd_soc_dapm_widget *source,
322 struct snd_soc_dapm_widget *sink)
323 {
324 unsigned int reg;
325
326 reg = snd_soc_read(source->codec, RT5631_SPK_MIXER_CTRL);
327 return !(reg & RT5631_M_DAC_L_TO_SPKMIXER_L);
328 }
329
330 static int check_dacr_to_spkmixr(struct snd_soc_dapm_widget *source,
331 struct snd_soc_dapm_widget *sink)
332 {
333 unsigned int reg;
334
335 reg = snd_soc_read(source->codec, RT5631_SPK_MIXER_CTRL);
336 return !(reg & RT5631_M_DAC_R_TO_SPKMIXER_R);
337 }
338
339 static int check_adcl_select(struct snd_soc_dapm_widget *source,
340 struct snd_soc_dapm_widget *sink)
341 {
342 unsigned int reg;
343
344 reg = snd_soc_read(source->codec, RT5631_ADC_REC_MIXER);
345 return !(reg & RT5631_M_MIC1_TO_RECMIXER_L);
346 }
347
348 static int check_adcr_select(struct snd_soc_dapm_widget *source,
349 struct snd_soc_dapm_widget *sink)
350 {
351 unsigned int reg;
352
353 reg = snd_soc_read(source->codec, RT5631_ADC_REC_MIXER);
354 return !(reg & RT5631_M_MIC2_TO_RECMIXER_R);
355 }
356
357 /**
358 * onebit_depop_power_stage - auto depop in power stage.
359 * @enable: power on/off
360 *
361 * When power on/off headphone, the depop sequence is done by hardware.
362 */
363 static void onebit_depop_power_stage(struct snd_soc_codec *codec, int enable)
364 {
365 unsigned int soft_vol, hp_zc;
366
367 /* enable one-bit depop function */
368 snd_soc_update_bits(codec, RT5631_DEPOP_FUN_CTRL_2,
369 RT5631_EN_ONE_BIT_DEPOP, 0);
370
371 /* keep soft volume and zero crossing setting */
372 soft_vol = snd_soc_read(codec, RT5631_SOFT_VOL_CTRL);
373 snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, 0);
374 hp_zc = snd_soc_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
375 snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
376 if (enable) {
377 /* config one-bit depop parameter */
378 rt5631_write_index(codec, RT5631_TEST_MODE_CTRL, 0x84c0);
379 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x309f);
380 rt5631_write_index(codec, RT5631_CP_INTL_REG2, 0x6530);
381 /* power on capless block */
382 snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_2,
383 RT5631_EN_CAP_FREE_DEPOP);
384 } else {
385 /* power off capless block */
386 snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_2, 0);
387 msleep(100);
388 }
389
390 /* recover soft volume and zero crossing setting */
391 snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
392 snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
393 }
394
395 /**
396 * onebit_depop_mute_stage - auto depop in mute stage.
397 * @enable: mute/unmute
398 *
399 * When mute/unmute headphone, the depop sequence is done by hardware.
400 */
401 static void onebit_depop_mute_stage(struct snd_soc_codec *codec, int enable)
402 {
403 unsigned int soft_vol, hp_zc;
404
405 /* enable one-bit depop function */
406 snd_soc_update_bits(codec, RT5631_DEPOP_FUN_CTRL_2,
407 RT5631_EN_ONE_BIT_DEPOP, 0);
408
409 /* keep soft volume and zero crossing setting */
410 soft_vol = snd_soc_read(codec, RT5631_SOFT_VOL_CTRL);
411 snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, 0);
412 hp_zc = snd_soc_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
413 snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
414 if (enable) {
415 schedule_timeout_uninterruptible(msecs_to_jiffies(10));
416 /* config one-bit depop parameter */
417 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x307f);
418 snd_soc_update_bits(codec, RT5631_HP_OUT_VOL,
419 RT5631_L_MUTE | RT5631_R_MUTE, 0);
420 msleep(300);
421 } else {
422 snd_soc_update_bits(codec, RT5631_HP_OUT_VOL,
423 RT5631_L_MUTE | RT5631_R_MUTE,
424 RT5631_L_MUTE | RT5631_R_MUTE);
425 msleep(100);
426 }
427
428 /* recover soft volume and zero crossing setting */
429 snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
430 snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
431 }
432
433 /**
434 * onebit_depop_power_stage - step by step depop sequence in power stage.
435 * @enable: power on/off
436 *
437 * When power on/off headphone, the depop sequence is done in step by step.
438 */
439 static void depop_seq_power_stage(struct snd_soc_codec *codec, int enable)
440 {
441 unsigned int soft_vol, hp_zc;
442
443 /* depop control by register */
444 snd_soc_update_bits(codec, RT5631_DEPOP_FUN_CTRL_2,
445 RT5631_EN_ONE_BIT_DEPOP, RT5631_EN_ONE_BIT_DEPOP);
446
447 /* keep soft volume and zero crossing setting */
448 soft_vol = snd_soc_read(codec, RT5631_SOFT_VOL_CTRL);
449 snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, 0);
450 hp_zc = snd_soc_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
451 snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
452 if (enable) {
453 /* config depop sequence parameter */
454 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x303e);
455
456 /* power on headphone and charge pump */
457 snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
458 RT5631_PWR_CHARGE_PUMP | RT5631_PWR_HP_L_AMP |
459 RT5631_PWR_HP_R_AMP,
460 RT5631_PWR_CHARGE_PUMP | RT5631_PWR_HP_L_AMP |
461 RT5631_PWR_HP_R_AMP);
462
463 /* power on soft generator and depop mode2 */
464 snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
465 RT5631_POW_ON_SOFT_GEN | RT5631_EN_DEPOP2_FOR_HP);
466 msleep(100);
467
468 /* stop depop mode */
469 snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
470 RT5631_PWR_HP_DEPOP_DIS, RT5631_PWR_HP_DEPOP_DIS);
471 } else {
472 /* config depop sequence parameter */
473 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x303F);
474 snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
475 RT5631_POW_ON_SOFT_GEN | RT5631_EN_MUTE_UNMUTE_DEPOP |
476 RT5631_PD_HPAMP_L_ST_UP | RT5631_PD_HPAMP_R_ST_UP);
477 msleep(75);
478 snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
479 RT5631_POW_ON_SOFT_GEN | RT5631_PD_HPAMP_L_ST_UP |
480 RT5631_PD_HPAMP_R_ST_UP);
481
482 /* start depop mode */
483 snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
484 RT5631_PWR_HP_DEPOP_DIS, 0);
485
486 /* config depop sequence parameter */
487 snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
488 RT5631_POW_ON_SOFT_GEN | RT5631_EN_DEPOP2_FOR_HP |
489 RT5631_PD_HPAMP_L_ST_UP | RT5631_PD_HPAMP_R_ST_UP);
490 msleep(80);
491 snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
492 RT5631_POW_ON_SOFT_GEN);
493
494 /* power down headphone and charge pump */
495 snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
496 RT5631_PWR_CHARGE_PUMP | RT5631_PWR_HP_L_AMP |
497 RT5631_PWR_HP_R_AMP, 0);
498 }
499
500 /* recover soft volume and zero crossing setting */
501 snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
502 snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
503 }
504
505 /**
506 * depop_seq_mute_stage - step by step depop sequence in mute stage.
507 * @enable: mute/unmute
508 *
509 * When mute/unmute headphone, the depop sequence is done in step by step.
510 */
511 static void depop_seq_mute_stage(struct snd_soc_codec *codec, int enable)
512 {
513 unsigned int soft_vol, hp_zc;
514
515 /* depop control by register */
516 snd_soc_update_bits(codec, RT5631_DEPOP_FUN_CTRL_2,
517 RT5631_EN_ONE_BIT_DEPOP, RT5631_EN_ONE_BIT_DEPOP);
518
519 /* keep soft volume and zero crossing setting */
520 soft_vol = snd_soc_read(codec, RT5631_SOFT_VOL_CTRL);
521 snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, 0);
522 hp_zc = snd_soc_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
523 snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
524 if (enable) {
525 schedule_timeout_uninterruptible(msecs_to_jiffies(10));
526
527 /* config depop sequence parameter */
528 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x302f);
529 snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
530 RT5631_POW_ON_SOFT_GEN | RT5631_EN_MUTE_UNMUTE_DEPOP |
531 RT5631_EN_HP_R_M_UN_MUTE_DEPOP |
532 RT5631_EN_HP_L_M_UN_MUTE_DEPOP);
533
534 snd_soc_update_bits(codec, RT5631_HP_OUT_VOL,
535 RT5631_L_MUTE | RT5631_R_MUTE, 0);
536 msleep(160);
537 } else {
538 /* config depop sequence parameter */
539 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x302f);
540 snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
541 RT5631_POW_ON_SOFT_GEN | RT5631_EN_MUTE_UNMUTE_DEPOP |
542 RT5631_EN_HP_R_M_UN_MUTE_DEPOP |
543 RT5631_EN_HP_L_M_UN_MUTE_DEPOP);
544
545 snd_soc_update_bits(codec, RT5631_HP_OUT_VOL,
546 RT5631_L_MUTE | RT5631_R_MUTE,
547 RT5631_L_MUTE | RT5631_R_MUTE);
548 msleep(150);
549 }
550
551 /* recover soft volume and zero crossing setting */
552 snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
553 snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
554 }
555
556 static int hp_event(struct snd_soc_dapm_widget *w,
557 struct snd_kcontrol *kcontrol, int event)
558 {
559 struct snd_soc_codec *codec = w->codec;
560 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
561
562 switch (event) {
563 case SND_SOC_DAPM_PRE_PMD:
564 if (rt5631->codec_version) {
565 onebit_depop_mute_stage(codec, 0);
566 onebit_depop_power_stage(codec, 0);
567 } else {
568 depop_seq_mute_stage(codec, 0);
569 depop_seq_power_stage(codec, 0);
570 }
571 break;
572
573 case SND_SOC_DAPM_POST_PMU:
574 if (rt5631->codec_version) {
575 onebit_depop_power_stage(codec, 1);
576 onebit_depop_mute_stage(codec, 1);
577 } else {
578 depop_seq_power_stage(codec, 1);
579 depop_seq_mute_stage(codec, 1);
580 }
581 break;
582
583 default:
584 break;
585 }
586
587 return 0;
588 }
589
590 static int set_dmic_params(struct snd_soc_dapm_widget *w,
591 struct snd_kcontrol *kcontrol, int event)
592 {
593 struct snd_soc_codec *codec = w->codec;
594 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
595
596 switch (rt5631->rx_rate) {
597 case 44100:
598 case 48000:
599 snd_soc_update_bits(codec, RT5631_DIG_MIC_CTRL,
600 RT5631_DMIC_CLK_CTRL_MASK,
601 RT5631_DMIC_CLK_CTRL_TO_32FS);
602 break;
603
604 case 32000:
605 case 22050:
606 snd_soc_update_bits(codec, RT5631_DIG_MIC_CTRL,
607 RT5631_DMIC_CLK_CTRL_MASK,
608 RT5631_DMIC_CLK_CTRL_TO_64FS);
609 break;
610
611 case 16000:
612 case 11025:
613 case 8000:
614 snd_soc_update_bits(codec, RT5631_DIG_MIC_CTRL,
615 RT5631_DMIC_CLK_CTRL_MASK,
616 RT5631_DMIC_CLK_CTRL_TO_128FS);
617 break;
618
619 default:
620 return -EINVAL;
621 }
622
623 return 0;
624 }
625
626 static const struct snd_kcontrol_new rt5631_recmixl_mixer_controls[] = {
627 SOC_DAPM_SINGLE("OUTMIXL Capture Switch", RT5631_ADC_REC_MIXER,
628 RT5631_M_OUTMIXL_RECMIXL_BIT, 1, 1),
629 SOC_DAPM_SINGLE("MIC1_BST1 Capture Switch", RT5631_ADC_REC_MIXER,
630 RT5631_M_MIC1_RECMIXL_BIT, 1, 1),
631 SOC_DAPM_SINGLE("AXILVOL Capture Switch", RT5631_ADC_REC_MIXER,
632 RT5631_M_AXIL_RECMIXL_BIT, 1, 1),
633 SOC_DAPM_SINGLE("MONOIN_RX Capture Switch", RT5631_ADC_REC_MIXER,
634 RT5631_M_MONO_IN_RECMIXL_BIT, 1, 1),
635 };
636
637 static const struct snd_kcontrol_new rt5631_recmixr_mixer_controls[] = {
638 SOC_DAPM_SINGLE("MONOIN_RX Capture Switch", RT5631_ADC_REC_MIXER,
639 RT5631_M_MONO_IN_RECMIXR_BIT, 1, 1),
640 SOC_DAPM_SINGLE("AXIRVOL Capture Switch", RT5631_ADC_REC_MIXER,
641 RT5631_M_AXIR_RECMIXR_BIT, 1, 1),
642 SOC_DAPM_SINGLE("MIC2_BST2 Capture Switch", RT5631_ADC_REC_MIXER,
643 RT5631_M_MIC2_RECMIXR_BIT, 1, 1),
644 SOC_DAPM_SINGLE("OUTMIXR Capture Switch", RT5631_ADC_REC_MIXER,
645 RT5631_M_OUTMIXR_RECMIXR_BIT, 1, 1),
646 };
647
648 static const struct snd_kcontrol_new rt5631_spkmixl_mixer_controls[] = {
649 SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_SPK_MIXER_CTRL,
650 RT5631_M_RECMIXL_SPKMIXL_BIT, 1, 1),
651 SOC_DAPM_SINGLE("MIC1_P Playback Switch", RT5631_SPK_MIXER_CTRL,
652 RT5631_M_MIC1P_SPKMIXL_BIT, 1, 1),
653 SOC_DAPM_SINGLE("DACL Playback Switch", RT5631_SPK_MIXER_CTRL,
654 RT5631_M_DACL_SPKMIXL_BIT, 1, 1),
655 SOC_DAPM_SINGLE("OUTMIXL Playback Switch", RT5631_SPK_MIXER_CTRL,
656 RT5631_M_OUTMIXL_SPKMIXL_BIT, 1, 1),
657 };
658
659 static const struct snd_kcontrol_new rt5631_spkmixr_mixer_controls[] = {
660 SOC_DAPM_SINGLE("OUTMIXR Playback Switch", RT5631_SPK_MIXER_CTRL,
661 RT5631_M_OUTMIXR_SPKMIXR_BIT, 1, 1),
662 SOC_DAPM_SINGLE("DACR Playback Switch", RT5631_SPK_MIXER_CTRL,
663 RT5631_M_DACR_SPKMIXR_BIT, 1, 1),
664 SOC_DAPM_SINGLE("MIC2_P Playback Switch", RT5631_SPK_MIXER_CTRL,
665 RT5631_M_MIC2P_SPKMIXR_BIT, 1, 1),
666 SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_SPK_MIXER_CTRL,
667 RT5631_M_RECMIXR_SPKMIXR_BIT, 1, 1),
668 };
669
670 static const struct snd_kcontrol_new rt5631_outmixl_mixer_controls[] = {
671 SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_OUTMIXER_L_CTRL,
672 RT5631_M_RECMIXL_OUTMIXL_BIT, 1, 1),
673 SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_OUTMIXER_L_CTRL,
674 RT5631_M_RECMIXR_OUTMIXL_BIT, 1, 1),
675 SOC_DAPM_SINGLE("DACL Playback Switch", RT5631_OUTMIXER_L_CTRL,
676 RT5631_M_DACL_OUTMIXL_BIT, 1, 1),
677 SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_OUTMIXER_L_CTRL,
678 RT5631_M_MIC1_OUTMIXL_BIT, 1, 1),
679 SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_OUTMIXER_L_CTRL,
680 RT5631_M_MIC2_OUTMIXL_BIT, 1, 1),
681 SOC_DAPM_SINGLE("MONOIN_RXP Playback Switch", RT5631_OUTMIXER_L_CTRL,
682 RT5631_M_MONO_INP_OUTMIXL_BIT, 1, 1),
683 SOC_DAPM_SINGLE("AXILVOL Playback Switch", RT5631_OUTMIXER_L_CTRL,
684 RT5631_M_AXIL_OUTMIXL_BIT, 1, 1),
685 SOC_DAPM_SINGLE("AXIRVOL Playback Switch", RT5631_OUTMIXER_L_CTRL,
686 RT5631_M_AXIR_OUTMIXL_BIT, 1, 1),
687 SOC_DAPM_SINGLE("VDAC Playback Switch", RT5631_OUTMIXER_L_CTRL,
688 RT5631_M_VDAC_OUTMIXL_BIT, 1, 1),
689 };
690
691 static const struct snd_kcontrol_new rt5631_outmixr_mixer_controls[] = {
692 SOC_DAPM_SINGLE("VDAC Playback Switch", RT5631_OUTMIXER_R_CTRL,
693 RT5631_M_VDAC_OUTMIXR_BIT, 1, 1),
694 SOC_DAPM_SINGLE("AXIRVOL Playback Switch", RT5631_OUTMIXER_R_CTRL,
695 RT5631_M_AXIR_OUTMIXR_BIT, 1, 1),
696 SOC_DAPM_SINGLE("AXILVOL Playback Switch", RT5631_OUTMIXER_R_CTRL,
697 RT5631_M_AXIL_OUTMIXR_BIT, 1, 1),
698 SOC_DAPM_SINGLE("MONOIN_RXN Playback Switch", RT5631_OUTMIXER_R_CTRL,
699 RT5631_M_MONO_INN_OUTMIXR_BIT, 1, 1),
700 SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_OUTMIXER_R_CTRL,
701 RT5631_M_MIC2_OUTMIXR_BIT, 1, 1),
702 SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_OUTMIXER_R_CTRL,
703 RT5631_M_MIC1_OUTMIXR_BIT, 1, 1),
704 SOC_DAPM_SINGLE("DACR Playback Switch", RT5631_OUTMIXER_R_CTRL,
705 RT5631_M_DACR_OUTMIXR_BIT, 1, 1),
706 SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_OUTMIXER_R_CTRL,
707 RT5631_M_RECMIXR_OUTMIXR_BIT, 1, 1),
708 SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_OUTMIXER_R_CTRL,
709 RT5631_M_RECMIXL_OUTMIXR_BIT, 1, 1),
710 };
711
712 static const struct snd_kcontrol_new rt5631_AXO1MIX_mixer_controls[] = {
713 SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_AXO1MIXER_CTRL,
714 RT5631_M_MIC1_AXO1MIX_BIT , 1, 1),
715 SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_AXO1MIXER_CTRL,
716 RT5631_M_MIC2_AXO1MIX_BIT, 1, 1),
717 SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_AXO1MIXER_CTRL,
718 RT5631_M_OUTMIXL_AXO1MIX_BIT , 1 , 1),
719 SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_AXO1MIXER_CTRL,
720 RT5631_M_OUTMIXR_AXO1MIX_BIT, 1, 1),
721 };
722
723 static const struct snd_kcontrol_new rt5631_AXO2MIX_mixer_controls[] = {
724 SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_AXO2MIXER_CTRL,
725 RT5631_M_MIC1_AXO2MIX_BIT, 1, 1),
726 SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_AXO2MIXER_CTRL,
727 RT5631_M_MIC2_AXO2MIX_BIT, 1, 1),
728 SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_AXO2MIXER_CTRL,
729 RT5631_M_OUTMIXL_AXO2MIX_BIT, 1, 1),
730 SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_AXO2MIXER_CTRL,
731 RT5631_M_OUTMIXR_AXO2MIX_BIT, 1 , 1),
732 };
733
734 static const struct snd_kcontrol_new rt5631_spolmix_mixer_controls[] = {
735 SOC_DAPM_SINGLE("SPKVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
736 RT5631_M_SPKVOLL_SPOLMIX_BIT, 1, 1),
737 SOC_DAPM_SINGLE("SPKVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
738 RT5631_M_SPKVOLR_SPOLMIX_BIT, 1, 1),
739 };
740
741 static const struct snd_kcontrol_new rt5631_spormix_mixer_controls[] = {
742 SOC_DAPM_SINGLE("SPKVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
743 RT5631_M_SPKVOLL_SPORMIX_BIT, 1, 1),
744 SOC_DAPM_SINGLE("SPKVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
745 RT5631_M_SPKVOLR_SPORMIX_BIT, 1, 1),
746 };
747
748 static const struct snd_kcontrol_new rt5631_monomix_mixer_controls[] = {
749 SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
750 RT5631_M_OUTVOLL_MONOMIX_BIT, 1, 1),
751 SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
752 RT5631_M_OUTVOLR_MONOMIX_BIT, 1, 1),
753 };
754
755 /* Left SPK Volume Input */
756 static const char *rt5631_spkvoll_sel[] = {"Vmid", "SPKMIXL"};
757
758 static SOC_ENUM_SINGLE_DECL(rt5631_spkvoll_enum, RT5631_SPK_OUT_VOL,
759 RT5631_L_EN_SHIFT, rt5631_spkvoll_sel);
760
761 static const struct snd_kcontrol_new rt5631_spkvoll_mux_control =
762 SOC_DAPM_ENUM("Left SPKVOL SRC", rt5631_spkvoll_enum);
763
764 /* Left HP Volume Input */
765 static const char *rt5631_hpvoll_sel[] = {"Vmid", "OUTMIXL"};
766
767 static SOC_ENUM_SINGLE_DECL(rt5631_hpvoll_enum, RT5631_HP_OUT_VOL,
768 RT5631_L_EN_SHIFT, rt5631_hpvoll_sel);
769
770 static const struct snd_kcontrol_new rt5631_hpvoll_mux_control =
771 SOC_DAPM_ENUM("Left HPVOL SRC", rt5631_hpvoll_enum);
772
773 /* Left Out Volume Input */
774 static const char *rt5631_outvoll_sel[] = {"Vmid", "OUTMIXL"};
775
776 static SOC_ENUM_SINGLE_DECL(rt5631_outvoll_enum, RT5631_MONO_AXO_1_2_VOL,
777 RT5631_L_EN_SHIFT, rt5631_outvoll_sel);
778
779 static const struct snd_kcontrol_new rt5631_outvoll_mux_control =
780 SOC_DAPM_ENUM("Left OUTVOL SRC", rt5631_outvoll_enum);
781
782 /* Right Out Volume Input */
783 static const char *rt5631_outvolr_sel[] = {"Vmid", "OUTMIXR"};
784
785 static SOC_ENUM_SINGLE_DECL(rt5631_outvolr_enum, RT5631_MONO_AXO_1_2_VOL,
786 RT5631_R_EN_SHIFT, rt5631_outvolr_sel);
787
788 static const struct snd_kcontrol_new rt5631_outvolr_mux_control =
789 SOC_DAPM_ENUM("Right OUTVOL SRC", rt5631_outvolr_enum);
790
791 /* Right HP Volume Input */
792 static const char *rt5631_hpvolr_sel[] = {"Vmid", "OUTMIXR"};
793
794 static SOC_ENUM_SINGLE_DECL(rt5631_hpvolr_enum, RT5631_HP_OUT_VOL,
795 RT5631_R_EN_SHIFT, rt5631_hpvolr_sel);
796
797 static const struct snd_kcontrol_new rt5631_hpvolr_mux_control =
798 SOC_DAPM_ENUM("Right HPVOL SRC", rt5631_hpvolr_enum);
799
800 /* Right SPK Volume Input */
801 static const char *rt5631_spkvolr_sel[] = {"Vmid", "SPKMIXR"};
802
803 static SOC_ENUM_SINGLE_DECL(rt5631_spkvolr_enum, RT5631_SPK_OUT_VOL,
804 RT5631_R_EN_SHIFT, rt5631_spkvolr_sel);
805
806 static const struct snd_kcontrol_new rt5631_spkvolr_mux_control =
807 SOC_DAPM_ENUM("Right SPKVOL SRC", rt5631_spkvolr_enum);
808
809 /* SPO Left Channel Input */
810 static const char *rt5631_spol_src_sel[] = {
811 "SPOLMIX", "MONOIN_RX", "VDAC", "DACL"};
812
813 static SOC_ENUM_SINGLE_DECL(rt5631_spol_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
814 RT5631_SPK_L_MUX_SEL_SHIFT, rt5631_spol_src_sel);
815
816 static const struct snd_kcontrol_new rt5631_spol_mux_control =
817 SOC_DAPM_ENUM("SPOL SRC", rt5631_spol_src_enum);
818
819 /* SPO Right Channel Input */
820 static const char *rt5631_spor_src_sel[] = {
821 "SPORMIX", "MONOIN_RX", "VDAC", "DACR"};
822
823 static SOC_ENUM_SINGLE_DECL(rt5631_spor_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
824 RT5631_SPK_R_MUX_SEL_SHIFT, rt5631_spor_src_sel);
825
826 static const struct snd_kcontrol_new rt5631_spor_mux_control =
827 SOC_DAPM_ENUM("SPOR SRC", rt5631_spor_src_enum);
828
829 /* MONO Input */
830 static const char *rt5631_mono_src_sel[] = {"MONOMIX", "MONOIN_RX", "VDAC"};
831
832 static SOC_ENUM_SINGLE_DECL(rt5631_mono_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
833 RT5631_MONO_MUX_SEL_SHIFT, rt5631_mono_src_sel);
834
835 static const struct snd_kcontrol_new rt5631_mono_mux_control =
836 SOC_DAPM_ENUM("MONO SRC", rt5631_mono_src_enum);
837
838 /* Left HPO Input */
839 static const char *rt5631_hpl_src_sel[] = {"Left HPVOL", "Left DAC"};
840
841 static SOC_ENUM_SINGLE_DECL(rt5631_hpl_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
842 RT5631_HP_L_MUX_SEL_SHIFT, rt5631_hpl_src_sel);
843
844 static const struct snd_kcontrol_new rt5631_hpl_mux_control =
845 SOC_DAPM_ENUM("HPL SRC", rt5631_hpl_src_enum);
846
847 /* Right HPO Input */
848 static const char *rt5631_hpr_src_sel[] = {"Right HPVOL", "Right DAC"};
849
850 static SOC_ENUM_SINGLE_DECL(rt5631_hpr_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
851 RT5631_HP_R_MUX_SEL_SHIFT, rt5631_hpr_src_sel);
852
853 static const struct snd_kcontrol_new rt5631_hpr_mux_control =
854 SOC_DAPM_ENUM("HPR SRC", rt5631_hpr_src_enum);
855
856 static const struct snd_soc_dapm_widget rt5631_dapm_widgets[] = {
857 /* Vmid */
858 SND_SOC_DAPM_VMID("Vmid"),
859 /* PLL1 */
860 SND_SOC_DAPM_SUPPLY("PLL1", RT5631_PWR_MANAG_ADD2,
861 RT5631_PWR_PLL1_BIT, 0, NULL, 0),
862
863 /* Input Side */
864 /* Input Lines */
865 SND_SOC_DAPM_INPUT("MIC1"),
866 SND_SOC_DAPM_INPUT("MIC2"),
867 SND_SOC_DAPM_INPUT("AXIL"),
868 SND_SOC_DAPM_INPUT("AXIR"),
869 SND_SOC_DAPM_INPUT("MONOIN_RXN"),
870 SND_SOC_DAPM_INPUT("MONOIN_RXP"),
871 SND_SOC_DAPM_INPUT("DMIC"),
872
873 /* MICBIAS */
874 SND_SOC_DAPM_MICBIAS("MIC Bias1", RT5631_PWR_MANAG_ADD2,
875 RT5631_PWR_MICBIAS1_VOL_BIT, 0),
876 SND_SOC_DAPM_MICBIAS("MIC Bias2", RT5631_PWR_MANAG_ADD2,
877 RT5631_PWR_MICBIAS2_VOL_BIT, 0),
878
879 /* Boost */
880 SND_SOC_DAPM_PGA("MIC1 Boost", RT5631_PWR_MANAG_ADD2,
881 RT5631_PWR_MIC1_BOOT_GAIN_BIT, 0, NULL, 0),
882 SND_SOC_DAPM_PGA("MIC2 Boost", RT5631_PWR_MANAG_ADD2,
883 RT5631_PWR_MIC2_BOOT_GAIN_BIT, 0, NULL, 0),
884 SND_SOC_DAPM_PGA("MONOIN_RXP Boost", RT5631_PWR_MANAG_ADD4,
885 RT5631_PWR_MONO_IN_P_VOL_BIT, 0, NULL, 0),
886 SND_SOC_DAPM_PGA("MONOIN_RXN Boost", RT5631_PWR_MANAG_ADD4,
887 RT5631_PWR_MONO_IN_N_VOL_BIT, 0, NULL, 0),
888 SND_SOC_DAPM_PGA("AXIL Boost", RT5631_PWR_MANAG_ADD4,
889 RT5631_PWR_AXIL_IN_VOL_BIT, 0, NULL, 0),
890 SND_SOC_DAPM_PGA("AXIR Boost", RT5631_PWR_MANAG_ADD4,
891 RT5631_PWR_AXIR_IN_VOL_BIT, 0, NULL, 0),
892
893 /* MONO In */
894 SND_SOC_DAPM_MIXER("MONO_IN", SND_SOC_NOPM, 0, 0, NULL, 0),
895
896 /* REC Mixer */
897 SND_SOC_DAPM_MIXER("RECMIXL Mixer", RT5631_PWR_MANAG_ADD2,
898 RT5631_PWR_RECMIXER_L_BIT, 0,
899 &rt5631_recmixl_mixer_controls[0],
900 ARRAY_SIZE(rt5631_recmixl_mixer_controls)),
901 SND_SOC_DAPM_MIXER("RECMIXR Mixer", RT5631_PWR_MANAG_ADD2,
902 RT5631_PWR_RECMIXER_R_BIT, 0,
903 &rt5631_recmixr_mixer_controls[0],
904 ARRAY_SIZE(rt5631_recmixr_mixer_controls)),
905 /* Because of record duplication for L/R channel,
906 * L/R ADCs need power up at the same time */
907 SND_SOC_DAPM_MIXER("ADC Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
908
909 /* DMIC */
910 SND_SOC_DAPM_SUPPLY("DMIC Supply", RT5631_DIG_MIC_CTRL,
911 RT5631_DMIC_ENA_SHIFT, 0,
912 set_dmic_params, SND_SOC_DAPM_PRE_PMU),
913 /* ADC Data Srouce */
914 SND_SOC_DAPM_SUPPLY("Left ADC Select", RT5631_INT_ST_IRQ_CTRL_2,
915 RT5631_ADC_DATA_SEL_MIC1_SHIFT, 0, NULL, 0),
916 SND_SOC_DAPM_SUPPLY("Right ADC Select", RT5631_INT_ST_IRQ_CTRL_2,
917 RT5631_ADC_DATA_SEL_MIC2_SHIFT, 0, NULL, 0),
918
919 /* ADCs */
920 SND_SOC_DAPM_ADC("Left ADC", "HIFI Capture",
921 RT5631_PWR_MANAG_ADD1, RT5631_PWR_ADC_L_CLK_BIT, 0),
922 SND_SOC_DAPM_ADC("Right ADC", "HIFI Capture",
923 RT5631_PWR_MANAG_ADD1, RT5631_PWR_ADC_R_CLK_BIT, 0),
924
925 /* DAC and ADC supply power */
926 SND_SOC_DAPM_SUPPLY("I2S", RT5631_PWR_MANAG_ADD1,
927 RT5631_PWR_MAIN_I2S_BIT, 0, NULL, 0),
928 SND_SOC_DAPM_SUPPLY("DAC REF", RT5631_PWR_MANAG_ADD1,
929 RT5631_PWR_DAC_REF_BIT, 0, NULL, 0),
930
931 /* Output Side */
932 /* DACs */
933 SND_SOC_DAPM_DAC("Left DAC", "HIFI Playback",
934 RT5631_PWR_MANAG_ADD1, RT5631_PWR_DAC_L_CLK_BIT, 0),
935 SND_SOC_DAPM_DAC("Right DAC", "HIFI Playback",
936 RT5631_PWR_MANAG_ADD1, RT5631_PWR_DAC_R_CLK_BIT, 0),
937 SND_SOC_DAPM_DAC("Voice DAC", "Voice DAC Mono Playback",
938 SND_SOC_NOPM, 0, 0),
939 SND_SOC_DAPM_PGA("Voice DAC Boost", SND_SOC_NOPM, 0, 0, NULL, 0),
940 /* DAC supply power */
941 SND_SOC_DAPM_SUPPLY("Left DAC To Mixer", RT5631_PWR_MANAG_ADD1,
942 RT5631_PWR_DAC_L_TO_MIXER_BIT, 0, NULL, 0),
943 SND_SOC_DAPM_SUPPLY("Right DAC To Mixer", RT5631_PWR_MANAG_ADD1,
944 RT5631_PWR_DAC_R_TO_MIXER_BIT, 0, NULL, 0),
945
946 /* Left SPK Mixer */
947 SND_SOC_DAPM_MIXER("SPKMIXL Mixer", RT5631_PWR_MANAG_ADD2,
948 RT5631_PWR_SPKMIXER_L_BIT, 0,
949 &rt5631_spkmixl_mixer_controls[0],
950 ARRAY_SIZE(rt5631_spkmixl_mixer_controls)),
951 /* Left Out Mixer */
952 SND_SOC_DAPM_MIXER("OUTMIXL Mixer", RT5631_PWR_MANAG_ADD2,
953 RT5631_PWR_OUTMIXER_L_BIT, 0,
954 &rt5631_outmixl_mixer_controls[0],
955 ARRAY_SIZE(rt5631_outmixl_mixer_controls)),
956 /* Right Out Mixer */
957 SND_SOC_DAPM_MIXER("OUTMIXR Mixer", RT5631_PWR_MANAG_ADD2,
958 RT5631_PWR_OUTMIXER_R_BIT, 0,
959 &rt5631_outmixr_mixer_controls[0],
960 ARRAY_SIZE(rt5631_outmixr_mixer_controls)),
961 /* Right SPK Mixer */
962 SND_SOC_DAPM_MIXER("SPKMIXR Mixer", RT5631_PWR_MANAG_ADD2,
963 RT5631_PWR_SPKMIXER_R_BIT, 0,
964 &rt5631_spkmixr_mixer_controls[0],
965 ARRAY_SIZE(rt5631_spkmixr_mixer_controls)),
966
967 /* Volume Mux */
968 SND_SOC_DAPM_MUX("Left SPKVOL Mux", RT5631_PWR_MANAG_ADD4,
969 RT5631_PWR_SPK_L_VOL_BIT, 0,
970 &rt5631_spkvoll_mux_control),
971 SND_SOC_DAPM_MUX("Left HPVOL Mux", RT5631_PWR_MANAG_ADD4,
972 RT5631_PWR_HP_L_OUT_VOL_BIT, 0,
973 &rt5631_hpvoll_mux_control),
974 SND_SOC_DAPM_MUX("Left OUTVOL Mux", RT5631_PWR_MANAG_ADD4,
975 RT5631_PWR_LOUT_VOL_BIT, 0,
976 &rt5631_outvoll_mux_control),
977 SND_SOC_DAPM_MUX("Right OUTVOL Mux", RT5631_PWR_MANAG_ADD4,
978 RT5631_PWR_ROUT_VOL_BIT, 0,
979 &rt5631_outvolr_mux_control),
980 SND_SOC_DAPM_MUX("Right HPVOL Mux", RT5631_PWR_MANAG_ADD4,
981 RT5631_PWR_HP_R_OUT_VOL_BIT, 0,
982 &rt5631_hpvolr_mux_control),
983 SND_SOC_DAPM_MUX("Right SPKVOL Mux", RT5631_PWR_MANAG_ADD4,
984 RT5631_PWR_SPK_R_VOL_BIT, 0,
985 &rt5631_spkvolr_mux_control),
986
987 /* DAC To HP */
988 SND_SOC_DAPM_PGA_S("Left DAC_HP", 0, SND_SOC_NOPM, 0, 0, NULL, 0),
989 SND_SOC_DAPM_PGA_S("Right DAC_HP", 0, SND_SOC_NOPM, 0, 0, NULL, 0),
990
991 /* HP Depop */
992 SND_SOC_DAPM_PGA_S("HP Depop", 1, SND_SOC_NOPM, 0, 0,
993 hp_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
994
995 /* AXO1 Mixer */
996 SND_SOC_DAPM_MIXER("AXO1MIX Mixer", RT5631_PWR_MANAG_ADD3,
997 RT5631_PWR_AXO1MIXER_BIT, 0,
998 &rt5631_AXO1MIX_mixer_controls[0],
999 ARRAY_SIZE(rt5631_AXO1MIX_mixer_controls)),
1000 /* SPOL Mixer */
1001 SND_SOC_DAPM_MIXER("SPOLMIX Mixer", SND_SOC_NOPM, 0, 0,
1002 &rt5631_spolmix_mixer_controls[0],
1003 ARRAY_SIZE(rt5631_spolmix_mixer_controls)),
1004 /* MONO Mixer */
1005 SND_SOC_DAPM_MIXER("MONOMIX Mixer", RT5631_PWR_MANAG_ADD3,
1006 RT5631_PWR_MONOMIXER_BIT, 0,
1007 &rt5631_monomix_mixer_controls[0],
1008 ARRAY_SIZE(rt5631_monomix_mixer_controls)),
1009 /* SPOR Mixer */
1010 SND_SOC_DAPM_MIXER("SPORMIX Mixer", SND_SOC_NOPM, 0, 0,
1011 &rt5631_spormix_mixer_controls[0],
1012 ARRAY_SIZE(rt5631_spormix_mixer_controls)),
1013 /* AXO2 Mixer */
1014 SND_SOC_DAPM_MIXER("AXO2MIX Mixer", RT5631_PWR_MANAG_ADD3,
1015 RT5631_PWR_AXO2MIXER_BIT, 0,
1016 &rt5631_AXO2MIX_mixer_controls[0],
1017 ARRAY_SIZE(rt5631_AXO2MIX_mixer_controls)),
1018
1019 /* Mux */
1020 SND_SOC_DAPM_MUX("SPOL Mux", SND_SOC_NOPM, 0, 0,
1021 &rt5631_spol_mux_control),
1022 SND_SOC_DAPM_MUX("SPOR Mux", SND_SOC_NOPM, 0, 0,
1023 &rt5631_spor_mux_control),
1024 SND_SOC_DAPM_MUX("MONO Mux", SND_SOC_NOPM, 0, 0,
1025 &rt5631_mono_mux_control),
1026 SND_SOC_DAPM_MUX("HPL Mux", SND_SOC_NOPM, 0, 0,
1027 &rt5631_hpl_mux_control),
1028 SND_SOC_DAPM_MUX("HPR Mux", SND_SOC_NOPM, 0, 0,
1029 &rt5631_hpr_mux_control),
1030
1031 /* AMP supply */
1032 SND_SOC_DAPM_SUPPLY("MONO Depop", RT5631_PWR_MANAG_ADD3,
1033 RT5631_PWR_MONO_DEPOP_DIS_BIT, 0, NULL, 0),
1034 SND_SOC_DAPM_SUPPLY("Class D", RT5631_PWR_MANAG_ADD1,
1035 RT5631_PWR_CLASS_D_BIT, 0, NULL, 0),
1036
1037 /* Output Lines */
1038 SND_SOC_DAPM_OUTPUT("AUXO1"),
1039 SND_SOC_DAPM_OUTPUT("AUXO2"),
1040 SND_SOC_DAPM_OUTPUT("SPOL"),
1041 SND_SOC_DAPM_OUTPUT("SPOR"),
1042 SND_SOC_DAPM_OUTPUT("HPOL"),
1043 SND_SOC_DAPM_OUTPUT("HPOR"),
1044 SND_SOC_DAPM_OUTPUT("MONO"),
1045 };
1046
1047 static const struct snd_soc_dapm_route rt5631_dapm_routes[] = {
1048 {"MIC1 Boost", NULL, "MIC1"},
1049 {"MIC2 Boost", NULL, "MIC2"},
1050 {"MONOIN_RXP Boost", NULL, "MONOIN_RXP"},
1051 {"MONOIN_RXN Boost", NULL, "MONOIN_RXN"},
1052 {"AXIL Boost", NULL, "AXIL"},
1053 {"AXIR Boost", NULL, "AXIR"},
1054
1055 {"MONO_IN", NULL, "MONOIN_RXP Boost"},
1056 {"MONO_IN", NULL, "MONOIN_RXN Boost"},
1057
1058 {"RECMIXL Mixer", "OUTMIXL Capture Switch", "OUTMIXL Mixer"},
1059 {"RECMIXL Mixer", "MIC1_BST1 Capture Switch", "MIC1 Boost"},
1060 {"RECMIXL Mixer", "AXILVOL Capture Switch", "AXIL Boost"},
1061 {"RECMIXL Mixer", "MONOIN_RX Capture Switch", "MONO_IN"},
1062
1063 {"RECMIXR Mixer", "OUTMIXR Capture Switch", "OUTMIXR Mixer"},
1064 {"RECMIXR Mixer", "MIC2_BST2 Capture Switch", "MIC2 Boost"},
1065 {"RECMIXR Mixer", "AXIRVOL Capture Switch", "AXIR Boost"},
1066 {"RECMIXR Mixer", "MONOIN_RX Capture Switch", "MONO_IN"},
1067
1068 {"ADC Mixer", NULL, "RECMIXL Mixer"},
1069 {"ADC Mixer", NULL, "RECMIXR Mixer"},
1070
1071 {"Left ADC", NULL, "ADC Mixer"},
1072 {"Left ADC", NULL, "Left ADC Select", check_adcl_select},
1073 {"Left ADC", NULL, "PLL1", check_sysclk1_source},
1074 {"Left ADC", NULL, "I2S"},
1075 {"Left ADC", NULL, "DAC REF"},
1076
1077 {"Right ADC", NULL, "ADC Mixer"},
1078 {"Right ADC", NULL, "Right ADC Select", check_adcr_select},
1079 {"Right ADC", NULL, "PLL1", check_sysclk1_source},
1080 {"Right ADC", NULL, "I2S"},
1081 {"Right ADC", NULL, "DAC REF"},
1082
1083 {"DMIC", NULL, "DMIC Supply", check_dmic_used},
1084 {"Left ADC", NULL, "DMIC"},
1085 {"Right ADC", NULL, "DMIC"},
1086
1087 {"Left DAC", NULL, "PLL1", check_sysclk1_source},
1088 {"Left DAC", NULL, "I2S"},
1089 {"Left DAC", NULL, "DAC REF"},
1090 {"Right DAC", NULL, "PLL1", check_sysclk1_source},
1091 {"Right DAC", NULL, "I2S"},
1092 {"Right DAC", NULL, "DAC REF"},
1093
1094 {"Voice DAC Boost", NULL, "Voice DAC"},
1095
1096 {"SPKMIXL Mixer", NULL, "Left DAC To Mixer", check_dacl_to_spkmixl},
1097 {"SPKMIXL Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"},
1098 {"SPKMIXL Mixer", "MIC1_P Playback Switch", "MIC1"},
1099 {"SPKMIXL Mixer", "DACL Playback Switch", "Left DAC"},
1100 {"SPKMIXL Mixer", "OUTMIXL Playback Switch", "OUTMIXL Mixer"},
1101
1102 {"SPKMIXR Mixer", NULL, "Right DAC To Mixer", check_dacr_to_spkmixr},
1103 {"SPKMIXR Mixer", "OUTMIXR Playback Switch", "OUTMIXR Mixer"},
1104 {"SPKMIXR Mixer", "DACR Playback Switch", "Right DAC"},
1105 {"SPKMIXR Mixer", "MIC2_P Playback Switch", "MIC2"},
1106 {"SPKMIXR Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"},
1107
1108 {"OUTMIXL Mixer", NULL, "Left DAC To Mixer", check_dacl_to_outmixl},
1109 {"OUTMIXL Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"},
1110 {"OUTMIXL Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"},
1111 {"OUTMIXL Mixer", "DACL Playback Switch", "Left DAC"},
1112 {"OUTMIXL Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"},
1113 {"OUTMIXL Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"},
1114 {"OUTMIXL Mixer", "MONOIN_RXP Playback Switch", "MONOIN_RXP Boost"},
1115 {"OUTMIXL Mixer", "AXILVOL Playback Switch", "AXIL Boost"},
1116 {"OUTMIXL Mixer", "AXIRVOL Playback Switch", "AXIR Boost"},
1117 {"OUTMIXL Mixer", "VDAC Playback Switch", "Voice DAC Boost"},
1118
1119 {"OUTMIXR Mixer", NULL, "Right DAC To Mixer", check_dacr_to_outmixr},
1120 {"OUTMIXR Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"},
1121 {"OUTMIXR Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"},
1122 {"OUTMIXR Mixer", "DACR Playback Switch", "Right DAC"},
1123 {"OUTMIXR Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"},
1124 {"OUTMIXR Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"},
1125 {"OUTMIXR Mixer", "MONOIN_RXN Playback Switch", "MONOIN_RXN Boost"},
1126 {"OUTMIXR Mixer", "AXILVOL Playback Switch", "AXIL Boost"},
1127 {"OUTMIXR Mixer", "AXIRVOL Playback Switch", "AXIR Boost"},
1128 {"OUTMIXR Mixer", "VDAC Playback Switch", "Voice DAC Boost"},
1129
1130 {"Left SPKVOL Mux", "SPKMIXL", "SPKMIXL Mixer"},
1131 {"Left SPKVOL Mux", "Vmid", "Vmid"},
1132 {"Left HPVOL Mux", "OUTMIXL", "OUTMIXL Mixer"},
1133 {"Left HPVOL Mux", "Vmid", "Vmid"},
1134 {"Left OUTVOL Mux", "OUTMIXL", "OUTMIXL Mixer"},
1135 {"Left OUTVOL Mux", "Vmid", "Vmid"},
1136 {"Right OUTVOL Mux", "OUTMIXR", "OUTMIXR Mixer"},
1137 {"Right OUTVOL Mux", "Vmid", "Vmid"},
1138 {"Right HPVOL Mux", "OUTMIXR", "OUTMIXR Mixer"},
1139 {"Right HPVOL Mux", "Vmid", "Vmid"},
1140 {"Right SPKVOL Mux", "SPKMIXR", "SPKMIXR Mixer"},
1141 {"Right SPKVOL Mux", "Vmid", "Vmid"},
1142
1143 {"AXO1MIX Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"},
1144 {"AXO1MIX Mixer", "OUTVOLL Playback Switch", "Left OUTVOL Mux"},
1145 {"AXO1MIX Mixer", "OUTVOLR Playback Switch", "Right OUTVOL Mux"},
1146 {"AXO1MIX Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"},
1147
1148 {"AXO2MIX Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"},
1149 {"AXO2MIX Mixer", "OUTVOLL Playback Switch", "Left OUTVOL Mux"},
1150 {"AXO2MIX Mixer", "OUTVOLR Playback Switch", "Right OUTVOL Mux"},
1151 {"AXO2MIX Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"},
1152
1153 {"SPOLMIX Mixer", "SPKVOLL Playback Switch", "Left SPKVOL Mux"},
1154 {"SPOLMIX Mixer", "SPKVOLR Playback Switch", "Right SPKVOL Mux"},
1155
1156 {"SPORMIX Mixer", "SPKVOLL Playback Switch", "Left SPKVOL Mux"},
1157 {"SPORMIX Mixer", "SPKVOLR Playback Switch", "Right SPKVOL Mux"},
1158
1159 {"MONOMIX Mixer", "OUTVOLL Playback Switch", "Left OUTVOL Mux"},
1160 {"MONOMIX Mixer", "OUTVOLR Playback Switch", "Right OUTVOL Mux"},
1161
1162 {"SPOL Mux", "SPOLMIX", "SPOLMIX Mixer"},
1163 {"SPOL Mux", "MONOIN_RX", "MONO_IN"},
1164 {"SPOL Mux", "VDAC", "Voice DAC Boost"},
1165 {"SPOL Mux", "DACL", "Left DAC"},
1166
1167 {"SPOR Mux", "SPORMIX", "SPORMIX Mixer"},
1168 {"SPOR Mux", "MONOIN_RX", "MONO_IN"},
1169 {"SPOR Mux", "VDAC", "Voice DAC Boost"},
1170 {"SPOR Mux", "DACR", "Right DAC"},
1171
1172 {"MONO Mux", "MONOMIX", "MONOMIX Mixer"},
1173 {"MONO Mux", "MONOIN_RX", "MONO_IN"},
1174 {"MONO Mux", "VDAC", "Voice DAC Boost"},
1175
1176 {"Right DAC_HP", NULL, "Right DAC"},
1177 {"Left DAC_HP", NULL, "Left DAC"},
1178
1179 {"HPL Mux", "Left HPVOL", "Left HPVOL Mux"},
1180 {"HPL Mux", "Left DAC", "Left DAC_HP"},
1181 {"HPR Mux", "Right HPVOL", "Right HPVOL Mux"},
1182 {"HPR Mux", "Right DAC", "Right DAC_HP"},
1183
1184 {"HP Depop", NULL, "HPL Mux"},
1185 {"HP Depop", NULL, "HPR Mux"},
1186
1187 {"AUXO1", NULL, "AXO1MIX Mixer"},
1188 {"AUXO2", NULL, "AXO2MIX Mixer"},
1189
1190 {"SPOL", NULL, "Class D"},
1191 {"SPOL", NULL, "SPOL Mux"},
1192 {"SPOR", NULL, "Class D"},
1193 {"SPOR", NULL, "SPOR Mux"},
1194
1195 {"HPOL", NULL, "HP Depop"},
1196 {"HPOR", NULL, "HP Depop"},
1197
1198 {"MONO", NULL, "MONO Depop"},
1199 {"MONO", NULL, "MONO Mux"},
1200 };
1201
1202 struct coeff_clk_div {
1203 u32 mclk;
1204 u32 bclk;
1205 u32 rate;
1206 u16 reg_val;
1207 };
1208
1209 /* PLL divisors */
1210 struct pll_div {
1211 u32 pll_in;
1212 u32 pll_out;
1213 u16 reg_val;
1214 };
1215
1216 static const struct pll_div codec_master_pll_div[] = {
1217 {2048000, 8192000, 0x0ea0},
1218 {3686400, 8192000, 0x4e27},
1219 {12000000, 8192000, 0x456b},
1220 {13000000, 8192000, 0x495f},
1221 {13100000, 8192000, 0x0320},
1222 {2048000, 11289600, 0xf637},
1223 {3686400, 11289600, 0x2f22},
1224 {12000000, 11289600, 0x3e2f},
1225 {13000000, 11289600, 0x4d5b},
1226 {13100000, 11289600, 0x363b},
1227 {2048000, 16384000, 0x1ea0},
1228 {3686400, 16384000, 0x9e27},
1229 {12000000, 16384000, 0x452b},
1230 {13000000, 16384000, 0x542f},
1231 {13100000, 16384000, 0x03a0},
1232 {2048000, 16934400, 0xe625},
1233 {3686400, 16934400, 0x9126},
1234 {12000000, 16934400, 0x4d2c},
1235 {13000000, 16934400, 0x742f},
1236 {13100000, 16934400, 0x3c27},
1237 {2048000, 22579200, 0x2aa0},
1238 {3686400, 22579200, 0x2f20},
1239 {12000000, 22579200, 0x7e2f},
1240 {13000000, 22579200, 0x742f},
1241 {13100000, 22579200, 0x3c27},
1242 {2048000, 24576000, 0x2ea0},
1243 {3686400, 24576000, 0xee27},
1244 {12000000, 24576000, 0x2915},
1245 {13000000, 24576000, 0x772e},
1246 {13100000, 24576000, 0x0d20},
1247 {26000000, 24576000, 0x2027},
1248 {26000000, 22579200, 0x392f},
1249 {24576000, 22579200, 0x0921},
1250 {24576000, 24576000, 0x02a0},
1251 };
1252
1253 static const struct pll_div codec_slave_pll_div[] = {
1254 {256000, 2048000, 0x46f0},
1255 {256000, 4096000, 0x3ea0},
1256 {352800, 5644800, 0x3ea0},
1257 {512000, 8192000, 0x3ea0},
1258 {1024000, 8192000, 0x46f0},
1259 {705600, 11289600, 0x3ea0},
1260 {1024000, 16384000, 0x3ea0},
1261 {1411200, 22579200, 0x3ea0},
1262 {1536000, 24576000, 0x3ea0},
1263 {2048000, 16384000, 0x1ea0},
1264 {2822400, 22579200, 0x1ea0},
1265 {2822400, 45158400, 0x5ec0},
1266 {5644800, 45158400, 0x46f0},
1267 {3072000, 24576000, 0x1ea0},
1268 {3072000, 49152000, 0x5ec0},
1269 {6144000, 49152000, 0x46f0},
1270 {705600, 11289600, 0x3ea0},
1271 {705600, 8467200, 0x3ab0},
1272 {24576000, 24576000, 0x02a0},
1273 {1411200, 11289600, 0x1690},
1274 {2822400, 11289600, 0x0a90},
1275 {1536000, 12288000, 0x1690},
1276 {3072000, 12288000, 0x0a90},
1277 };
1278
1279 static struct coeff_clk_div coeff_div[] = {
1280 /* sysclk is 256fs */
1281 {2048000, 8000 * 32, 8000, 0x1000},
1282 {2048000, 8000 * 64, 8000, 0x0000},
1283 {2822400, 11025 * 32, 11025, 0x1000},
1284 {2822400, 11025 * 64, 11025, 0x0000},
1285 {4096000, 16000 * 32, 16000, 0x1000},
1286 {4096000, 16000 * 64, 16000, 0x0000},
1287 {5644800, 22050 * 32, 22050, 0x1000},
1288 {5644800, 22050 * 64, 22050, 0x0000},
1289 {8192000, 32000 * 32, 32000, 0x1000},
1290 {8192000, 32000 * 64, 32000, 0x0000},
1291 {11289600, 44100 * 32, 44100, 0x1000},
1292 {11289600, 44100 * 64, 44100, 0x0000},
1293 {12288000, 48000 * 32, 48000, 0x1000},
1294 {12288000, 48000 * 64, 48000, 0x0000},
1295 {22579200, 88200 * 32, 88200, 0x1000},
1296 {22579200, 88200 * 64, 88200, 0x0000},
1297 {24576000, 96000 * 32, 96000, 0x1000},
1298 {24576000, 96000 * 64, 96000, 0x0000},
1299 /* sysclk is 512fs */
1300 {4096000, 8000 * 32, 8000, 0x3000},
1301 {4096000, 8000 * 64, 8000, 0x2000},
1302 {5644800, 11025 * 32, 11025, 0x3000},
1303 {5644800, 11025 * 64, 11025, 0x2000},
1304 {8192000, 16000 * 32, 16000, 0x3000},
1305 {8192000, 16000 * 64, 16000, 0x2000},
1306 {11289600, 22050 * 32, 22050, 0x3000},
1307 {11289600, 22050 * 64, 22050, 0x2000},
1308 {16384000, 32000 * 32, 32000, 0x3000},
1309 {16384000, 32000 * 64, 32000, 0x2000},
1310 {22579200, 44100 * 32, 44100, 0x3000},
1311 {22579200, 44100 * 64, 44100, 0x2000},
1312 {24576000, 48000 * 32, 48000, 0x3000},
1313 {24576000, 48000 * 64, 48000, 0x2000},
1314 {45158400, 88200 * 32, 88200, 0x3000},
1315 {45158400, 88200 * 64, 88200, 0x2000},
1316 {49152000, 96000 * 32, 96000, 0x3000},
1317 {49152000, 96000 * 64, 96000, 0x2000},
1318 /* sysclk is 24.576Mhz or 22.5792Mhz */
1319 {24576000, 8000 * 32, 8000, 0x7080},
1320 {24576000, 8000 * 64, 8000, 0x6080},
1321 {24576000, 16000 * 32, 16000, 0x5080},
1322 {24576000, 16000 * 64, 16000, 0x4080},
1323 {24576000, 24000 * 32, 24000, 0x5000},
1324 {24576000, 24000 * 64, 24000, 0x4000},
1325 {24576000, 32000 * 32, 32000, 0x3080},
1326 {24576000, 32000 * 64, 32000, 0x2080},
1327 {22579200, 11025 * 32, 11025, 0x7000},
1328 {22579200, 11025 * 64, 11025, 0x6000},
1329 {22579200, 22050 * 32, 22050, 0x5000},
1330 {22579200, 22050 * 64, 22050, 0x4000},
1331 };
1332
1333 static int get_coeff(int mclk, int rate, int timesofbclk)
1334 {
1335 int i;
1336
1337 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
1338 if (coeff_div[i].mclk == mclk && coeff_div[i].rate == rate &&
1339 (coeff_div[i].bclk / coeff_div[i].rate) == timesofbclk)
1340 return i;
1341 }
1342 return -EINVAL;
1343 }
1344
1345 static int rt5631_hifi_pcm_params(struct snd_pcm_substream *substream,
1346 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1347 {
1348 struct snd_soc_codec *codec = dai->codec;
1349 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1350 int timesofbclk = 32, coeff;
1351 unsigned int iface = 0;
1352
1353 dev_dbg(codec->dev, "enter %s\n", __func__);
1354
1355 rt5631->bclk_rate = snd_soc_params_to_bclk(params);
1356 if (rt5631->bclk_rate < 0) {
1357 dev_err(codec->dev, "Fail to get BCLK rate\n");
1358 return rt5631->bclk_rate;
1359 }
1360 rt5631->rx_rate = params_rate(params);
1361
1362 if (rt5631->master)
1363 coeff = get_coeff(rt5631->sysclk, rt5631->rx_rate,
1364 rt5631->bclk_rate / rt5631->rx_rate);
1365 else
1366 coeff = get_coeff(rt5631->sysclk, rt5631->rx_rate,
1367 timesofbclk);
1368 if (coeff < 0) {
1369 dev_err(codec->dev, "Fail to get coeff\n");
1370 return coeff;
1371 }
1372
1373 switch (params_width(params)) {
1374 case 16:
1375 break;
1376 case 20:
1377 iface |= RT5631_SDP_I2S_DL_20;
1378 break;
1379 case 24:
1380 iface |= RT5631_SDP_I2S_DL_24;
1381 break;
1382 case 8:
1383 iface |= RT5631_SDP_I2S_DL_8;
1384 break;
1385 default:
1386 return -EINVAL;
1387 }
1388
1389 snd_soc_update_bits(codec, RT5631_SDP_CTRL,
1390 RT5631_SDP_I2S_DL_MASK, iface);
1391 snd_soc_write(codec, RT5631_STEREO_AD_DA_CLK_CTRL,
1392 coeff_div[coeff].reg_val);
1393
1394 return 0;
1395 }
1396
1397 static int rt5631_hifi_codec_set_dai_fmt(struct snd_soc_dai *codec_dai,
1398 unsigned int fmt)
1399 {
1400 struct snd_soc_codec *codec = codec_dai->codec;
1401 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1402 unsigned int iface = 0;
1403
1404 dev_dbg(codec->dev, "enter %s\n", __func__);
1405
1406 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1407 case SND_SOC_DAIFMT_CBM_CFM:
1408 rt5631->master = 1;
1409 break;
1410 case SND_SOC_DAIFMT_CBS_CFS:
1411 iface |= RT5631_SDP_MODE_SEL_SLAVE;
1412 rt5631->master = 0;
1413 break;
1414 default:
1415 return -EINVAL;
1416 }
1417
1418 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1419 case SND_SOC_DAIFMT_I2S:
1420 break;
1421 case SND_SOC_DAIFMT_LEFT_J:
1422 iface |= RT5631_SDP_I2S_DF_LEFT;
1423 break;
1424 case SND_SOC_DAIFMT_DSP_A:
1425 iface |= RT5631_SDP_I2S_DF_PCM_A;
1426 break;
1427 case SND_SOC_DAIFMT_DSP_B:
1428 iface |= RT5631_SDP_I2S_DF_PCM_B;
1429 break;
1430 default:
1431 return -EINVAL;
1432 }
1433
1434 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1435 case SND_SOC_DAIFMT_NB_NF:
1436 break;
1437 case SND_SOC_DAIFMT_IB_NF:
1438 iface |= RT5631_SDP_I2S_BCLK_POL_CTRL;
1439 break;
1440 default:
1441 return -EINVAL;
1442 }
1443
1444 snd_soc_write(codec, RT5631_SDP_CTRL, iface);
1445
1446 return 0;
1447 }
1448
1449 static int rt5631_hifi_codec_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1450 int clk_id, unsigned int freq, int dir)
1451 {
1452 struct snd_soc_codec *codec = codec_dai->codec;
1453 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1454
1455 dev_dbg(codec->dev, "enter %s, syclk=%d\n", __func__, freq);
1456
1457 if ((freq >= (256 * 8000)) && (freq <= (512 * 96000))) {
1458 rt5631->sysclk = freq;
1459 return 0;
1460 }
1461
1462 return -EINVAL;
1463 }
1464
1465 static int rt5631_codec_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1466 int source, unsigned int freq_in, unsigned int freq_out)
1467 {
1468 struct snd_soc_codec *codec = codec_dai->codec;
1469 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1470 int i, ret = -EINVAL;
1471
1472 dev_dbg(codec->dev, "enter %s\n", __func__);
1473
1474 if (!freq_in || !freq_out) {
1475 dev_dbg(codec->dev, "PLL disabled\n");
1476
1477 snd_soc_update_bits(codec, RT5631_GLOBAL_CLK_CTRL,
1478 RT5631_SYSCLK_SOUR_SEL_MASK,
1479 RT5631_SYSCLK_SOUR_SEL_MCLK);
1480
1481 return 0;
1482 }
1483
1484 if (rt5631->master) {
1485 for (i = 0; i < ARRAY_SIZE(codec_master_pll_div); i++)
1486 if (freq_in == codec_master_pll_div[i].pll_in &&
1487 freq_out == codec_master_pll_div[i].pll_out) {
1488 dev_info(codec->dev,
1489 "change PLL in master mode\n");
1490 snd_soc_write(codec, RT5631_PLL_CTRL,
1491 codec_master_pll_div[i].reg_val);
1492 schedule_timeout_uninterruptible(
1493 msecs_to_jiffies(20));
1494 snd_soc_update_bits(codec,
1495 RT5631_GLOBAL_CLK_CTRL,
1496 RT5631_SYSCLK_SOUR_SEL_MASK |
1497 RT5631_PLLCLK_SOUR_SEL_MASK,
1498 RT5631_SYSCLK_SOUR_SEL_PLL |
1499 RT5631_PLLCLK_SOUR_SEL_MCLK);
1500 ret = 0;
1501 break;
1502 }
1503 } else {
1504 for (i = 0; i < ARRAY_SIZE(codec_slave_pll_div); i++)
1505 if (freq_in == codec_slave_pll_div[i].pll_in &&
1506 freq_out == codec_slave_pll_div[i].pll_out) {
1507 dev_info(codec->dev,
1508 "change PLL in slave mode\n");
1509 snd_soc_write(codec, RT5631_PLL_CTRL,
1510 codec_slave_pll_div[i].reg_val);
1511 schedule_timeout_uninterruptible(
1512 msecs_to_jiffies(20));
1513 snd_soc_update_bits(codec,
1514 RT5631_GLOBAL_CLK_CTRL,
1515 RT5631_SYSCLK_SOUR_SEL_MASK |
1516 RT5631_PLLCLK_SOUR_SEL_MASK,
1517 RT5631_SYSCLK_SOUR_SEL_PLL |
1518 RT5631_PLLCLK_SOUR_SEL_BCLK);
1519 ret = 0;
1520 break;
1521 }
1522 }
1523
1524 return ret;
1525 }
1526
1527 static int rt5631_set_bias_level(struct snd_soc_codec *codec,
1528 enum snd_soc_bias_level level)
1529 {
1530 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1531
1532 switch (level) {
1533 case SND_SOC_BIAS_ON:
1534 case SND_SOC_BIAS_PREPARE:
1535 snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD2,
1536 RT5631_PWR_MICBIAS1_VOL | RT5631_PWR_MICBIAS2_VOL,
1537 RT5631_PWR_MICBIAS1_VOL | RT5631_PWR_MICBIAS2_VOL);
1538 break;
1539
1540 case SND_SOC_BIAS_STANDBY:
1541 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
1542 snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
1543 RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS,
1544 RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS);
1545 msleep(80);
1546 snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
1547 RT5631_PWR_FAST_VREF_CTRL,
1548 RT5631_PWR_FAST_VREF_CTRL);
1549 regcache_cache_only(rt5631->regmap, false);
1550 regcache_sync(rt5631->regmap);
1551 }
1552 break;
1553
1554 case SND_SOC_BIAS_OFF:
1555 snd_soc_write(codec, RT5631_PWR_MANAG_ADD1, 0x0000);
1556 snd_soc_write(codec, RT5631_PWR_MANAG_ADD2, 0x0000);
1557 snd_soc_write(codec, RT5631_PWR_MANAG_ADD3, 0x0000);
1558 snd_soc_write(codec, RT5631_PWR_MANAG_ADD4, 0x0000);
1559 break;
1560
1561 default:
1562 break;
1563 }
1564 codec->dapm.bias_level = level;
1565
1566 return 0;
1567 }
1568
1569 static int rt5631_probe(struct snd_soc_codec *codec)
1570 {
1571 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1572 unsigned int val;
1573
1574 val = rt5631_read_index(codec, RT5631_ADDA_MIXER_INTL_REG3);
1575 if (val & 0x0002)
1576 rt5631->codec_version = 1;
1577 else
1578 rt5631->codec_version = 0;
1579
1580 rt5631_reset(codec);
1581 snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
1582 RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS,
1583 RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS);
1584 msleep(80);
1585 snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
1586 RT5631_PWR_FAST_VREF_CTRL, RT5631_PWR_FAST_VREF_CTRL);
1587 /* enable HP zero cross */
1588 snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, 0x0f18);
1589 /* power off ClassD auto Recovery */
1590 if (rt5631->codec_version)
1591 snd_soc_update_bits(codec, RT5631_INT_ST_IRQ_CTRL_2,
1592 0x2000, 0x2000);
1593 else
1594 snd_soc_update_bits(codec, RT5631_INT_ST_IRQ_CTRL_2,
1595 0x2000, 0);
1596 /* DMIC */
1597 if (rt5631->dmic_used_flag) {
1598 snd_soc_update_bits(codec, RT5631_GPIO_CTRL,
1599 RT5631_GPIO_PIN_FUN_SEL_MASK |
1600 RT5631_GPIO_DMIC_FUN_SEL_MASK,
1601 RT5631_GPIO_PIN_FUN_SEL_GPIO_DIMC |
1602 RT5631_GPIO_DMIC_FUN_SEL_DIMC);
1603 snd_soc_update_bits(codec, RT5631_DIG_MIC_CTRL,
1604 RT5631_DMIC_L_CH_LATCH_MASK |
1605 RT5631_DMIC_R_CH_LATCH_MASK,
1606 RT5631_DMIC_L_CH_LATCH_FALLING |
1607 RT5631_DMIC_R_CH_LATCH_RISING);
1608 }
1609
1610 codec->dapm.bias_level = SND_SOC_BIAS_STANDBY;
1611
1612 return 0;
1613 }
1614
1615 static int rt5631_remove(struct snd_soc_codec *codec)
1616 {
1617 rt5631_set_bias_level(codec, SND_SOC_BIAS_OFF);
1618 return 0;
1619 }
1620
1621 #ifdef CONFIG_PM
1622 static int rt5631_suspend(struct snd_soc_codec *codec)
1623 {
1624 rt5631_set_bias_level(codec, SND_SOC_BIAS_OFF);
1625 return 0;
1626 }
1627
1628 static int rt5631_resume(struct snd_soc_codec *codec)
1629 {
1630 rt5631_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1631 return 0;
1632 }
1633 #else
1634 #define rt5631_suspend NULL
1635 #define rt5631_resume NULL
1636 #endif
1637
1638 #define RT5631_STEREO_RATES SNDRV_PCM_RATE_8000_96000
1639 #define RT5631_FORMAT (SNDRV_PCM_FMTBIT_S16_LE | \
1640 SNDRV_PCM_FMTBIT_S20_3LE | \
1641 SNDRV_PCM_FMTBIT_S24_LE | \
1642 SNDRV_PCM_FMTBIT_S8)
1643
1644 static const struct snd_soc_dai_ops rt5631_ops = {
1645 .hw_params = rt5631_hifi_pcm_params,
1646 .set_fmt = rt5631_hifi_codec_set_dai_fmt,
1647 .set_sysclk = rt5631_hifi_codec_set_dai_sysclk,
1648 .set_pll = rt5631_codec_set_dai_pll,
1649 };
1650
1651 static struct snd_soc_dai_driver rt5631_dai[] = {
1652 {
1653 .name = "rt5631-hifi",
1654 .id = 1,
1655 .playback = {
1656 .stream_name = "HIFI Playback",
1657 .channels_min = 1,
1658 .channels_max = 2,
1659 .rates = RT5631_STEREO_RATES,
1660 .formats = RT5631_FORMAT,
1661 },
1662 .capture = {
1663 .stream_name = "HIFI Capture",
1664 .channels_min = 1,
1665 .channels_max = 2,
1666 .rates = RT5631_STEREO_RATES,
1667 .formats = RT5631_FORMAT,
1668 },
1669 .ops = &rt5631_ops,
1670 },
1671 };
1672
1673 static struct snd_soc_codec_driver soc_codec_dev_rt5631 = {
1674 .probe = rt5631_probe,
1675 .remove = rt5631_remove,
1676 .suspend = rt5631_suspend,
1677 .resume = rt5631_resume,
1678 .set_bias_level = rt5631_set_bias_level,
1679 .controls = rt5631_snd_controls,
1680 .num_controls = ARRAY_SIZE(rt5631_snd_controls),
1681 .dapm_widgets = rt5631_dapm_widgets,
1682 .num_dapm_widgets = ARRAY_SIZE(rt5631_dapm_widgets),
1683 .dapm_routes = rt5631_dapm_routes,
1684 .num_dapm_routes = ARRAY_SIZE(rt5631_dapm_routes),
1685 };
1686
1687 static const struct i2c_device_id rt5631_i2c_id[] = {
1688 { "rt5631", 0 },
1689 { }
1690 };
1691 MODULE_DEVICE_TABLE(i2c, rt5631_i2c_id);
1692
1693 static const struct regmap_config rt5631_regmap_config = {
1694 .reg_bits = 8,
1695 .val_bits = 16,
1696
1697 .readable_reg = rt5631_readable_register,
1698 .volatile_reg = rt5631_volatile_register,
1699 .max_register = RT5631_VENDOR_ID2,
1700 .reg_defaults = rt5631_reg,
1701 .num_reg_defaults = ARRAY_SIZE(rt5631_reg),
1702 .cache_type = REGCACHE_RBTREE,
1703 };
1704
1705 static int rt5631_i2c_probe(struct i2c_client *i2c,
1706 const struct i2c_device_id *id)
1707 {
1708 struct rt5631_priv *rt5631;
1709 int ret;
1710
1711 rt5631 = devm_kzalloc(&i2c->dev, sizeof(struct rt5631_priv),
1712 GFP_KERNEL);
1713 if (NULL == rt5631)
1714 return -ENOMEM;
1715
1716 i2c_set_clientdata(i2c, rt5631);
1717
1718 rt5631->regmap = devm_regmap_init_i2c(i2c, &rt5631_regmap_config);
1719 if (IS_ERR(rt5631->regmap))
1720 return PTR_ERR(rt5631->regmap);
1721
1722 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5631,
1723 rt5631_dai, ARRAY_SIZE(rt5631_dai));
1724 return ret;
1725 }
1726
1727 static int rt5631_i2c_remove(struct i2c_client *client)
1728 {
1729 snd_soc_unregister_codec(&client->dev);
1730 return 0;
1731 }
1732
1733 static struct i2c_driver rt5631_i2c_driver = {
1734 .driver = {
1735 .name = "rt5631",
1736 .owner = THIS_MODULE,
1737 },
1738 .probe = rt5631_i2c_probe,
1739 .remove = rt5631_i2c_remove,
1740 .id_table = rt5631_i2c_id,
1741 };
1742
1743 module_i2c_driver(rt5631_i2c_driver);
1744
1745 MODULE_DESCRIPTION("ASoC RT5631 driver");
1746 MODULE_AUTHOR("flove <flove@realtek.com>");
1747 MODULE_LICENSE("GPL");
Linux with added FPC-III support