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mtd: do not duplicate length and offset checks in drivers
[linux/fpc-iii.git] / drivers / mtd / onenand / onenand_base.c
blob9c6445d372ceaaaa130472314272c8afcf221462
1 /*
2 * linux/drivers/mtd/onenand/onenand_base.c
3 *
4 * Copyright © 2005-2009 Samsung Electronics
5 * Copyright © 2007 Nokia Corporation
6 *
7 * Kyungmin Park <kyungmin.park@samsung.com>
8 *
9 * Credits:
10 * Adrian Hunter <ext-adrian.hunter@nokia.com>:
11 * auto-placement support, read-while load support, various fixes
12 *
13 * Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com>
14 * Flex-OneNAND support
15 * Amul Kumar Saha <amul.saha at samsung.com>
16 * OTP support
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
21 */
22
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/moduleparam.h>
26 #include <linux/slab.h>
27 #include <linux/init.h>
28 #include <linux/sched.h>
29 #include <linux/delay.h>
30 #include <linux/interrupt.h>
31 #include <linux/jiffies.h>
32 #include <linux/mtd/mtd.h>
33 #include <linux/mtd/onenand.h>
34 #include <linux/mtd/partitions.h>
35
36 #include <asm/io.h>
37
38 /*
39 * Multiblock erase if number of blocks to erase is 2 or more.
40 * Maximum number of blocks for simultaneous erase is 64.
41 */
42 #define MB_ERASE_MIN_BLK_COUNT 2
43 #define MB_ERASE_MAX_BLK_COUNT 64
44
45 /* Default Flex-OneNAND boundary and lock respectively */
46 static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 };
47
48 module_param_array(flex_bdry, int, NULL, 0400);
49 MODULE_PARM_DESC(flex_bdry, "SLC Boundary information for Flex-OneNAND"
50 "Syntax:flex_bdry=DIE_BDRY,LOCK,..."
51 "DIE_BDRY: SLC boundary of the die"
52 "LOCK: Locking information for SLC boundary"
53 " : 0->Set boundary in unlocked status"
54 " : 1->Set boundary in locked status");
55
56 /* Default OneNAND/Flex-OneNAND OTP options*/
57 static int otp;
58
59 module_param(otp, int, 0400);
60 MODULE_PARM_DESC(otp, "Corresponding behaviour of OneNAND in OTP"
61 "Syntax : otp=LOCK_TYPE"
62 "LOCK_TYPE : Keys issued, for specific OTP Lock type"
63 " : 0 -> Default (No Blocks Locked)"
64 " : 1 -> OTP Block lock"
65 " : 2 -> 1st Block lock"
66 " : 3 -> BOTH OTP Block and 1st Block lock");
67
68 /*
69 * flexonenand_oob_128 - oob info for Flex-Onenand with 4KB page
70 * For now, we expose only 64 out of 80 ecc bytes
71 */
72 static struct nand_ecclayout flexonenand_oob_128 = {
73 .eccbytes = 64,
74 .eccpos = {
75 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
76 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
77 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
78 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
79 70, 71, 72, 73, 74, 75, 76, 77, 78, 79,
80 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,
81 102, 103, 104, 105
82 },
83 .oobfree = {
84 {2, 4}, {18, 4}, {34, 4}, {50, 4},
85 {66, 4}, {82, 4}, {98, 4}, {114, 4}
86 }
87 };
88
89 /*
90 * onenand_oob_128 - oob info for OneNAND with 4KB page
91 *
92 * Based on specification:
93 * 4Gb M-die OneNAND Flash (KFM4G16Q4M, KFN8G16Q4M). Rev. 1.3, Apr. 2010
94 *
95 * For eccpos we expose only 64 bytes out of 72 (see struct nand_ecclayout)
96 *
97 * oobfree uses the spare area fields marked as
98 * "Managed by internal ECC logic for Logical Sector Number area"
99 */
100 static struct nand_ecclayout onenand_oob_128 = {
101 .eccbytes = 64,
102 .eccpos = {
103 7, 8, 9, 10, 11, 12, 13, 14, 15,
104 23, 24, 25, 26, 27, 28, 29, 30, 31,
105 39, 40, 41, 42, 43, 44, 45, 46, 47,
106 55, 56, 57, 58, 59, 60, 61, 62, 63,
107 71, 72, 73, 74, 75, 76, 77, 78, 79,
108 87, 88, 89, 90, 91, 92, 93, 94, 95,
109 103, 104, 105, 106, 107, 108, 109, 110, 111,
110 119
111 },
112 .oobfree = {
113 {2, 3}, {18, 3}, {34, 3}, {50, 3},
114 {66, 3}, {82, 3}, {98, 3}, {114, 3}
115 }
116 };
117
118 /**
119 * onenand_oob_64 - oob info for large (2KB) page
120 */
121 static struct nand_ecclayout onenand_oob_64 = {
122 .eccbytes = 20,
123 .eccpos = {
124 8, 9, 10, 11, 12,
125 24, 25, 26, 27, 28,
126 40, 41, 42, 43, 44,
127 56, 57, 58, 59, 60,
128 },
129 .oobfree = {
130 {2, 3}, {14, 2}, {18, 3}, {30, 2},
131 {34, 3}, {46, 2}, {50, 3}, {62, 2}
132 }
133 };
134
135 /**
136 * onenand_oob_32 - oob info for middle (1KB) page
137 */
138 static struct nand_ecclayout onenand_oob_32 = {
139 .eccbytes = 10,
140 .eccpos = {
141 8, 9, 10, 11, 12,
142 24, 25, 26, 27, 28,
143 },
144 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
145 };
146
147 static const unsigned char ffchars[] = {
148 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
149 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
150 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
151 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
152 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
153 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
154 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
155 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
156 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
157 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 80 */
158 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
159 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 96 */
160 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
161 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 112 */
162 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
163 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 128 */
164 };
165
166 /**
167 * onenand_readw - [OneNAND Interface] Read OneNAND register
168 * @param addr address to read
169 *
170 * Read OneNAND register
171 */
172 static unsigned short onenand_readw(void __iomem *addr)
173 {
174 return readw(addr);
175 }
176
177 /**
178 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
179 * @param value value to write
180 * @param addr address to write
181 *
182 * Write OneNAND register with value
183 */
184 static void onenand_writew(unsigned short value, void __iomem *addr)
185 {
186 writew(value, addr);
187 }
188
189 /**
190 * onenand_block_address - [DEFAULT] Get block address
191 * @param this onenand chip data structure
192 * @param block the block
193 * @return translated block address if DDP, otherwise same
194 *
195 * Setup Start Address 1 Register (F100h)
196 */
197 static int onenand_block_address(struct onenand_chip *this, int block)
198 {
199 /* Device Flash Core select, NAND Flash Block Address */
200 if (block & this->density_mask)
201 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
202
203 return block;
204 }
205
206 /**
207 * onenand_bufferram_address - [DEFAULT] Get bufferram address
208 * @param this onenand chip data structure
209 * @param block the block
210 * @return set DBS value if DDP, otherwise 0
211 *
212 * Setup Start Address 2 Register (F101h) for DDP
213 */
214 static int onenand_bufferram_address(struct onenand_chip *this, int block)
215 {
216 /* Device BufferRAM Select */
217 if (block & this->density_mask)
218 return ONENAND_DDP_CHIP1;
219
220 return ONENAND_DDP_CHIP0;
221 }
222
223 /**
224 * onenand_page_address - [DEFAULT] Get page address
225 * @param page the page address
226 * @param sector the sector address
227 * @return combined page and sector address
228 *
229 * Setup Start Address 8 Register (F107h)
230 */
231 static int onenand_page_address(int page, int sector)
232 {
233 /* Flash Page Address, Flash Sector Address */
234 int fpa, fsa;
235
236 fpa = page & ONENAND_FPA_MASK;
237 fsa = sector & ONENAND_FSA_MASK;
238
239 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
240 }
241
242 /**
243 * onenand_buffer_address - [DEFAULT] Get buffer address
244 * @param dataram1 DataRAM index
245 * @param sectors the sector address
246 * @param count the number of sectors
247 * @return the start buffer value
248 *
249 * Setup Start Buffer Register (F200h)
250 */
251 static int onenand_buffer_address(int dataram1, int sectors, int count)
252 {
253 int bsa, bsc;
254
255 /* BufferRAM Sector Address */
256 bsa = sectors & ONENAND_BSA_MASK;
257
258 if (dataram1)
259 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
260 else
261 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
262
263 /* BufferRAM Sector Count */
264 bsc = count & ONENAND_BSC_MASK;
265
266 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
267 }
268
269 /**
270 * flexonenand_block- For given address return block number
271 * @param this - OneNAND device structure
272 * @param addr - Address for which block number is needed
273 */
274 static unsigned flexonenand_block(struct onenand_chip *this, loff_t addr)
275 {
276 unsigned boundary, blk, die = 0;
277
278 if (ONENAND_IS_DDP(this) && addr >= this->diesize[0]) {
279 die = 1;
280 addr -= this->diesize[0];
281 }
282
283 boundary = this->boundary[die];
284
285 blk = addr >> (this->erase_shift - 1);
286 if (blk > boundary)
287 blk = (blk + boundary + 1) >> 1;
288
289 blk += die ? this->density_mask : 0;
290 return blk;
291 }
292
293 inline unsigned onenand_block(struct onenand_chip *this, loff_t addr)
294 {
295 if (!FLEXONENAND(this))
296 return addr >> this->erase_shift;
297 return flexonenand_block(this, addr);
298 }
299
300 /**
301 * flexonenand_addr - Return address of the block
302 * @this: OneNAND device structure
303 * @block: Block number on Flex-OneNAND
304 *
305 * Return address of the block
306 */
307 static loff_t flexonenand_addr(struct onenand_chip *this, int block)
308 {
309 loff_t ofs = 0;
310 int die = 0, boundary;
311
312 if (ONENAND_IS_DDP(this) && block >= this->density_mask) {
313 block -= this->density_mask;
314 die = 1;
315 ofs = this->diesize[0];
316 }
317
318 boundary = this->boundary[die];
319 ofs += (loff_t)block << (this->erase_shift - 1);
320 if (block > (boundary + 1))
321 ofs += (loff_t)(block - boundary - 1) << (this->erase_shift - 1);
322 return ofs;
323 }
324
325 loff_t onenand_addr(struct onenand_chip *this, int block)
326 {
327 if (!FLEXONENAND(this))
328 return (loff_t)block << this->erase_shift;
329 return flexonenand_addr(this, block);
330 }
331 EXPORT_SYMBOL(onenand_addr);
332
333 /**
334 * onenand_get_density - [DEFAULT] Get OneNAND density
335 * @param dev_id OneNAND device ID
336 *
337 * Get OneNAND density from device ID
338 */
339 static inline int onenand_get_density(int dev_id)
340 {
341 int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
342 return (density & ONENAND_DEVICE_DENSITY_MASK);
343 }
344
345 /**
346 * flexonenand_region - [Flex-OneNAND] Return erase region of addr
347 * @param mtd MTD device structure
348 * @param addr address whose erase region needs to be identified
349 */
350 int flexonenand_region(struct mtd_info *mtd, loff_t addr)
351 {
352 int i;
353
354 for (i = 0; i < mtd->numeraseregions; i++)
355 if (addr < mtd->eraseregions[i].offset)
356 break;
357 return i - 1;
358 }
359 EXPORT_SYMBOL(flexonenand_region);
360
361 /**
362 * onenand_command - [DEFAULT] Send command to OneNAND device
363 * @param mtd MTD device structure
364 * @param cmd the command to be sent
365 * @param addr offset to read from or write to
366 * @param len number of bytes to read or write
367 *
368 * Send command to OneNAND device. This function is used for middle/large page
369 * devices (1KB/2KB Bytes per page)
370 */
371 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
372 {
373 struct onenand_chip *this = mtd->priv;
374 int value, block, page;
375
376 /* Address translation */
377 switch (cmd) {
378 case ONENAND_CMD_UNLOCK:
379 case ONENAND_CMD_LOCK:
380 case ONENAND_CMD_LOCK_TIGHT:
381 case ONENAND_CMD_UNLOCK_ALL:
382 block = -1;
383 page = -1;
384 break;
385
386 case FLEXONENAND_CMD_PI_ACCESS:
387 /* addr contains die index */
388 block = addr * this->density_mask;
389 page = -1;
390 break;
391
392 case ONENAND_CMD_ERASE:
393 case ONENAND_CMD_MULTIBLOCK_ERASE:
394 case ONENAND_CMD_ERASE_VERIFY:
395 case ONENAND_CMD_BUFFERRAM:
396 case ONENAND_CMD_OTP_ACCESS:
397 block = onenand_block(this, addr);
398 page = -1;
399 break;
400
401 case FLEXONENAND_CMD_READ_PI:
402 cmd = ONENAND_CMD_READ;
403 block = addr * this->density_mask;
404 page = 0;
405 break;
406
407 default:
408 block = onenand_block(this, addr);
409 if (FLEXONENAND(this))
410 page = (int) (addr - onenand_addr(this, block))>>\
411 this->page_shift;
412 else
413 page = (int) (addr >> this->page_shift);
414 if (ONENAND_IS_2PLANE(this)) {
415 /* Make the even block number */
416 block &= ~1;
417 /* Is it the odd plane? */
418 if (addr & this->writesize)
419 block++;
420 page >>= 1;
421 }
422 page &= this->page_mask;
423 break;
424 }
425
426 /* NOTE: The setting order of the registers is very important! */
427 if (cmd == ONENAND_CMD_BUFFERRAM) {
428 /* Select DataRAM for DDP */
429 value = onenand_bufferram_address(this, block);
430 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
431
432 if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this))
433 /* It is always BufferRAM0 */
434 ONENAND_SET_BUFFERRAM0(this);
435 else
436 /* Switch to the next data buffer */
437 ONENAND_SET_NEXT_BUFFERRAM(this);
438
439 return 0;
440 }
441
442 if (block != -1) {
443 /* Write 'DFS, FBA' of Flash */
444 value = onenand_block_address(this, block);
445 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
446
447 /* Select DataRAM for DDP */
448 value = onenand_bufferram_address(this, block);
449 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
450 }
451
452 if (page != -1) {
453 /* Now we use page size operation */
454 int sectors = 0, count = 0;
455 int dataram;
456
457 switch (cmd) {
458 case FLEXONENAND_CMD_RECOVER_LSB:
459 case ONENAND_CMD_READ:
460 case ONENAND_CMD_READOOB:
461 if (ONENAND_IS_4KB_PAGE(this))
462 /* It is always BufferRAM0 */
463 dataram = ONENAND_SET_BUFFERRAM0(this);
464 else
465 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
466 break;
467
468 default:
469 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
470 cmd = ONENAND_CMD_2X_PROG;
471 dataram = ONENAND_CURRENT_BUFFERRAM(this);
472 break;
473 }
474
475 /* Write 'FPA, FSA' of Flash */
476 value = onenand_page_address(page, sectors);
477 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
478
479 /* Write 'BSA, BSC' of DataRAM */
480 value = onenand_buffer_address(dataram, sectors, count);
481 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
482 }
483
484 /* Interrupt clear */
485 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
486
487 /* Write command */
488 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
489
490 return 0;
491 }
492
493 /**
494 * onenand_read_ecc - return ecc status
495 * @param this onenand chip structure
496 */
497 static inline int onenand_read_ecc(struct onenand_chip *this)
498 {
499 int ecc, i, result = 0;
500
501 if (!FLEXONENAND(this) && !ONENAND_IS_4KB_PAGE(this))
502 return this->read_word(this->base + ONENAND_REG_ECC_STATUS);
503
504 for (i = 0; i < 4; i++) {
505 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS + i*2);
506 if (likely(!ecc))
507 continue;
508 if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR)
509 return ONENAND_ECC_2BIT_ALL;
510 else
511 result = ONENAND_ECC_1BIT_ALL;
512 }
513
514 return result;
515 }
516
517 /**
518 * onenand_wait - [DEFAULT] wait until the command is done
519 * @param mtd MTD device structure
520 * @param state state to select the max. timeout value
521 *
522 * Wait for command done. This applies to all OneNAND command
523 * Read can take up to 30us, erase up to 2ms and program up to 350us
524 * according to general OneNAND specs
525 */
526 static int onenand_wait(struct mtd_info *mtd, int state)
527 {
528 struct onenand_chip * this = mtd->priv;
529 unsigned long timeout;
530 unsigned int flags = ONENAND_INT_MASTER;
531 unsigned int interrupt = 0;
532 unsigned int ctrl;
533
534 /* The 20 msec is enough */
535 timeout = jiffies + msecs_to_jiffies(20);
536 while (time_before(jiffies, timeout)) {
537 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
538
539 if (interrupt & flags)
540 break;
541
542 if (state != FL_READING && state != FL_PREPARING_ERASE)
543 cond_resched();
544 }
545 /* To get correct interrupt status in timeout case */
546 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
547
548 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
549
550 /*
551 * In the Spec. it checks the controller status first
552 * However if you get the correct information in case of
553 * power off recovery (POR) test, it should read ECC status first
554 */
555 if (interrupt & ONENAND_INT_READ) {
556 int ecc = onenand_read_ecc(this);
557 if (ecc) {
558 if (ecc & ONENAND_ECC_2BIT_ALL) {
559 printk(KERN_ERR "%s: ECC error = 0x%04x\n",
560 __func__, ecc);
561 mtd->ecc_stats.failed++;
562 return -EBADMSG;
563 } else if (ecc & ONENAND_ECC_1BIT_ALL) {
564 printk(KERN_DEBUG "%s: correctable ECC error = 0x%04x\n",
565 __func__, ecc);
566 mtd->ecc_stats.corrected++;
567 }
568 }
569 } else if (state == FL_READING) {
570 printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n",
571 __func__, ctrl, interrupt);
572 return -EIO;
573 }
574
575 if (state == FL_PREPARING_ERASE && !(interrupt & ONENAND_INT_ERASE)) {
576 printk(KERN_ERR "%s: mb erase timeout! ctrl=0x%04x intr=0x%04x\n",
577 __func__, ctrl, interrupt);
578 return -EIO;
579 }
580
581 if (!(interrupt & ONENAND_INT_MASTER)) {
582 printk(KERN_ERR "%s: timeout! ctrl=0x%04x intr=0x%04x\n",
583 __func__, ctrl, interrupt);
584 return -EIO;
585 }
586
587 /* If there's controller error, it's a real error */
588 if (ctrl & ONENAND_CTRL_ERROR) {
589 printk(KERN_ERR "%s: controller error = 0x%04x\n",
590 __func__, ctrl);
591 if (ctrl & ONENAND_CTRL_LOCK)
592 printk(KERN_ERR "%s: it's locked error.\n", __func__);
593 return -EIO;
594 }
595
596 return 0;
597 }
598
599 /*
600 * onenand_interrupt - [DEFAULT] onenand interrupt handler
601 * @param irq onenand interrupt number
602 * @param dev_id interrupt data
603 *
604 * complete the work
605 */
606 static irqreturn_t onenand_interrupt(int irq, void *data)
607 {
608 struct onenand_chip *this = data;
609
610 /* To handle shared interrupt */
611 if (!this->complete.done)
612 complete(&this->complete);
613
614 return IRQ_HANDLED;
615 }
616
617 /*
618 * onenand_interrupt_wait - [DEFAULT] wait until the command is done
619 * @param mtd MTD device structure
620 * @param state state to select the max. timeout value
621 *
622 * Wait for command done.
623 */
624 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
625 {
626 struct onenand_chip *this = mtd->priv;
627
628 wait_for_completion(&this->complete);
629
630 return onenand_wait(mtd, state);
631 }
632
633 /*
634 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
635 * @param mtd MTD device structure
636 * @param state state to select the max. timeout value
637 *
638 * Try interrupt based wait (It is used one-time)
639 */
640 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
641 {
642 struct onenand_chip *this = mtd->priv;
643 unsigned long remain, timeout;
644
645 /* We use interrupt wait first */
646 this->wait = onenand_interrupt_wait;
647
648 timeout = msecs_to_jiffies(100);
649 remain = wait_for_completion_timeout(&this->complete, timeout);
650 if (!remain) {
651 printk(KERN_INFO "OneNAND: There's no interrupt. "
652 "We use the normal wait\n");
653
654 /* Release the irq */
655 free_irq(this->irq, this);
656
657 this->wait = onenand_wait;
658 }
659
660 return onenand_wait(mtd, state);
661 }
662
663 /*
664 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
665 * @param mtd MTD device structure
666 *
667 * There's two method to wait onenand work
668 * 1. polling - read interrupt status register
669 * 2. interrupt - use the kernel interrupt method
670 */
671 static void onenand_setup_wait(struct mtd_info *mtd)
672 {
673 struct onenand_chip *this = mtd->priv;
674 int syscfg;
675
676 init_completion(&this->complete);
677
678 if (this->irq <= 0) {
679 this->wait = onenand_wait;
680 return;
681 }
682
683 if (request_irq(this->irq, &onenand_interrupt,
684 IRQF_SHARED, "onenand", this)) {
685 /* If we can't get irq, use the normal wait */
686 this->wait = onenand_wait;
687 return;
688 }
689
690 /* Enable interrupt */
691 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
692 syscfg |= ONENAND_SYS_CFG1_IOBE;
693 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
694
695 this->wait = onenand_try_interrupt_wait;
696 }
697
698 /**
699 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
700 * @param mtd MTD data structure
701 * @param area BufferRAM area
702 * @return offset given area
703 *
704 * Return BufferRAM offset given area
705 */
706 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
707 {
708 struct onenand_chip *this = mtd->priv;
709
710 if (ONENAND_CURRENT_BUFFERRAM(this)) {
711 /* Note: the 'this->writesize' is a real page size */
712 if (area == ONENAND_DATARAM)
713 return this->writesize;
714 if (area == ONENAND_SPARERAM)
715 return mtd->oobsize;
716 }
717
718 return 0;
719 }
720
721 /**
722 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
723 * @param mtd MTD data structure
724 * @param area BufferRAM area
725 * @param buffer the databuffer to put/get data
726 * @param offset offset to read from or write to
727 * @param count number of bytes to read/write
728 *
729 * Read the BufferRAM area
730 */
731 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
732 unsigned char *buffer, int offset, size_t count)
733 {
734 struct onenand_chip *this = mtd->priv;
735 void __iomem *bufferram;
736
737 bufferram = this->base + area;
738
739 bufferram += onenand_bufferram_offset(mtd, area);
740
741 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
742 unsigned short word;
743
744 /* Align with word(16-bit) size */
745 count--;
746
747 /* Read word and save byte */
748 word = this->read_word(bufferram + offset + count);
749 buffer[count] = (word & 0xff);
750 }
751
752 memcpy(buffer, bufferram + offset, count);
753
754 return 0;
755 }
756
757 /**
758 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
759 * @param mtd MTD data structure
760 * @param area BufferRAM area
761 * @param buffer the databuffer to put/get data
762 * @param offset offset to read from or write to
763 * @param count number of bytes to read/write
764 *
765 * Read the BufferRAM area with Sync. Burst Mode
766 */
767 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
768 unsigned char *buffer, int offset, size_t count)
769 {
770 struct onenand_chip *this = mtd->priv;
771 void __iomem *bufferram;
772
773 bufferram = this->base + area;
774
775 bufferram += onenand_bufferram_offset(mtd, area);
776
777 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
778
779 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
780 unsigned short word;
781
782 /* Align with word(16-bit) size */
783 count--;
784
785 /* Read word and save byte */
786 word = this->read_word(bufferram + offset + count);
787 buffer[count] = (word & 0xff);
788 }
789
790 memcpy(buffer, bufferram + offset, count);
791
792 this->mmcontrol(mtd, 0);
793
794 return 0;
795 }
796
797 /**
798 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
799 * @param mtd MTD data structure
800 * @param area BufferRAM area
801 * @param buffer the databuffer to put/get data
802 * @param offset offset to read from or write to
803 * @param count number of bytes to read/write
804 *
805 * Write the BufferRAM area
806 */
807 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
808 const unsigned char *buffer, int offset, size_t count)
809 {
810 struct onenand_chip *this = mtd->priv;
811 void __iomem *bufferram;
812
813 bufferram = this->base + area;
814
815 bufferram += onenand_bufferram_offset(mtd, area);
816
817 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
818 unsigned short word;
819 int byte_offset;
820
821 /* Align with word(16-bit) size */
822 count--;
823
824 /* Calculate byte access offset */
825 byte_offset = offset + count;
826
827 /* Read word and save byte */
828 word = this->read_word(bufferram + byte_offset);
829 word = (word & ~0xff) | buffer[count];
830 this->write_word(word, bufferram + byte_offset);
831 }
832
833 memcpy(bufferram + offset, buffer, count);
834
835 return 0;
836 }
837
838 /**
839 * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
840 * @param mtd MTD data structure
841 * @param addr address to check
842 * @return blockpage address
843 *
844 * Get blockpage address at 2x program mode
845 */
846 static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
847 {
848 struct onenand_chip *this = mtd->priv;
849 int blockpage, block, page;
850
851 /* Calculate the even block number */
852 block = (int) (addr >> this->erase_shift) & ~1;
853 /* Is it the odd plane? */
854 if (addr & this->writesize)
855 block++;
856 page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
857 blockpage = (block << 7) | page;
858
859 return blockpage;
860 }
861
862 /**
863 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
864 * @param mtd MTD data structure
865 * @param addr address to check
866 * @return 1 if there are valid data, otherwise 0
867 *
868 * Check bufferram if there is data we required
869 */
870 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
871 {
872 struct onenand_chip *this = mtd->priv;
873 int blockpage, found = 0;
874 unsigned int i;
875
876 if (ONENAND_IS_2PLANE(this))
877 blockpage = onenand_get_2x_blockpage(mtd, addr);
878 else
879 blockpage = (int) (addr >> this->page_shift);
880
881 /* Is there valid data? */
882 i = ONENAND_CURRENT_BUFFERRAM(this);
883 if (this->bufferram[i].blockpage == blockpage)
884 found = 1;
885 else {
886 /* Check another BufferRAM */
887 i = ONENAND_NEXT_BUFFERRAM(this);
888 if (this->bufferram[i].blockpage == blockpage) {
889 ONENAND_SET_NEXT_BUFFERRAM(this);
890 found = 1;
891 }
892 }
893
894 if (found && ONENAND_IS_DDP(this)) {
895 /* Select DataRAM for DDP */
896 int block = onenand_block(this, addr);
897 int value = onenand_bufferram_address(this, block);
898 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
899 }
900
901 return found;
902 }
903
904 /**
905 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
906 * @param mtd MTD data structure
907 * @param addr address to update
908 * @param valid valid flag
909 *
910 * Update BufferRAM information
911 */
912 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
913 int valid)
914 {
915 struct onenand_chip *this = mtd->priv;
916 int blockpage;
917 unsigned int i;
918
919 if (ONENAND_IS_2PLANE(this))
920 blockpage = onenand_get_2x_blockpage(mtd, addr);
921 else
922 blockpage = (int) (addr >> this->page_shift);
923
924 /* Invalidate another BufferRAM */
925 i = ONENAND_NEXT_BUFFERRAM(this);
926 if (this->bufferram[i].blockpage == blockpage)
927 this->bufferram[i].blockpage = -1;
928
929 /* Update BufferRAM */
930 i = ONENAND_CURRENT_BUFFERRAM(this);
931 if (valid)
932 this->bufferram[i].blockpage = blockpage;
933 else
934 this->bufferram[i].blockpage = -1;
935 }
936
937 /**
938 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
939 * @param mtd MTD data structure
940 * @param addr start address to invalidate
941 * @param len length to invalidate
942 *
943 * Invalidate BufferRAM information
944 */
945 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
946 unsigned int len)
947 {
948 struct onenand_chip *this = mtd->priv;
949 int i;
950 loff_t end_addr = addr + len;
951
952 /* Invalidate BufferRAM */
953 for (i = 0; i < MAX_BUFFERRAM; i++) {
954 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
955 if (buf_addr >= addr && buf_addr < end_addr)
956 this->bufferram[i].blockpage = -1;
957 }
958 }
959
960 /**
961 * onenand_get_device - [GENERIC] Get chip for selected access
962 * @param mtd MTD device structure
963 * @param new_state the state which is requested
964 *
965 * Get the device and lock it for exclusive access
966 */
967 static int onenand_get_device(struct mtd_info *mtd, int new_state)
968 {
969 struct onenand_chip *this = mtd->priv;
970 DECLARE_WAITQUEUE(wait, current);
971
972 /*
973 * Grab the lock and see if the device is available
974 */
975 while (1) {
976 spin_lock(&this->chip_lock);
977 if (this->state == FL_READY) {
978 this->state = new_state;
979 spin_unlock(&this->chip_lock);
980 if (new_state != FL_PM_SUSPENDED && this->enable)
981 this->enable(mtd);
982 break;
983 }
984 if (new_state == FL_PM_SUSPENDED) {
985 spin_unlock(&this->chip_lock);
986 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
987 }
988 set_current_state(TASK_UNINTERRUPTIBLE);
989 add_wait_queue(&this->wq, &wait);
990 spin_unlock(&this->chip_lock);
991 schedule();
992 remove_wait_queue(&this->wq, &wait);
993 }
994
995 return 0;
996 }
997
998 /**
999 * onenand_release_device - [GENERIC] release chip
1000 * @param mtd MTD device structure
1001 *
1002 * Deselect, release chip lock and wake up anyone waiting on the device
1003 */
1004 static void onenand_release_device(struct mtd_info *mtd)
1005 {
1006 struct onenand_chip *this = mtd->priv;
1007
1008 if (this->state != FL_PM_SUSPENDED && this->disable)
1009 this->disable(mtd);
1010 /* Release the chip */
1011 spin_lock(&this->chip_lock);
1012 this->state = FL_READY;
1013 wake_up(&this->wq);
1014 spin_unlock(&this->chip_lock);
1015 }
1016
1017 /**
1018 * onenand_transfer_auto_oob - [INTERN] oob auto-placement transfer
1019 * @param mtd MTD device structure
1020 * @param buf destination address
1021 * @param column oob offset to read from
1022 * @param thislen oob length to read
1023 */
1024 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
1025 int thislen)
1026 {
1027 struct onenand_chip *this = mtd->priv;
1028 struct nand_oobfree *free;
1029 int readcol = column;
1030 int readend = column + thislen;
1031 int lastgap = 0;
1032 unsigned int i;
1033 uint8_t *oob_buf = this->oob_buf;
1034
1035 free = this->ecclayout->oobfree;
1036 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1037 if (readcol >= lastgap)
1038 readcol += free->offset - lastgap;
1039 if (readend >= lastgap)
1040 readend += free->offset - lastgap;
1041 lastgap = free->offset + free->length;
1042 }
1043 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
1044 free = this->ecclayout->oobfree;
1045 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1046 int free_end = free->offset + free->length;
1047 if (free->offset < readend && free_end > readcol) {
1048 int st = max_t(int,free->offset,readcol);
1049 int ed = min_t(int,free_end,readend);
1050 int n = ed - st;
1051 memcpy(buf, oob_buf + st, n);
1052 buf += n;
1053 } else if (column == 0)
1054 break;
1055 }
1056 return 0;
1057 }
1058
1059 /**
1060 * onenand_recover_lsb - [Flex-OneNAND] Recover LSB page data
1061 * @param mtd MTD device structure
1062 * @param addr address to recover
1063 * @param status return value from onenand_wait / onenand_bbt_wait
1064 *
1065 * MLC NAND Flash cell has paired pages - LSB page and MSB page. LSB page has
1066 * lower page address and MSB page has higher page address in paired pages.
1067 * If power off occurs during MSB page program, the paired LSB page data can
1068 * become corrupt. LSB page recovery read is a way to read LSB page though page
1069 * data are corrupted. When uncorrectable error occurs as a result of LSB page
1070 * read after power up, issue LSB page recovery read.
1071 */
1072 static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status)
1073 {
1074 struct onenand_chip *this = mtd->priv;
1075 int i;
1076
1077 /* Recovery is only for Flex-OneNAND */
1078 if (!FLEXONENAND(this))
1079 return status;
1080
1081 /* check if we failed due to uncorrectable error */
1082 if (!mtd_is_eccerr(status) && status != ONENAND_BBT_READ_ECC_ERROR)
1083 return status;
1084
1085 /* check if address lies in MLC region */
1086 i = flexonenand_region(mtd, addr);
1087 if (mtd->eraseregions[i].erasesize < (1 << this->erase_shift))
1088 return status;
1089
1090 /* We are attempting to reread, so decrement stats.failed
1091 * which was incremented by onenand_wait due to read failure
1092 */
1093 printk(KERN_INFO "%s: Attempting to recover from uncorrectable read\n",
1094 __func__);
1095 mtd->ecc_stats.failed--;
1096
1097 /* Issue the LSB page recovery command */
1098 this->command(mtd, FLEXONENAND_CMD_RECOVER_LSB, addr, this->writesize);
1099 return this->wait(mtd, FL_READING);
1100 }
1101
1102 /**
1103 * onenand_mlc_read_ops_nolock - MLC OneNAND read main and/or out-of-band
1104 * @param mtd MTD device structure
1105 * @param from offset to read from
1106 * @param ops: oob operation description structure
1107 *
1108 * MLC OneNAND / Flex-OneNAND has 4KB page size and 4KB dataram.
1109 * So, read-while-load is not present.
1110 */
1111 static int onenand_mlc_read_ops_nolock(struct mtd_info *mtd, loff_t from,
1112 struct mtd_oob_ops *ops)
1113 {
1114 struct onenand_chip *this = mtd->priv;
1115 struct mtd_ecc_stats stats;
1116 size_t len = ops->len;
1117 size_t ooblen = ops->ooblen;
1118 u_char *buf = ops->datbuf;
1119 u_char *oobbuf = ops->oobbuf;
1120 int read = 0, column, thislen;
1121 int oobread = 0, oobcolumn, thisooblen, oobsize;
1122 int ret = 0;
1123 int writesize = this->writesize;
1124
1125 pr_debug("%s: from = 0x%08x, len = %i\n", __func__, (unsigned int)from,
1126 (int)len);
1127
1128 if (ops->mode == MTD_OPS_AUTO_OOB)
1129 oobsize = this->ecclayout->oobavail;
1130 else
1131 oobsize = mtd->oobsize;
1132
1133 oobcolumn = from & (mtd->oobsize - 1);
1134
1135 /* Do not allow reads past end of device */
1136 if (from + len > mtd->size) {
1137 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1138 __func__);
1139 ops->retlen = 0;
1140 ops->oobretlen = 0;
1141 return -EINVAL;
1142 }
1143
1144 stats = mtd->ecc_stats;
1145
1146 while (read < len) {
1147 cond_resched();
1148
1149 thislen = min_t(int, writesize, len - read);
1150
1151 column = from & (writesize - 1);
1152 if (column + thislen > writesize)
1153 thislen = writesize - column;
1154
1155 if (!onenand_check_bufferram(mtd, from)) {
1156 this->command(mtd, ONENAND_CMD_READ, from, writesize);
1157
1158 ret = this->wait(mtd, FL_READING);
1159 if (unlikely(ret))
1160 ret = onenand_recover_lsb(mtd, from, ret);
1161 onenand_update_bufferram(mtd, from, !ret);
1162 if (mtd_is_eccerr(ret))
1163 ret = 0;
1164 if (ret)
1165 break;
1166 }
1167
1168 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
1169 if (oobbuf) {
1170 thisooblen = oobsize - oobcolumn;
1171 thisooblen = min_t(int, thisooblen, ooblen - oobread);
1172
1173 if (ops->mode == MTD_OPS_AUTO_OOB)
1174 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
1175 else
1176 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
1177 oobread += thisooblen;
1178 oobbuf += thisooblen;
1179 oobcolumn = 0;
1180 }
1181
1182 read += thislen;
1183 if (read == len)
1184 break;
1185
1186 from += thislen;
1187 buf += thislen;
1188 }
1189
1190 /*
1191 * Return success, if no ECC failures, else -EBADMSG
1192 * fs driver will take care of that, because
1193 * retlen == desired len and result == -EBADMSG
1194 */
1195 ops->retlen = read;
1196 ops->oobretlen = oobread;
1197
1198 if (ret)
1199 return ret;
1200
1201 if (mtd->ecc_stats.failed - stats.failed)
1202 return -EBADMSG;
1203
1204 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
1205 }
1206
1207 /**
1208 * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
1209 * @param mtd MTD device structure
1210 * @param from offset to read from
1211 * @param ops: oob operation description structure
1212 *
1213 * OneNAND read main and/or out-of-band data
1214 */
1215 static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
1216 struct mtd_oob_ops *ops)
1217 {
1218 struct onenand_chip *this = mtd->priv;
1219 struct mtd_ecc_stats stats;
1220 size_t len = ops->len;
1221 size_t ooblen = ops->ooblen;
1222 u_char *buf = ops->datbuf;
1223 u_char *oobbuf = ops->oobbuf;
1224 int read = 0, column, thislen;
1225 int oobread = 0, oobcolumn, thisooblen, oobsize;
1226 int ret = 0, boundary = 0;
1227 int writesize = this->writesize;
1228
1229 pr_debug("%s: from = 0x%08x, len = %i\n", __func__, (unsigned int)from,
1230 (int)len);
1231
1232 if (ops->mode == MTD_OPS_AUTO_OOB)
1233 oobsize = this->ecclayout->oobavail;
1234 else
1235 oobsize = mtd->oobsize;
1236
1237 oobcolumn = from & (mtd->oobsize - 1);
1238
1239 /* Do not allow reads past end of device */
1240 if ((from + len) > mtd->size) {
1241 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1242 __func__);
1243 ops->retlen = 0;
1244 ops->oobretlen = 0;
1245 return -EINVAL;
1246 }
1247
1248 stats = mtd->ecc_stats;
1249
1250 /* Read-while-load method */
1251
1252 /* Do first load to bufferRAM */
1253 if (read < len) {
1254 if (!onenand_check_bufferram(mtd, from)) {
1255 this->command(mtd, ONENAND_CMD_READ, from, writesize);
1256 ret = this->wait(mtd, FL_READING);
1257 onenand_update_bufferram(mtd, from, !ret);
1258 if (mtd_is_eccerr(ret))
1259 ret = 0;
1260 }
1261 }
1262
1263 thislen = min_t(int, writesize, len - read);
1264 column = from & (writesize - 1);
1265 if (column + thislen > writesize)
1266 thislen = writesize - column;
1267
1268 while (!ret) {
1269 /* If there is more to load then start next load */
1270 from += thislen;
1271 if (read + thislen < len) {
1272 this->command(mtd, ONENAND_CMD_READ, from, writesize);
1273 /*
1274 * Chip boundary handling in DDP
1275 * Now we issued chip 1 read and pointed chip 1
1276 * bufferram so we have to point chip 0 bufferram.
1277 */
1278 if (ONENAND_IS_DDP(this) &&
1279 unlikely(from == (this->chipsize >> 1))) {
1280 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
1281 boundary = 1;
1282 } else
1283 boundary = 0;
1284 ONENAND_SET_PREV_BUFFERRAM(this);
1285 }
1286 /* While load is going, read from last bufferRAM */
1287 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
1288
1289 /* Read oob area if needed */
1290 if (oobbuf) {
1291 thisooblen = oobsize - oobcolumn;
1292 thisooblen = min_t(int, thisooblen, ooblen - oobread);
1293
1294 if (ops->mode == MTD_OPS_AUTO_OOB)
1295 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
1296 else
1297 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
1298 oobread += thisooblen;
1299 oobbuf += thisooblen;
1300 oobcolumn = 0;
1301 }
1302
1303 /* See if we are done */
1304 read += thislen;
1305 if (read == len)
1306 break;
1307 /* Set up for next read from bufferRAM */
1308 if (unlikely(boundary))
1309 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
1310 ONENAND_SET_NEXT_BUFFERRAM(this);
1311 buf += thislen;
1312 thislen = min_t(int, writesize, len - read);
1313 column = 0;
1314 cond_resched();
1315 /* Now wait for load */
1316 ret = this->wait(mtd, FL_READING);
1317 onenand_update_bufferram(mtd, from, !ret);
1318 if (mtd_is_eccerr(ret))
1319 ret = 0;
1320 }
1321
1322 /*
1323 * Return success, if no ECC failures, else -EBADMSG
1324 * fs driver will take care of that, because
1325 * retlen == desired len and result == -EBADMSG
1326 */
1327 ops->retlen = read;
1328 ops->oobretlen = oobread;
1329
1330 if (ret)
1331 return ret;
1332
1333 if (mtd->ecc_stats.failed - stats.failed)
1334 return -EBADMSG;
1335
1336 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
1337 }
1338
1339 /**
1340 * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
1341 * @param mtd MTD device structure
1342 * @param from offset to read from
1343 * @param ops: oob operation description structure
1344 *
1345 * OneNAND read out-of-band data from the spare area
1346 */
1347 static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
1348 struct mtd_oob_ops *ops)
1349 {
1350 struct onenand_chip *this = mtd->priv;
1351 struct mtd_ecc_stats stats;
1352 int read = 0, thislen, column, oobsize;
1353 size_t len = ops->ooblen;
1354 unsigned int mode = ops->mode;
1355 u_char *buf = ops->oobbuf;
1356 int ret = 0, readcmd;
1357
1358 from += ops->ooboffs;
1359
1360 pr_debug("%s: from = 0x%08x, len = %i\n", __func__, (unsigned int)from,
1361 (int)len);
1362
1363 /* Initialize return length value */
1364 ops->oobretlen = 0;
1365
1366 if (mode == MTD_OPS_AUTO_OOB)
1367 oobsize = this->ecclayout->oobavail;
1368 else
1369 oobsize = mtd->oobsize;
1370
1371 column = from & (mtd->oobsize - 1);
1372
1373 if (unlikely(column >= oobsize)) {
1374 printk(KERN_ERR "%s: Attempted to start read outside oob\n",
1375 __func__);
1376 return -EINVAL;
1377 }
1378
1379 /* Do not allow reads past end of device */
1380 if (unlikely(from >= mtd->size ||
1381 column + len > ((mtd->size >> this->page_shift) -
1382 (from >> this->page_shift)) * oobsize)) {
1383 printk(KERN_ERR "%s: Attempted to read beyond end of device\n",
1384 __func__);
1385 return -EINVAL;
1386 }
1387
1388 stats = mtd->ecc_stats;
1389
1390 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1391
1392 while (read < len) {
1393 cond_resched();
1394
1395 thislen = oobsize - column;
1396 thislen = min_t(int, thislen, len);
1397
1398 this->command(mtd, readcmd, from, mtd->oobsize);
1399
1400 onenand_update_bufferram(mtd, from, 0);
1401
1402 ret = this->wait(mtd, FL_READING);
1403 if (unlikely(ret))
1404 ret = onenand_recover_lsb(mtd, from, ret);
1405
1406 if (ret && !mtd_is_eccerr(ret)) {
1407 printk(KERN_ERR "%s: read failed = 0x%x\n",
1408 __func__, ret);
1409 break;
1410 }
1411
1412 if (mode == MTD_OPS_AUTO_OOB)
1413 onenand_transfer_auto_oob(mtd, buf, column, thislen);
1414 else
1415 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1416
1417 read += thislen;
1418
1419 if (read == len)
1420 break;
1421
1422 buf += thislen;
1423
1424 /* Read more? */
1425 if (read < len) {
1426 /* Page size */
1427 from += mtd->writesize;
1428 column = 0;
1429 }
1430 }
1431
1432 ops->oobretlen = read;
1433
1434 if (ret)
1435 return ret;
1436
1437 if (mtd->ecc_stats.failed - stats.failed)
1438 return -EBADMSG;
1439
1440 return 0;
1441 }
1442
1443 /**
1444 * onenand_read - [MTD Interface] Read data from flash
1445 * @param mtd MTD device structure
1446 * @param from offset to read from
1447 * @param len number of bytes to read
1448 * @param retlen pointer to variable to store the number of read bytes
1449 * @param buf the databuffer to put data
1450 *
1451 * Read with ecc
1452 */
1453 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
1454 size_t *retlen, u_char *buf)
1455 {
1456 struct onenand_chip *this = mtd->priv;
1457 struct mtd_oob_ops ops = {
1458 .len = len,
1459 .ooblen = 0,
1460 .datbuf = buf,
1461 .oobbuf = NULL,
1462 };
1463 int ret;
1464
1465 onenand_get_device(mtd, FL_READING);
1466 ret = ONENAND_IS_4KB_PAGE(this) ?
1467 onenand_mlc_read_ops_nolock(mtd, from, &ops) :
1468 onenand_read_ops_nolock(mtd, from, &ops);
1469 onenand_release_device(mtd);
1470
1471 *retlen = ops.retlen;
1472 return ret;
1473 }
1474
1475 /**
1476 * onenand_read_oob - [MTD Interface] Read main and/or out-of-band
1477 * @param mtd: MTD device structure
1478 * @param from: offset to read from
1479 * @param ops: oob operation description structure
1480
1481 * Read main and/or out-of-band
1482 */
1483 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
1484 struct mtd_oob_ops *ops)
1485 {
1486 struct onenand_chip *this = mtd->priv;
1487 int ret;
1488
1489 switch (ops->mode) {
1490 case MTD_OPS_PLACE_OOB:
1491 case MTD_OPS_AUTO_OOB:
1492 break;
1493 case MTD_OPS_RAW:
1494 /* Not implemented yet */
1495 default:
1496 return -EINVAL;
1497 }
1498
1499 onenand_get_device(mtd, FL_READING);
1500 if (ops->datbuf)
1501 ret = ONENAND_IS_4KB_PAGE(this) ?
1502 onenand_mlc_read_ops_nolock(mtd, from, ops) :
1503 onenand_read_ops_nolock(mtd, from, ops);
1504 else
1505 ret = onenand_read_oob_nolock(mtd, from, ops);
1506 onenand_release_device(mtd);
1507
1508 return ret;
1509 }
1510
1511 /**
1512 * onenand_bbt_wait - [DEFAULT] wait until the command is done
1513 * @param mtd MTD device structure
1514 * @param state state to select the max. timeout value
1515 *
1516 * Wait for command done.
1517 */
1518 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1519 {
1520 struct onenand_chip *this = mtd->priv;
1521 unsigned long timeout;
1522 unsigned int interrupt, ctrl, ecc, addr1, addr8;
1523
1524 /* The 20 msec is enough */
1525 timeout = jiffies + msecs_to_jiffies(20);
1526 while (time_before(jiffies, timeout)) {
1527 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1528 if (interrupt & ONENAND_INT_MASTER)
1529 break;
1530 }
1531 /* To get correct interrupt status in timeout case */
1532 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1533 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
1534 addr1 = this->read_word(this->base + ONENAND_REG_START_ADDRESS1);
1535 addr8 = this->read_word(this->base + ONENAND_REG_START_ADDRESS8);
1536
1537 if (interrupt & ONENAND_INT_READ) {
1538 ecc = onenand_read_ecc(this);
1539 if (ecc & ONENAND_ECC_2BIT_ALL) {
1540 printk(KERN_DEBUG "%s: ecc 0x%04x ctrl 0x%04x "
1541 "intr 0x%04x addr1 %#x addr8 %#x\n",
1542 __func__, ecc, ctrl, interrupt, addr1, addr8);
1543 return ONENAND_BBT_READ_ECC_ERROR;
1544 }
1545 } else {
1546 printk(KERN_ERR "%s: read timeout! ctrl 0x%04x "
1547 "intr 0x%04x addr1 %#x addr8 %#x\n",
1548 __func__, ctrl, interrupt, addr1, addr8);
1549 return ONENAND_BBT_READ_FATAL_ERROR;
1550 }
1551
1552 /* Initial bad block case: 0x2400 or 0x0400 */
1553 if (ctrl & ONENAND_CTRL_ERROR) {
1554 printk(KERN_DEBUG "%s: ctrl 0x%04x intr 0x%04x addr1 %#x "
1555 "addr8 %#x\n", __func__, ctrl, interrupt, addr1, addr8);
1556 return ONENAND_BBT_READ_ERROR;
1557 }
1558
1559 return 0;
1560 }
1561
1562 /**
1563 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1564 * @param mtd MTD device structure
1565 * @param from offset to read from
1566 * @param ops oob operation description structure
1567 *
1568 * OneNAND read out-of-band data from the spare area for bbt scan
1569 */
1570 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1571 struct mtd_oob_ops *ops)
1572 {
1573 struct onenand_chip *this = mtd->priv;
1574 int read = 0, thislen, column;
1575 int ret = 0, readcmd;
1576 size_t len = ops->ooblen;
1577 u_char *buf = ops->oobbuf;
1578
1579 pr_debug("%s: from = 0x%08x, len = %zi\n", __func__, (unsigned int)from,
1580 len);
1581
1582 /* Initialize return value */
1583 ops->oobretlen = 0;
1584
1585 /* Do not allow reads past end of device */
1586 if (unlikely((from + len) > mtd->size)) {
1587 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1588 __func__);
1589 return ONENAND_BBT_READ_FATAL_ERROR;
1590 }
1591
1592 /* Grab the lock and see if the device is available */
1593 onenand_get_device(mtd, FL_READING);
1594
1595 column = from & (mtd->oobsize - 1);
1596
1597 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1598
1599 while (read < len) {
1600 cond_resched();
1601
1602 thislen = mtd->oobsize - column;
1603 thislen = min_t(int, thislen, len);
1604
1605 this->command(mtd, readcmd, from, mtd->oobsize);
1606
1607 onenand_update_bufferram(mtd, from, 0);
1608
1609 ret = this->bbt_wait(mtd, FL_READING);
1610 if (unlikely(ret))
1611 ret = onenand_recover_lsb(mtd, from, ret);
1612
1613 if (ret)
1614 break;
1615
1616 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1617 read += thislen;
1618 if (read == len)
1619 break;
1620
1621 buf += thislen;
1622
1623 /* Read more? */
1624 if (read < len) {
1625 /* Update Page size */
1626 from += this->writesize;
1627 column = 0;
1628 }
1629 }
1630
1631 /* Deselect and wake up anyone waiting on the device */
1632 onenand_release_device(mtd);
1633
1634 ops->oobretlen = read;
1635 return ret;
1636 }
1637
1638 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1639 /**
1640 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1641 * @param mtd MTD device structure
1642 * @param buf the databuffer to verify
1643 * @param to offset to read from
1644 */
1645 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1646 {
1647 struct onenand_chip *this = mtd->priv;
1648 u_char *oob_buf = this->oob_buf;
1649 int status, i, readcmd;
1650
1651 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1652
1653 this->command(mtd, readcmd, to, mtd->oobsize);
1654 onenand_update_bufferram(mtd, to, 0);
1655 status = this->wait(mtd, FL_READING);
1656 if (status)
1657 return status;
1658
1659 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
1660 for (i = 0; i < mtd->oobsize; i++)
1661 if (buf[i] != 0xFF && buf[i] != oob_buf[i])
1662 return -EBADMSG;
1663
1664 return 0;
1665 }
1666
1667 /**
1668 * onenand_verify - [GENERIC] verify the chip contents after a write
1669 * @param mtd MTD device structure
1670 * @param buf the databuffer to verify
1671 * @param addr offset to read from
1672 * @param len number of bytes to read and compare
1673 */
1674 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1675 {
1676 struct onenand_chip *this = mtd->priv;
1677 int ret = 0;
1678 int thislen, column;
1679
1680 column = addr & (this->writesize - 1);
1681
1682 while (len != 0) {
1683 thislen = min_t(int, this->writesize - column, len);
1684
1685 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
1686
1687 onenand_update_bufferram(mtd, addr, 0);
1688
1689 ret = this->wait(mtd, FL_READING);
1690 if (ret)
1691 return ret;
1692
1693 onenand_update_bufferram(mtd, addr, 1);
1694
1695 this->read_bufferram(mtd, ONENAND_DATARAM, this->verify_buf, 0, mtd->writesize);
1696
1697 if (memcmp(buf, this->verify_buf + column, thislen))
1698 return -EBADMSG;
1699
1700 len -= thislen;
1701 buf += thislen;
1702 addr += thislen;
1703 column = 0;
1704 }
1705
1706 return 0;
1707 }
1708 #else
1709 #define onenand_verify(...) (0)
1710 #define onenand_verify_oob(...) (0)
1711 #endif
1712
1713 #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
1714
1715 static void onenand_panic_wait(struct mtd_info *mtd)
1716 {
1717 struct onenand_chip *this = mtd->priv;
1718 unsigned int interrupt;
1719 int i;
1720
1721 for (i = 0; i < 2000; i++) {
1722 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1723 if (interrupt & ONENAND_INT_MASTER)
1724 break;
1725 udelay(10);
1726 }
1727 }
1728
1729 /**
1730 * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context
1731 * @param mtd MTD device structure
1732 * @param to offset to write to
1733 * @param len number of bytes to write
1734 * @param retlen pointer to variable to store the number of written bytes
1735 * @param buf the data to write
1736 *
1737 * Write with ECC
1738 */
1739 static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len,
1740 size_t *retlen, const u_char *buf)
1741 {
1742 struct onenand_chip *this = mtd->priv;
1743 int column, subpage;
1744 int written = 0;
1745 int ret = 0;
1746
1747 if (this->state == FL_PM_SUSPENDED)
1748 return -EBUSY;
1749
1750 /* Wait for any existing operation to clear */
1751 onenand_panic_wait(mtd);
1752
1753 pr_debug("%s: to = 0x%08x, len = %i\n", __func__, (unsigned int)to,
1754 (int)len);
1755
1756 /* Initialize retlen, in case of early exit */
1757 *retlen = 0;
1758
1759 /* Reject writes, which are not page aligned */
1760 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1761 printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
1762 __func__);
1763 return -EINVAL;
1764 }
1765
1766 column = to & (mtd->writesize - 1);
1767
1768 /* Loop until all data write */
1769 while (written < len) {
1770 int thislen = min_t(int, mtd->writesize - column, len - written);
1771 u_char *wbuf = (u_char *) buf;
1772
1773 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1774
1775 /* Partial page write */
1776 subpage = thislen < mtd->writesize;
1777 if (subpage) {
1778 memset(this->page_buf, 0xff, mtd->writesize);
1779 memcpy(this->page_buf + column, buf, thislen);
1780 wbuf = this->page_buf;
1781 }
1782
1783 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1784 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1785
1786 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1787
1788 onenand_panic_wait(mtd);
1789
1790 /* In partial page write we don't update bufferram */
1791 onenand_update_bufferram(mtd, to, !ret && !subpage);
1792 if (ONENAND_IS_2PLANE(this)) {
1793 ONENAND_SET_BUFFERRAM1(this);
1794 onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
1795 }
1796
1797 if (ret) {
1798 printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
1799 break;
1800 }
1801
1802 written += thislen;
1803
1804 if (written == len)
1805 break;
1806
1807 column = 0;
1808 to += thislen;
1809 buf += thislen;
1810 }
1811
1812 *retlen = written;
1813 return ret;
1814 }
1815
1816 /**
1817 * onenand_fill_auto_oob - [INTERN] oob auto-placement transfer
1818 * @param mtd MTD device structure
1819 * @param oob_buf oob buffer
1820 * @param buf source address
1821 * @param column oob offset to write to
1822 * @param thislen oob length to write
1823 */
1824 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1825 const u_char *buf, int column, int thislen)
1826 {
1827 struct onenand_chip *this = mtd->priv;
1828 struct nand_oobfree *free;
1829 int writecol = column;
1830 int writeend = column + thislen;
1831 int lastgap = 0;
1832 unsigned int i;
1833
1834 free = this->ecclayout->oobfree;
1835 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1836 if (writecol >= lastgap)
1837 writecol += free->offset - lastgap;
1838 if (writeend >= lastgap)
1839 writeend += free->offset - lastgap;
1840 lastgap = free->offset + free->length;
1841 }
1842 free = this->ecclayout->oobfree;
1843 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1844 int free_end = free->offset + free->length;
1845 if (free->offset < writeend && free_end > writecol) {
1846 int st = max_t(int,free->offset,writecol);
1847 int ed = min_t(int,free_end,writeend);
1848 int n = ed - st;
1849 memcpy(oob_buf + st, buf, n);
1850 buf += n;
1851 } else if (column == 0)
1852 break;
1853 }
1854 return 0;
1855 }
1856
1857 /**
1858 * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
1859 * @param mtd MTD device structure
1860 * @param to offset to write to
1861 * @param ops oob operation description structure
1862 *
1863 * Write main and/or oob with ECC
1864 */
1865 static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
1866 struct mtd_oob_ops *ops)
1867 {
1868 struct onenand_chip *this = mtd->priv;
1869 int written = 0, column, thislen = 0, subpage = 0;
1870 int prev = 0, prevlen = 0, prev_subpage = 0, first = 1;
1871 int oobwritten = 0, oobcolumn, thisooblen, oobsize;
1872 size_t len = ops->len;
1873 size_t ooblen = ops->ooblen;
1874 const u_char *buf = ops->datbuf;
1875 const u_char *oob = ops->oobbuf;
1876 u_char *oobbuf;
1877 int ret = 0, cmd;
1878
1879 pr_debug("%s: to = 0x%08x, len = %i\n", __func__, (unsigned int)to,
1880 (int)len);
1881
1882 /* Initialize retlen, in case of early exit */
1883 ops->retlen = 0;
1884 ops->oobretlen = 0;
1885
1886 /* Reject writes, which are not page aligned */
1887 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1888 printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
1889 __func__);
1890 return -EINVAL;
1891 }
1892
1893 /* Check zero length */
1894 if (!len)
1895 return 0;
1896
1897 if (ops->mode == MTD_OPS_AUTO_OOB)
1898 oobsize = this->ecclayout->oobavail;
1899 else
1900 oobsize = mtd->oobsize;
1901
1902 oobcolumn = to & (mtd->oobsize - 1);
1903
1904 column = to & (mtd->writesize - 1);
1905
1906 /* Loop until all data write */
1907 while (1) {
1908 if (written < len) {
1909 u_char *wbuf = (u_char *) buf;
1910
1911 thislen = min_t(int, mtd->writesize - column, len - written);
1912 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
1913
1914 cond_resched();
1915
1916 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1917
1918 /* Partial page write */
1919 subpage = thislen < mtd->writesize;
1920 if (subpage) {
1921 memset(this->page_buf, 0xff, mtd->writesize);
1922 memcpy(this->page_buf + column, buf, thislen);
1923 wbuf = this->page_buf;
1924 }
1925
1926 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1927
1928 if (oob) {
1929 oobbuf = this->oob_buf;
1930
1931 /* We send data to spare ram with oobsize
1932 * to prevent byte access */
1933 memset(oobbuf, 0xff, mtd->oobsize);
1934 if (ops->mode == MTD_OPS_AUTO_OOB)
1935 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
1936 else
1937 memcpy(oobbuf + oobcolumn, oob, thisooblen);
1938
1939 oobwritten += thisooblen;
1940 oob += thisooblen;
1941 oobcolumn = 0;
1942 } else
1943 oobbuf = (u_char *) ffchars;
1944
1945 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1946 } else
1947 ONENAND_SET_NEXT_BUFFERRAM(this);
1948
1949 /*
1950 * 2 PLANE, MLC, and Flex-OneNAND do not support
1951 * write-while-program feature.
1952 */
1953 if (!ONENAND_IS_2PLANE(this) && !ONENAND_IS_4KB_PAGE(this) && !first) {
1954 ONENAND_SET_PREV_BUFFERRAM(this);
1955
1956 ret = this->wait(mtd, FL_WRITING);
1957
1958 /* In partial page write we don't update bufferram */
1959 onenand_update_bufferram(mtd, prev, !ret && !prev_subpage);
1960 if (ret) {
1961 written -= prevlen;
1962 printk(KERN_ERR "%s: write failed %d\n",
1963 __func__, ret);
1964 break;
1965 }
1966
1967 if (written == len) {
1968 /* Only check verify write turn on */
1969 ret = onenand_verify(mtd, buf - len, to - len, len);
1970 if (ret)
1971 printk(KERN_ERR "%s: verify failed %d\n",
1972 __func__, ret);
1973 break;
1974 }
1975
1976 ONENAND_SET_NEXT_BUFFERRAM(this);
1977 }
1978
1979 this->ongoing = 0;
1980 cmd = ONENAND_CMD_PROG;
1981
1982 /* Exclude 1st OTP and OTP blocks for cache program feature */
1983 if (ONENAND_IS_CACHE_PROGRAM(this) &&
1984 likely(onenand_block(this, to) != 0) &&
1985 ONENAND_IS_4KB_PAGE(this) &&
1986 ((written + thislen) < len)) {
1987 cmd = ONENAND_CMD_2X_CACHE_PROG;
1988 this->ongoing = 1;
1989 }
1990
1991 this->command(mtd, cmd, to, mtd->writesize);
1992
1993 /*
1994 * 2 PLANE, MLC, and Flex-OneNAND wait here
1995 */
1996 if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this)) {
1997 ret = this->wait(mtd, FL_WRITING);
1998
1999 /* In partial page write we don't update bufferram */
2000 onenand_update_bufferram(mtd, to, !ret && !subpage);
2001 if (ret) {
2002 printk(KERN_ERR "%s: write failed %d\n",
2003 __func__, ret);
2004 break;
2005 }
2006
2007 /* Only check verify write turn on */
2008 ret = onenand_verify(mtd, buf, to, thislen);
2009 if (ret) {
2010 printk(KERN_ERR "%s: verify failed %d\n",
2011 __func__, ret);
2012 break;
2013 }
2014
2015 written += thislen;
2016
2017 if (written == len)
2018 break;
2019
2020 } else
2021 written += thislen;
2022
2023 column = 0;
2024 prev_subpage = subpage;
2025 prev = to;
2026 prevlen = thislen;
2027 to += thislen;
2028 buf += thislen;
2029 first = 0;
2030 }
2031
2032 /* In error case, clear all bufferrams */
2033 if (written != len)
2034 onenand_invalidate_bufferram(mtd, 0, -1);
2035
2036 ops->retlen = written;
2037 ops->oobretlen = oobwritten;
2038
2039 return ret;
2040 }
2041
2042
2043 /**
2044 * onenand_write_oob_nolock - [INTERN] OneNAND write out-of-band
2045 * @param mtd MTD device structure
2046 * @param to offset to write to
2047 * @param len number of bytes to write
2048 * @param retlen pointer to variable to store the number of written bytes
2049 * @param buf the data to write
2050 * @param mode operation mode
2051 *
2052 * OneNAND write out-of-band
2053 */
2054 static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
2055 struct mtd_oob_ops *ops)
2056 {
2057 struct onenand_chip *this = mtd->priv;
2058 int column, ret = 0, oobsize;
2059 int written = 0, oobcmd;
2060 u_char *oobbuf;
2061 size_t len = ops->ooblen;
2062 const u_char *buf = ops->oobbuf;
2063 unsigned int mode = ops->mode;
2064
2065 to += ops->ooboffs;
2066
2067 pr_debug("%s: to = 0x%08x, len = %i\n", __func__, (unsigned int)to,
2068 (int)len);
2069
2070 /* Initialize retlen, in case of early exit */
2071 ops->oobretlen = 0;
2072
2073 if (mode == MTD_OPS_AUTO_OOB)
2074 oobsize = this->ecclayout->oobavail;
2075 else
2076 oobsize = mtd->oobsize;
2077
2078 column = to & (mtd->oobsize - 1);
2079
2080 if (unlikely(column >= oobsize)) {
2081 printk(KERN_ERR "%s: Attempted to start write outside oob\n",
2082 __func__);
2083 return -EINVAL;
2084 }
2085
2086 /* For compatibility with NAND: Do not allow write past end of page */
2087 if (unlikely(column + len > oobsize)) {
2088 printk(KERN_ERR "%s: Attempt to write past end of page\n",
2089 __func__);
2090 return -EINVAL;
2091 }
2092
2093 /* Do not allow reads past end of device */
2094 if (unlikely(to >= mtd->size ||
2095 column + len > ((mtd->size >> this->page_shift) -
2096 (to >> this->page_shift)) * oobsize)) {
2097 printk(KERN_ERR "%s: Attempted to write past end of device\n",
2098 __func__);
2099 return -EINVAL;
2100 }
2101
2102 oobbuf = this->oob_buf;
2103
2104 oobcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB;
2105
2106 /* Loop until all data write */
2107 while (written < len) {
2108 int thislen = min_t(int, oobsize, len - written);
2109
2110 cond_resched();
2111
2112 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
2113
2114 /* We send data to spare ram with oobsize
2115 * to prevent byte access */
2116 memset(oobbuf, 0xff, mtd->oobsize);
2117 if (mode == MTD_OPS_AUTO_OOB)
2118 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
2119 else
2120 memcpy(oobbuf + column, buf, thislen);
2121 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
2122
2123 if (ONENAND_IS_4KB_PAGE(this)) {
2124 /* Set main area of DataRAM to 0xff*/
2125 memset(this->page_buf, 0xff, mtd->writesize);
2126 this->write_bufferram(mtd, ONENAND_DATARAM,
2127 this->page_buf, 0, mtd->writesize);
2128 }
2129
2130 this->command(mtd, oobcmd, to, mtd->oobsize);
2131
2132 onenand_update_bufferram(mtd, to, 0);
2133 if (ONENAND_IS_2PLANE(this)) {
2134 ONENAND_SET_BUFFERRAM1(this);
2135 onenand_update_bufferram(mtd, to + this->writesize, 0);
2136 }
2137
2138 ret = this->wait(mtd, FL_WRITING);
2139 if (ret) {
2140 printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
2141 break;
2142 }
2143
2144 ret = onenand_verify_oob(mtd, oobbuf, to);
2145 if (ret) {
2146 printk(KERN_ERR "%s: verify failed %d\n",
2147 __func__, ret);
2148 break;
2149 }
2150
2151 written += thislen;
2152 if (written == len)
2153 break;
2154
2155 to += mtd->writesize;
2156 buf += thislen;
2157 column = 0;
2158 }
2159
2160 ops->oobretlen = written;
2161
2162 return ret;
2163 }
2164
2165 /**
2166 * onenand_write - [MTD Interface] write buffer to FLASH
2167 * @param mtd MTD device structure
2168 * @param to offset to write to
2169 * @param len number of bytes to write
2170 * @param retlen pointer to variable to store the number of written bytes
2171 * @param buf the data to write
2172 *
2173 * Write with ECC
2174 */
2175 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
2176 size_t *retlen, const u_char *buf)
2177 {
2178 struct mtd_oob_ops ops = {
2179 .len = len,
2180 .ooblen = 0,
2181 .datbuf = (u_char *) buf,
2182 .oobbuf = NULL,
2183 };
2184 int ret;
2185
2186 onenand_get_device(mtd, FL_WRITING);
2187 ret = onenand_write_ops_nolock(mtd, to, &ops);
2188 onenand_release_device(mtd);
2189
2190 *retlen = ops.retlen;
2191 return ret;
2192 }
2193
2194 /**
2195 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
2196 * @param mtd: MTD device structure
2197 * @param to: offset to write
2198 * @param ops: oob operation description structure
2199 */
2200 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
2201 struct mtd_oob_ops *ops)
2202 {
2203 int ret;
2204
2205 switch (ops->mode) {
2206 case MTD_OPS_PLACE_OOB:
2207 case MTD_OPS_AUTO_OOB:
2208 break;
2209 case MTD_OPS_RAW:
2210 /* Not implemented yet */
2211 default:
2212 return -EINVAL;
2213 }
2214
2215 onenand_get_device(mtd, FL_WRITING);
2216 if (ops->datbuf)
2217 ret = onenand_write_ops_nolock(mtd, to, ops);
2218 else
2219 ret = onenand_write_oob_nolock(mtd, to, ops);
2220 onenand_release_device(mtd);
2221
2222 return ret;
2223 }
2224
2225 /**
2226 * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
2227 * @param mtd MTD device structure
2228 * @param ofs offset from device start
2229 * @param allowbbt 1, if its allowed to access the bbt area
2230 *
2231 * Check, if the block is bad. Either by reading the bad block table or
2232 * calling of the scan function.
2233 */
2234 static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
2235 {
2236 struct onenand_chip *this = mtd->priv;
2237 struct bbm_info *bbm = this->bbm;
2238
2239 /* Return info from the table */
2240 return bbm->isbad_bbt(mtd, ofs, allowbbt);
2241 }
2242
2243
2244 static int onenand_multiblock_erase_verify(struct mtd_info *mtd,
2245 struct erase_info *instr)
2246 {
2247 struct onenand_chip *this = mtd->priv;
2248 loff_t addr = instr->addr;
2249 int len = instr->len;
2250 unsigned int block_size = (1 << this->erase_shift);
2251 int ret = 0;
2252
2253 while (len) {
2254 this->command(mtd, ONENAND_CMD_ERASE_VERIFY, addr, block_size);
2255 ret = this->wait(mtd, FL_VERIFYING_ERASE);
2256 if (ret) {
2257 printk(KERN_ERR "%s: Failed verify, block %d\n",
2258 __func__, onenand_block(this, addr));
2259 instr->state = MTD_ERASE_FAILED;
2260 instr->fail_addr = addr;
2261 return -1;
2262 }
2263 len -= block_size;
2264 addr += block_size;
2265 }
2266 return 0;
2267 }
2268
2269 /**
2270 * onenand_multiblock_erase - [INTERN] erase block(s) using multiblock erase
2271 * @param mtd MTD device structure
2272 * @param instr erase instruction
2273 * @param region erase region
2274 *
2275 * Erase one or more blocks up to 64 block at a time
2276 */
2277 static int onenand_multiblock_erase(struct mtd_info *mtd,
2278 struct erase_info *instr,
2279 unsigned int block_size)
2280 {
2281 struct onenand_chip *this = mtd->priv;
2282 loff_t addr = instr->addr;
2283 int len = instr->len;
2284 int eb_count = 0;
2285 int ret = 0;
2286 int bdry_block = 0;
2287
2288 instr->state = MTD_ERASING;
2289
2290 if (ONENAND_IS_DDP(this)) {
2291 loff_t bdry_addr = this->chipsize >> 1;
2292 if (addr < bdry_addr && (addr + len) > bdry_addr)
2293 bdry_block = bdry_addr >> this->erase_shift;
2294 }
2295
2296 /* Pre-check bbs */
2297 while (len) {
2298 /* Check if we have a bad block, we do not erase bad blocks */
2299 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
2300 printk(KERN_WARNING "%s: attempt to erase a bad block "
2301 "at addr 0x%012llx\n",
2302 __func__, (unsigned long long) addr);
2303 instr->state = MTD_ERASE_FAILED;
2304 return -EIO;
2305 }
2306 len -= block_size;
2307 addr += block_size;
2308 }
2309
2310 len = instr->len;
2311 addr = instr->addr;
2312
2313 /* loop over 64 eb batches */
2314 while (len) {
2315 struct erase_info verify_instr = *instr;
2316 int max_eb_count = MB_ERASE_MAX_BLK_COUNT;
2317
2318 verify_instr.addr = addr;
2319 verify_instr.len = 0;
2320
2321 /* do not cross chip boundary */
2322 if (bdry_block) {
2323 int this_block = (addr >> this->erase_shift);
2324
2325 if (this_block < bdry_block) {
2326 max_eb_count = min(max_eb_count,
2327 (bdry_block - this_block));
2328 }
2329 }
2330
2331 eb_count = 0;
2332
2333 while (len > block_size && eb_count < (max_eb_count - 1)) {
2334 this->command(mtd, ONENAND_CMD_MULTIBLOCK_ERASE,
2335 addr, block_size);
2336 onenand_invalidate_bufferram(mtd, addr, block_size);
2337
2338 ret = this->wait(mtd, FL_PREPARING_ERASE);
2339 if (ret) {
2340 printk(KERN_ERR "%s: Failed multiblock erase, "
2341 "block %d\n", __func__,
2342 onenand_block(this, addr));
2343 instr->state = MTD_ERASE_FAILED;
2344 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2345 return -EIO;
2346 }
2347
2348 len -= block_size;
2349 addr += block_size;
2350 eb_count++;
2351 }
2352
2353 /* last block of 64-eb series */
2354 cond_resched();
2355 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
2356 onenand_invalidate_bufferram(mtd, addr, block_size);
2357
2358 ret = this->wait(mtd, FL_ERASING);
2359 /* Check if it is write protected */
2360 if (ret) {
2361 printk(KERN_ERR "%s: Failed erase, block %d\n",
2362 __func__, onenand_block(this, addr));
2363 instr->state = MTD_ERASE_FAILED;
2364 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2365 return -EIO;
2366 }
2367
2368 len -= block_size;
2369 addr += block_size;
2370 eb_count++;
2371
2372 /* verify */
2373 verify_instr.len = eb_count * block_size;
2374 if (onenand_multiblock_erase_verify(mtd, &verify_instr)) {
2375 instr->state = verify_instr.state;
2376 instr->fail_addr = verify_instr.fail_addr;
2377 return -EIO;
2378 }
2379
2380 }
2381 return 0;
2382 }
2383
2384
2385 /**
2386 * onenand_block_by_block_erase - [INTERN] erase block(s) using regular erase
2387 * @param mtd MTD device structure
2388 * @param instr erase instruction
2389 * @param region erase region
2390 * @param block_size erase block size
2391 *
2392 * Erase one or more blocks one block at a time
2393 */
2394 static int onenand_block_by_block_erase(struct mtd_info *mtd,
2395 struct erase_info *instr,
2396 struct mtd_erase_region_info *region,
2397 unsigned int block_size)
2398 {
2399 struct onenand_chip *this = mtd->priv;
2400 loff_t addr = instr->addr;
2401 int len = instr->len;
2402 loff_t region_end = 0;
2403 int ret = 0;
2404
2405 if (region) {
2406 /* region is set for Flex-OneNAND */
2407 region_end = region->offset + region->erasesize * region->numblocks;
2408 }
2409
2410 instr->state = MTD_ERASING;
2411
2412 /* Loop through the blocks */
2413 while (len) {
2414 cond_resched();
2415
2416 /* Check if we have a bad block, we do not erase bad blocks */
2417 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
2418 printk(KERN_WARNING "%s: attempt to erase a bad block "
2419 "at addr 0x%012llx\n",
2420 __func__, (unsigned long long) addr);
2421 instr->state = MTD_ERASE_FAILED;
2422 return -EIO;
2423 }
2424
2425 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
2426
2427 onenand_invalidate_bufferram(mtd, addr, block_size);
2428
2429 ret = this->wait(mtd, FL_ERASING);
2430 /* Check, if it is write protected */
2431 if (ret) {
2432 printk(KERN_ERR "%s: Failed erase, block %d\n",
2433 __func__, onenand_block(this, addr));
2434 instr->state = MTD_ERASE_FAILED;
2435 instr->fail_addr = addr;
2436 return -EIO;
2437 }
2438
2439 len -= block_size;
2440 addr += block_size;
2441
2442 if (region && addr == region_end) {
2443 if (!len)
2444 break;
2445 region++;
2446
2447 block_size = region->erasesize;
2448 region_end = region->offset + region->erasesize * region->numblocks;
2449
2450 if (len & (block_size - 1)) {
2451 /* FIXME: This should be handled at MTD partitioning level. */
2452 printk(KERN_ERR "%s: Unaligned address\n",
2453 __func__);
2454 return -EIO;
2455 }
2456 }
2457 }
2458 return 0;
2459 }
2460
2461 /**
2462 * onenand_erase - [MTD Interface] erase block(s)
2463 * @param mtd MTD device structure
2464 * @param instr erase instruction
2465 *
2466 * Erase one or more blocks
2467 */
2468 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
2469 {
2470 struct onenand_chip *this = mtd->priv;
2471 unsigned int block_size;
2472 loff_t addr = instr->addr;
2473 loff_t len = instr->len;
2474 int ret = 0;
2475 struct mtd_erase_region_info *region = NULL;
2476 loff_t region_offset = 0;
2477
2478 pr_debug("%s: start=0x%012llx, len=%llu\n", __func__,
2479 (unsigned long long)instr->addr,
2480 (unsigned long long)instr->len);
2481
2482 if (FLEXONENAND(this)) {
2483 /* Find the eraseregion of this address */
2484 int i = flexonenand_region(mtd, addr);
2485
2486 region = &mtd->eraseregions[i];
2487 block_size = region->erasesize;
2488
2489 /* Start address within region must align on block boundary.
2490 * Erase region's start offset is always block start address.
2491 */
2492 region_offset = region->offset;
2493 } else
2494 block_size = 1 << this->erase_shift;
2495
2496 /* Start address must align on block boundary */
2497 if (unlikely((addr - region_offset) & (block_size - 1))) {
2498 printk(KERN_ERR "%s: Unaligned address\n", __func__);
2499 return -EINVAL;
2500 }
2501
2502 /* Length must align on block boundary */
2503 if (unlikely(len & (block_size - 1))) {
2504 printk(KERN_ERR "%s: Length not block aligned\n", __func__);
2505 return -EINVAL;
2506 }
2507
2508 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2509
2510 /* Grab the lock and see if the device is available */
2511 onenand_get_device(mtd, FL_ERASING);
2512
2513 if (ONENAND_IS_4KB_PAGE(this) || region ||
2514 instr->len < MB_ERASE_MIN_BLK_COUNT * block_size) {
2515 /* region is set for Flex-OneNAND (no mb erase) */
2516 ret = onenand_block_by_block_erase(mtd, instr,
2517 region, block_size);
2518 } else {
2519 ret = onenand_multiblock_erase(mtd, instr, block_size);
2520 }
2521
2522 /* Deselect and wake up anyone waiting on the device */
2523 onenand_release_device(mtd);
2524
2525 /* Do call back function */
2526 if (!ret) {
2527 instr->state = MTD_ERASE_DONE;
2528 mtd_erase_callback(instr);
2529 }
2530
2531 return ret;
2532 }
2533
2534 /**
2535 * onenand_sync - [MTD Interface] sync
2536 * @param mtd MTD device structure
2537 *
2538 * Sync is actually a wait for chip ready function
2539 */
2540 static void onenand_sync(struct mtd_info *mtd)
2541 {
2542 pr_debug("%s: called\n", __func__);
2543
2544 /* Grab the lock and see if the device is available */
2545 onenand_get_device(mtd, FL_SYNCING);
2546
2547 /* Release it and go back */
2548 onenand_release_device(mtd);
2549 }
2550
2551 /**
2552 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
2553 * @param mtd MTD device structure
2554 * @param ofs offset relative to mtd start
2555 *
2556 * Check whether the block is bad
2557 */
2558 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
2559 {
2560 int ret;
2561
2562 /* Check for invalid offset */
2563 if (ofs > mtd->size)
2564 return -EINVAL;
2565
2566 onenand_get_device(mtd, FL_READING);
2567 ret = onenand_block_isbad_nolock(mtd, ofs, 0);
2568 onenand_release_device(mtd);
2569 return ret;
2570 }
2571
2572 /**
2573 * onenand_default_block_markbad - [DEFAULT] mark a block bad
2574 * @param mtd MTD device structure
2575 * @param ofs offset from device start
2576 *
2577 * This is the default implementation, which can be overridden by
2578 * a hardware specific driver.
2579 */
2580 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
2581 {
2582 struct onenand_chip *this = mtd->priv;
2583 struct bbm_info *bbm = this->bbm;
2584 u_char buf[2] = {0, 0};
2585 struct mtd_oob_ops ops = {
2586 .mode = MTD_OPS_PLACE_OOB,
2587 .ooblen = 2,
2588 .oobbuf = buf,
2589 .ooboffs = 0,
2590 };
2591 int block;
2592
2593 /* Get block number */
2594 block = onenand_block(this, ofs);
2595 if (bbm->bbt)
2596 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
2597
2598 /* We write two bytes, so we don't have to mess with 16-bit access */
2599 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
2600 /* FIXME : What to do when marking SLC block in partition
2601 * with MLC erasesize? For now, it is not advisable to
2602 * create partitions containing both SLC and MLC regions.
2603 */
2604 return onenand_write_oob_nolock(mtd, ofs, &ops);
2605 }
2606
2607 /**
2608 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
2609 * @param mtd MTD device structure
2610 * @param ofs offset relative to mtd start
2611 *
2612 * Mark the block as bad
2613 */
2614 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
2615 {
2616 int ret;
2617
2618 ret = onenand_block_isbad(mtd, ofs);
2619 if (ret) {
2620 /* If it was bad already, return success and do nothing */
2621 if (ret > 0)
2622 return 0;
2623 return ret;
2624 }
2625
2626 onenand_get_device(mtd, FL_WRITING);
2627 ret = mtd_block_markbad(mtd, ofs);
2628 onenand_release_device(mtd);
2629 return ret;
2630 }
2631
2632 /**
2633 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
2634 * @param mtd MTD device structure
2635 * @param ofs offset relative to mtd start
2636 * @param len number of bytes to lock or unlock
2637 * @param cmd lock or unlock command
2638 *
2639 * Lock or unlock one or more blocks
2640 */
2641 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
2642 {
2643 struct onenand_chip *this = mtd->priv;
2644 int start, end, block, value, status;
2645 int wp_status_mask;
2646
2647 start = onenand_block(this, ofs);
2648 end = onenand_block(this, ofs + len) - 1;
2649
2650 if (cmd == ONENAND_CMD_LOCK)
2651 wp_status_mask = ONENAND_WP_LS;
2652 else
2653 wp_status_mask = ONENAND_WP_US;
2654
2655 /* Continuous lock scheme */
2656 if (this->options & ONENAND_HAS_CONT_LOCK) {
2657 /* Set start block address */
2658 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2659 /* Set end block address */
2660 this->write_word(end, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
2661 /* Write lock command */
2662 this->command(mtd, cmd, 0, 0);
2663
2664 /* There's no return value */
2665 this->wait(mtd, FL_LOCKING);
2666
2667 /* Sanity check */
2668 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2669 & ONENAND_CTRL_ONGO)
2670 continue;
2671
2672 /* Check lock status */
2673 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2674 if (!(status & wp_status_mask))
2675 printk(KERN_ERR "%s: wp status = 0x%x\n",
2676 __func__, status);
2677
2678 return 0;
2679 }
2680
2681 /* Block lock scheme */
2682 for (block = start; block < end + 1; block++) {
2683 /* Set block address */
2684 value = onenand_block_address(this, block);
2685 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2686 /* Select DataRAM for DDP */
2687 value = onenand_bufferram_address(this, block);
2688 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2689 /* Set start block address */
2690 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2691 /* Write lock command */
2692 this->command(mtd, cmd, 0, 0);
2693
2694 /* There's no return value */
2695 this->wait(mtd, FL_LOCKING);
2696
2697 /* Sanity check */
2698 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2699 & ONENAND_CTRL_ONGO)
2700 continue;
2701
2702 /* Check lock status */
2703 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2704 if (!(status & wp_status_mask))
2705 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
2706 __func__, block, status);
2707 }
2708
2709 return 0;
2710 }
2711
2712 /**
2713 * onenand_lock - [MTD Interface] Lock block(s)
2714 * @param mtd MTD device structure
2715 * @param ofs offset relative to mtd start
2716 * @param len number of bytes to unlock
2717 *
2718 * Lock one or more blocks
2719 */
2720 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
2721 {
2722 int ret;
2723
2724 onenand_get_device(mtd, FL_LOCKING);
2725 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
2726 onenand_release_device(mtd);
2727 return ret;
2728 }
2729
2730 /**
2731 * onenand_unlock - [MTD Interface] Unlock block(s)
2732 * @param mtd MTD device structure
2733 * @param ofs offset relative to mtd start
2734 * @param len number of bytes to unlock
2735 *
2736 * Unlock one or more blocks
2737 */
2738 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
2739 {
2740 int ret;
2741
2742 onenand_get_device(mtd, FL_LOCKING);
2743 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2744 onenand_release_device(mtd);
2745 return ret;
2746 }
2747
2748 /**
2749 * onenand_check_lock_status - [OneNAND Interface] Check lock status
2750 * @param this onenand chip data structure
2751 *
2752 * Check lock status
2753 */
2754 static int onenand_check_lock_status(struct onenand_chip *this)
2755 {
2756 unsigned int value, block, status;
2757 unsigned int end;
2758
2759 end = this->chipsize >> this->erase_shift;
2760 for (block = 0; block < end; block++) {
2761 /* Set block address */
2762 value = onenand_block_address(this, block);
2763 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2764 /* Select DataRAM for DDP */
2765 value = onenand_bufferram_address(this, block);
2766 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2767 /* Set start block address */
2768 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2769
2770 /* Check lock status */
2771 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2772 if (!(status & ONENAND_WP_US)) {
2773 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
2774 __func__, block, status);
2775 return 0;
2776 }
2777 }
2778
2779 return 1;
2780 }
2781
2782 /**
2783 * onenand_unlock_all - [OneNAND Interface] unlock all blocks
2784 * @param mtd MTD device structure
2785 *
2786 * Unlock all blocks
2787 */
2788 static void onenand_unlock_all(struct mtd_info *mtd)
2789 {
2790 struct onenand_chip *this = mtd->priv;
2791 loff_t ofs = 0;
2792 loff_t len = mtd->size;
2793
2794 if (this->options & ONENAND_HAS_UNLOCK_ALL) {
2795 /* Set start block address */
2796 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2797 /* Write unlock command */
2798 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
2799
2800 /* There's no return value */
2801 this->wait(mtd, FL_LOCKING);
2802
2803 /* Sanity check */
2804 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2805 & ONENAND_CTRL_ONGO)
2806 continue;
2807
2808 /* Don't check lock status */
2809 if (this->options & ONENAND_SKIP_UNLOCK_CHECK)
2810 return;
2811
2812 /* Check lock status */
2813 if (onenand_check_lock_status(this))
2814 return;
2815
2816 /* Workaround for all block unlock in DDP */
2817 if (ONENAND_IS_DDP(this) && !FLEXONENAND(this)) {
2818 /* All blocks on another chip */
2819 ofs = this->chipsize >> 1;
2820 len = this->chipsize >> 1;
2821 }
2822 }
2823
2824 onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2825 }
2826
2827 #ifdef CONFIG_MTD_ONENAND_OTP
2828
2829 /**
2830 * onenand_otp_command - Send OTP specific command to OneNAND device
2831 * @param mtd MTD device structure
2832 * @param cmd the command to be sent
2833 * @param addr offset to read from or write to
2834 * @param len number of bytes to read or write
2835 */
2836 static int onenand_otp_command(struct mtd_info *mtd, int cmd, loff_t addr,
2837 size_t len)
2838 {
2839 struct onenand_chip *this = mtd->priv;
2840 int value, block, page;
2841
2842 /* Address translation */
2843 switch (cmd) {
2844 case ONENAND_CMD_OTP_ACCESS:
2845 block = (int) (addr >> this->erase_shift);
2846 page = -1;
2847 break;
2848
2849 default:
2850 block = (int) (addr >> this->erase_shift);
2851 page = (int) (addr >> this->page_shift);
2852
2853 if (ONENAND_IS_2PLANE(this)) {
2854 /* Make the even block number */
2855 block &= ~1;
2856 /* Is it the odd plane? */
2857 if (addr & this->writesize)
2858 block++;
2859 page >>= 1;
2860 }
2861 page &= this->page_mask;
2862 break;
2863 }
2864
2865 if (block != -1) {
2866 /* Write 'DFS, FBA' of Flash */
2867 value = onenand_block_address(this, block);
2868 this->write_word(value, this->base +
2869 ONENAND_REG_START_ADDRESS1);
2870 }
2871
2872 if (page != -1) {
2873 /* Now we use page size operation */
2874 int sectors = 4, count = 4;
2875 int dataram;
2876
2877 switch (cmd) {
2878 default:
2879 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
2880 cmd = ONENAND_CMD_2X_PROG;
2881 dataram = ONENAND_CURRENT_BUFFERRAM(this);
2882 break;
2883 }
2884
2885 /* Write 'FPA, FSA' of Flash */
2886 value = onenand_page_address(page, sectors);
2887 this->write_word(value, this->base +
2888 ONENAND_REG_START_ADDRESS8);
2889
2890 /* Write 'BSA, BSC' of DataRAM */
2891 value = onenand_buffer_address(dataram, sectors, count);
2892 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
2893 }
2894
2895 /* Interrupt clear */
2896 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
2897
2898 /* Write command */
2899 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
2900
2901 return 0;
2902 }
2903
2904 /**
2905 * onenand_otp_write_oob_nolock - [INTERN] OneNAND write out-of-band, specific to OTP
2906 * @param mtd MTD device structure
2907 * @param to offset to write to
2908 * @param len number of bytes to write
2909 * @param retlen pointer to variable to store the number of written bytes
2910 * @param buf the data to write
2911 *
2912 * OneNAND write out-of-band only for OTP
2913 */
2914 static int onenand_otp_write_oob_nolock(struct mtd_info *mtd, loff_t to,
2915 struct mtd_oob_ops *ops)
2916 {
2917 struct onenand_chip *this = mtd->priv;
2918 int column, ret = 0, oobsize;
2919 int written = 0;
2920 u_char *oobbuf;
2921 size_t len = ops->ooblen;
2922 const u_char *buf = ops->oobbuf;
2923 int block, value, status;
2924
2925 to += ops->ooboffs;
2926
2927 /* Initialize retlen, in case of early exit */
2928 ops->oobretlen = 0;
2929
2930 oobsize = mtd->oobsize;
2931
2932 column = to & (mtd->oobsize - 1);
2933
2934 oobbuf = this->oob_buf;
2935
2936 /* Loop until all data write */
2937 while (written < len) {
2938 int thislen = min_t(int, oobsize, len - written);
2939
2940 cond_resched();
2941
2942 block = (int) (to >> this->erase_shift);
2943 /*
2944 * Write 'DFS, FBA' of Flash
2945 * Add: F100h DQ=DFS, FBA
2946 */
2947
2948 value = onenand_block_address(this, block);
2949 this->write_word(value, this->base +
2950 ONENAND_REG_START_ADDRESS1);
2951
2952 /*
2953 * Select DataRAM for DDP
2954 * Add: F101h DQ=DBS
2955 */
2956
2957 value = onenand_bufferram_address(this, block);
2958 this->write_word(value, this->base +
2959 ONENAND_REG_START_ADDRESS2);
2960 ONENAND_SET_NEXT_BUFFERRAM(this);
2961
2962 /*
2963 * Enter OTP access mode
2964 */
2965 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2966 this->wait(mtd, FL_OTPING);
2967
2968 /* We send data to spare ram with oobsize
2969 * to prevent byte access */
2970 memcpy(oobbuf + column, buf, thislen);
2971
2972 /*
2973 * Write Data into DataRAM
2974 * Add: 8th Word
2975 * in sector0/spare/page0
2976 * DQ=XXFCh
2977 */
2978 this->write_bufferram(mtd, ONENAND_SPARERAM,
2979 oobbuf, 0, mtd->oobsize);
2980
2981 onenand_otp_command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
2982 onenand_update_bufferram(mtd, to, 0);
2983 if (ONENAND_IS_2PLANE(this)) {
2984 ONENAND_SET_BUFFERRAM1(this);
2985 onenand_update_bufferram(mtd, to + this->writesize, 0);
2986 }
2987
2988 ret = this->wait(mtd, FL_WRITING);
2989 if (ret) {
2990 printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
2991 break;
2992 }
2993
2994 /* Exit OTP access mode */
2995 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2996 this->wait(mtd, FL_RESETING);
2997
2998 status = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
2999 status &= 0x60;
3000
3001 if (status == 0x60) {
3002 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
3003 printk(KERN_DEBUG "1st Block\tLOCKED\n");
3004 printk(KERN_DEBUG "OTP Block\tLOCKED\n");
3005 } else if (status == 0x20) {
3006 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
3007 printk(KERN_DEBUG "1st Block\tLOCKED\n");
3008 printk(KERN_DEBUG "OTP Block\tUN-LOCKED\n");
3009 } else if (status == 0x40) {
3010 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
3011 printk(KERN_DEBUG "1st Block\tUN-LOCKED\n");
3012 printk(KERN_DEBUG "OTP Block\tLOCKED\n");
3013 } else {
3014 printk(KERN_DEBUG "Reboot to check\n");
3015 }
3016
3017 written += thislen;
3018 if (written == len)
3019 break;
3020
3021 to += mtd->writesize;
3022 buf += thislen;
3023 column = 0;
3024 }
3025
3026 ops->oobretlen = written;
3027
3028 return ret;
3029 }
3030
3031 /* Internal OTP operation */
3032 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
3033 size_t *retlen, u_char *buf);
3034
3035 /**
3036 * do_otp_read - [DEFAULT] Read OTP block area
3037 * @param mtd MTD device structure
3038 * @param from The offset to read
3039 * @param len number of bytes to read
3040 * @param retlen pointer to variable to store the number of readbytes
3041 * @param buf the databuffer to put/get data
3042 *
3043 * Read OTP block area.
3044 */
3045 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
3046 size_t *retlen, u_char *buf)
3047 {
3048 struct onenand_chip *this = mtd->priv;
3049 struct mtd_oob_ops ops = {
3050 .len = len,
3051 .ooblen = 0,
3052 .datbuf = buf,
3053 .oobbuf = NULL,
3054 };
3055 int ret;
3056
3057 /* Enter OTP access mode */
3058 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
3059 this->wait(mtd, FL_OTPING);
3060
3061 ret = ONENAND_IS_4KB_PAGE(this) ?
3062 onenand_mlc_read_ops_nolock(mtd, from, &ops) :
3063 onenand_read_ops_nolock(mtd, from, &ops);
3064
3065 /* Exit OTP access mode */
3066 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3067 this->wait(mtd, FL_RESETING);
3068
3069 return ret;
3070 }
3071
3072 /**
3073 * do_otp_write - [DEFAULT] Write OTP block area
3074 * @param mtd MTD device structure
3075 * @param to The offset to write
3076 * @param len number of bytes to write
3077 * @param retlen pointer to variable to store the number of write bytes
3078 * @param buf the databuffer to put/get data
3079 *
3080 * Write OTP block area.
3081 */
3082 static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
3083 size_t *retlen, u_char *buf)
3084 {
3085 struct onenand_chip *this = mtd->priv;
3086 unsigned char *pbuf = buf;
3087 int ret;
3088 struct mtd_oob_ops ops;
3089
3090 /* Force buffer page aligned */
3091 if (len < mtd->writesize) {
3092 memcpy(this->page_buf, buf, len);
3093 memset(this->page_buf + len, 0xff, mtd->writesize - len);
3094 pbuf = this->page_buf;
3095 len = mtd->writesize;
3096 }
3097
3098 /* Enter OTP access mode */
3099 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
3100 this->wait(mtd, FL_OTPING);
3101
3102 ops.len = len;
3103 ops.ooblen = 0;
3104 ops.datbuf = pbuf;
3105 ops.oobbuf = NULL;
3106 ret = onenand_write_ops_nolock(mtd, to, &ops);
3107 *retlen = ops.retlen;
3108
3109 /* Exit OTP access mode */
3110 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3111 this->wait(mtd, FL_RESETING);
3112
3113 return ret;
3114 }
3115
3116 /**
3117 * do_otp_lock - [DEFAULT] Lock OTP block area
3118 * @param mtd MTD device structure
3119 * @param from The offset to lock
3120 * @param len number of bytes to lock
3121 * @param retlen pointer to variable to store the number of lock bytes
3122 * @param buf the databuffer to put/get data
3123 *
3124 * Lock OTP block area.
3125 */
3126 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
3127 size_t *retlen, u_char *buf)
3128 {
3129 struct onenand_chip *this = mtd->priv;
3130 struct mtd_oob_ops ops;
3131 int ret;
3132
3133 if (FLEXONENAND(this)) {
3134
3135 /* Enter OTP access mode */
3136 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
3137 this->wait(mtd, FL_OTPING);
3138 /*
3139 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
3140 * main area of page 49.
3141 */
3142 ops.len = mtd->writesize;
3143 ops.ooblen = 0;
3144 ops.datbuf = buf;
3145 ops.oobbuf = NULL;
3146 ret = onenand_write_ops_nolock(mtd, mtd->writesize * 49, &ops);
3147 *retlen = ops.retlen;
3148
3149 /* Exit OTP access mode */
3150 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3151 this->wait(mtd, FL_RESETING);
3152 } else {
3153 ops.mode = MTD_OPS_PLACE_OOB;
3154 ops.ooblen = len;
3155 ops.oobbuf = buf;
3156 ops.ooboffs = 0;
3157 ret = onenand_otp_write_oob_nolock(mtd, from, &ops);
3158 *retlen = ops.oobretlen;
3159 }
3160
3161 return ret;
3162 }
3163
3164 /**
3165 * onenand_otp_walk - [DEFAULT] Handle OTP operation
3166 * @param mtd MTD device structure
3167 * @param from The offset to read/write
3168 * @param len number of bytes to read/write
3169 * @param retlen pointer to variable to store the number of read bytes
3170 * @param buf the databuffer to put/get data
3171 * @param action do given action
3172 * @param mode specify user and factory
3173 *
3174 * Handle OTP operation.
3175 */
3176 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
3177 size_t *retlen, u_char *buf,
3178 otp_op_t action, int mode)
3179 {
3180 struct onenand_chip *this = mtd->priv;
3181 int otp_pages;
3182 int density;
3183 int ret = 0;
3184
3185 *retlen = 0;
3186
3187 density = onenand_get_density(this->device_id);
3188 if (density < ONENAND_DEVICE_DENSITY_512Mb)
3189 otp_pages = 20;
3190 else
3191 otp_pages = 50;
3192
3193 if (mode == MTD_OTP_FACTORY) {
3194 from += mtd->writesize * otp_pages;
3195 otp_pages = ONENAND_PAGES_PER_BLOCK - otp_pages;
3196 }
3197
3198 /* Check User/Factory boundary */
3199 if (mode == MTD_OTP_USER) {
3200 if (mtd->writesize * otp_pages < from + len)
3201 return 0;
3202 } else {
3203 if (mtd->writesize * otp_pages < len)
3204 return 0;
3205 }
3206
3207 onenand_get_device(mtd, FL_OTPING);
3208 while (len > 0 && otp_pages > 0) {
3209 if (!action) { /* OTP Info functions */
3210 struct otp_info *otpinfo;
3211
3212 len -= sizeof(struct otp_info);
3213 if (len <= 0) {
3214 ret = -ENOSPC;
3215 break;
3216 }
3217
3218 otpinfo = (struct otp_info *) buf;
3219 otpinfo->start = from;
3220 otpinfo->length = mtd->writesize;
3221 otpinfo->locked = 0;
3222
3223 from += mtd->writesize;
3224 buf += sizeof(struct otp_info);
3225 *retlen += sizeof(struct otp_info);
3226 } else {
3227 size_t tmp_retlen;
3228
3229 ret = action(mtd, from, len, &tmp_retlen, buf);
3230
3231 buf += tmp_retlen;
3232 len -= tmp_retlen;
3233 *retlen += tmp_retlen;
3234
3235 if (ret)
3236 break;
3237 }
3238 otp_pages--;
3239 }
3240 onenand_release_device(mtd);
3241
3242 return ret;
3243 }
3244
3245 /**
3246 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
3247 * @param mtd MTD device structure
3248 * @param buf the databuffer to put/get data
3249 * @param len number of bytes to read
3250 *
3251 * Read factory OTP info.
3252 */
3253 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
3254 struct otp_info *buf, size_t len)
3255 {
3256 size_t retlen;
3257 int ret;
3258
3259 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
3260
3261 return ret ? : retlen;
3262 }
3263
3264 /**
3265 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
3266 * @param mtd MTD device structure
3267 * @param from The offset to read
3268 * @param len number of bytes to read
3269 * @param retlen pointer to variable to store the number of read bytes
3270 * @param buf the databuffer to put/get data
3271 *
3272 * Read factory OTP area.
3273 */
3274 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
3275 size_t len, size_t *retlen, u_char *buf)
3276 {
3277 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
3278 }
3279
3280 /**
3281 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
3282 * @param mtd MTD device structure
3283 * @param buf the databuffer to put/get data
3284 * @param len number of bytes to read
3285 *
3286 * Read user OTP info.
3287 */
3288 static int onenand_get_user_prot_info(struct mtd_info *mtd,
3289 struct otp_info *buf, size_t len)
3290 {
3291 size_t retlen;
3292 int ret;
3293
3294 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
3295
3296 return ret ? : retlen;
3297 }
3298
3299 /**
3300 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
3301 * @param mtd MTD device structure
3302 * @param from The offset to read
3303 * @param len number of bytes to read
3304 * @param retlen pointer to variable to store the number of read bytes
3305 * @param buf the databuffer to put/get data
3306 *
3307 * Read user OTP area.
3308 */
3309 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
3310 size_t len, size_t *retlen, u_char *buf)
3311 {
3312 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
3313 }
3314
3315 /**
3316 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
3317 * @param mtd MTD device structure
3318 * @param from The offset to write
3319 * @param len number of bytes to write
3320 * @param retlen pointer to variable to store the number of write bytes
3321 * @param buf the databuffer to put/get data
3322 *
3323 * Write user OTP area.
3324 */
3325 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
3326 size_t len, size_t *retlen, u_char *buf)
3327 {
3328 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
3329 }
3330
3331 /**
3332 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
3333 * @param mtd MTD device structure
3334 * @param from The offset to lock
3335 * @param len number of bytes to unlock
3336 *
3337 * Write lock mark on spare area in page 0 in OTP block
3338 */
3339 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
3340 size_t len)
3341 {
3342 struct onenand_chip *this = mtd->priv;
3343 u_char *buf = FLEXONENAND(this) ? this->page_buf : this->oob_buf;
3344 size_t retlen;
3345 int ret;
3346 unsigned int otp_lock_offset = ONENAND_OTP_LOCK_OFFSET;
3347
3348 memset(buf, 0xff, FLEXONENAND(this) ? this->writesize
3349 : mtd->oobsize);
3350 /*
3351 * Write lock mark to 8th word of sector0 of page0 of the spare0.
3352 * We write 16 bytes spare area instead of 2 bytes.
3353 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
3354 * main area of page 49.
3355 */
3356
3357 from = 0;
3358 len = FLEXONENAND(this) ? mtd->writesize : 16;
3359
3360 /*
3361 * Note: OTP lock operation
3362 * OTP block : 0xXXFC XX 1111 1100
3363 * 1st block : 0xXXF3 (If chip support) XX 1111 0011
3364 * Both : 0xXXF0 (If chip support) XX 1111 0000
3365 */
3366 if (FLEXONENAND(this))
3367 otp_lock_offset = FLEXONENAND_OTP_LOCK_OFFSET;
3368
3369 /* ONENAND_OTP_AREA | ONENAND_OTP_BLOCK0 | ONENAND_OTP_AREA_BLOCK0 */
3370 if (otp == 1)
3371 buf[otp_lock_offset] = 0xFC;
3372 else if (otp == 2)
3373 buf[otp_lock_offset] = 0xF3;
3374 else if (otp == 3)
3375 buf[otp_lock_offset] = 0xF0;
3376 else if (otp != 0)
3377 printk(KERN_DEBUG "[OneNAND] Invalid option selected for OTP\n");
3378
3379 ret = onenand_otp_walk(mtd, from, len, &retlen, buf, do_otp_lock, MTD_OTP_USER);
3380
3381 return ret ? : retlen;
3382 }
3383
3384 #endif /* CONFIG_MTD_ONENAND_OTP */
3385
3386 /**
3387 * onenand_check_features - Check and set OneNAND features
3388 * @param mtd MTD data structure
3389 *
3390 * Check and set OneNAND features
3391 * - lock scheme
3392 * - two plane
3393 */
3394 static void onenand_check_features(struct mtd_info *mtd)
3395 {
3396 struct onenand_chip *this = mtd->priv;
3397 unsigned int density, process, numbufs;
3398
3399 /* Lock scheme depends on density and process */
3400 density = onenand_get_density(this->device_id);
3401 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
3402 numbufs = this->read_word(this->base + ONENAND_REG_NUM_BUFFERS) >> 8;
3403
3404 /* Lock scheme */
3405 switch (density) {
3406 case ONENAND_DEVICE_DENSITY_4Gb:
3407 if (ONENAND_IS_DDP(this))
3408 this->options |= ONENAND_HAS_2PLANE;
3409 else if (numbufs == 1) {
3410 this->options |= ONENAND_HAS_4KB_PAGE;
3411 this->options |= ONENAND_HAS_CACHE_PROGRAM;
3412 /*
3413 * There are two different 4KiB pagesize chips
3414 * and no way to detect it by H/W config values.
3415 *
3416 * To detect the correct NOP for each chips,
3417 * It should check the version ID as workaround.
3418 *
3419 * Now it has as following
3420 * KFM4G16Q4M has NOP 4 with version ID 0x0131
3421 * KFM4G16Q5M has NOP 1 with versoin ID 0x013e
3422 */
3423 if ((this->version_id & 0xf) == 0xe)
3424 this->options |= ONENAND_HAS_NOP_1;
3425 }
3426
3427 case ONENAND_DEVICE_DENSITY_2Gb:
3428 /* 2Gb DDP does not have 2 plane */
3429 if (!ONENAND_IS_DDP(this))
3430 this->options |= ONENAND_HAS_2PLANE;
3431 this->options |= ONENAND_HAS_UNLOCK_ALL;
3432
3433 case ONENAND_DEVICE_DENSITY_1Gb:
3434 /* A-Die has all block unlock */
3435 if (process)
3436 this->options |= ONENAND_HAS_UNLOCK_ALL;
3437 break;
3438
3439 default:
3440 /* Some OneNAND has continuous lock scheme */
3441 if (!process)
3442 this->options |= ONENAND_HAS_CONT_LOCK;
3443 break;
3444 }
3445
3446 /* The MLC has 4KiB pagesize. */
3447 if (ONENAND_IS_MLC(this))
3448 this->options |= ONENAND_HAS_4KB_PAGE;
3449
3450 if (ONENAND_IS_4KB_PAGE(this))
3451 this->options &= ~ONENAND_HAS_2PLANE;
3452
3453 if (FLEXONENAND(this)) {
3454 this->options &= ~ONENAND_HAS_CONT_LOCK;
3455 this->options |= ONENAND_HAS_UNLOCK_ALL;
3456 }
3457
3458 if (this->options & ONENAND_HAS_CONT_LOCK)
3459 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
3460 if (this->options & ONENAND_HAS_UNLOCK_ALL)
3461 printk(KERN_DEBUG "Chip support all block unlock\n");
3462 if (this->options & ONENAND_HAS_2PLANE)
3463 printk(KERN_DEBUG "Chip has 2 plane\n");
3464 if (this->options & ONENAND_HAS_4KB_PAGE)
3465 printk(KERN_DEBUG "Chip has 4KiB pagesize\n");
3466 if (this->options & ONENAND_HAS_CACHE_PROGRAM)
3467 printk(KERN_DEBUG "Chip has cache program feature\n");
3468 }
3469
3470 /**
3471 * onenand_print_device_info - Print device & version ID
3472 * @param device device ID
3473 * @param version version ID
3474 *
3475 * Print device & version ID
3476 */
3477 static void onenand_print_device_info(int device, int version)
3478 {
3479 int vcc, demuxed, ddp, density, flexonenand;
3480
3481 vcc = device & ONENAND_DEVICE_VCC_MASK;
3482 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
3483 ddp = device & ONENAND_DEVICE_IS_DDP;
3484 density = onenand_get_density(device);
3485 flexonenand = device & DEVICE_IS_FLEXONENAND;
3486 printk(KERN_INFO "%s%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
3487 demuxed ? "" : "Muxed ",
3488 flexonenand ? "Flex-" : "",
3489 ddp ? "(DDP)" : "",
3490 (16 << density),
3491 vcc ? "2.65/3.3" : "1.8",
3492 device);
3493 printk(KERN_INFO "OneNAND version = 0x%04x\n", version);
3494 }
3495
3496 static const struct onenand_manufacturers onenand_manuf_ids[] = {
3497 {ONENAND_MFR_SAMSUNG, "Samsung"},
3498 {ONENAND_MFR_NUMONYX, "Numonyx"},
3499 };
3500
3501 /**
3502 * onenand_check_maf - Check manufacturer ID
3503 * @param manuf manufacturer ID
3504 *
3505 * Check manufacturer ID
3506 */
3507 static int onenand_check_maf(int manuf)
3508 {
3509 int size = ARRAY_SIZE(onenand_manuf_ids);
3510 char *name;
3511 int i;
3512
3513 for (i = 0; i < size; i++)
3514 if (manuf == onenand_manuf_ids[i].id)
3515 break;
3516
3517 if (i < size)
3518 name = onenand_manuf_ids[i].name;
3519 else
3520 name = "Unknown";
3521
3522 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
3523
3524 return (i == size);
3525 }
3526
3527 /**
3528 * flexonenand_get_boundary - Reads the SLC boundary
3529 * @param onenand_info - onenand info structure
3530 **/
3531 static int flexonenand_get_boundary(struct mtd_info *mtd)
3532 {
3533 struct onenand_chip *this = mtd->priv;
3534 unsigned die, bdry;
3535 int ret, syscfg, locked;
3536
3537 /* Disable ECC */
3538 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
3539 this->write_word((syscfg | 0x0100), this->base + ONENAND_REG_SYS_CFG1);
3540
3541 for (die = 0; die < this->dies; die++) {
3542 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
3543 this->wait(mtd, FL_SYNCING);
3544
3545 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
3546 ret = this->wait(mtd, FL_READING);
3547
3548 bdry = this->read_word(this->base + ONENAND_DATARAM);
3549 if ((bdry >> FLEXONENAND_PI_UNLOCK_SHIFT) == 3)
3550 locked = 0;
3551 else
3552 locked = 1;
3553 this->boundary[die] = bdry & FLEXONENAND_PI_MASK;
3554
3555 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3556 ret = this->wait(mtd, FL_RESETING);
3557
3558 printk(KERN_INFO "Die %d boundary: %d%s\n", die,
3559 this->boundary[die], locked ? "(Locked)" : "(Unlocked)");
3560 }
3561
3562 /* Enable ECC */
3563 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
3564 return 0;
3565 }
3566
3567 /**
3568 * flexonenand_get_size - Fill up fields in onenand_chip and mtd_info
3569 * boundary[], diesize[], mtd->size, mtd->erasesize
3570 * @param mtd - MTD device structure
3571 */
3572 static void flexonenand_get_size(struct mtd_info *mtd)
3573 {
3574 struct onenand_chip *this = mtd->priv;
3575 int die, i, eraseshift, density;
3576 int blksperdie, maxbdry;
3577 loff_t ofs;
3578
3579 density = onenand_get_density(this->device_id);
3580 blksperdie = ((loff_t)(16 << density) << 20) >> (this->erase_shift);
3581 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
3582 maxbdry = blksperdie - 1;
3583 eraseshift = this->erase_shift - 1;
3584
3585 mtd->numeraseregions = this->dies << 1;
3586
3587 /* This fills up the device boundary */
3588 flexonenand_get_boundary(mtd);
3589 die = ofs = 0;
3590 i = -1;
3591 for (; die < this->dies; die++) {
3592 if (!die || this->boundary[die-1] != maxbdry) {
3593 i++;
3594 mtd->eraseregions[i].offset = ofs;
3595 mtd->eraseregions[i].erasesize = 1 << eraseshift;
3596 mtd->eraseregions[i].numblocks =
3597 this->boundary[die] + 1;
3598 ofs += mtd->eraseregions[i].numblocks << eraseshift;
3599 eraseshift++;
3600 } else {
3601 mtd->numeraseregions -= 1;
3602 mtd->eraseregions[i].numblocks +=
3603 this->boundary[die] + 1;
3604 ofs += (this->boundary[die] + 1) << (eraseshift - 1);
3605 }
3606 if (this->boundary[die] != maxbdry) {
3607 i++;
3608 mtd->eraseregions[i].offset = ofs;
3609 mtd->eraseregions[i].erasesize = 1 << eraseshift;
3610 mtd->eraseregions[i].numblocks = maxbdry ^
3611 this->boundary[die];
3612 ofs += mtd->eraseregions[i].numblocks << eraseshift;
3613 eraseshift--;
3614 } else
3615 mtd->numeraseregions -= 1;
3616 }
3617
3618 /* Expose MLC erase size except when all blocks are SLC */
3619 mtd->erasesize = 1 << this->erase_shift;
3620 if (mtd->numeraseregions == 1)
3621 mtd->erasesize >>= 1;
3622
3623 printk(KERN_INFO "Device has %d eraseregions\n", mtd->numeraseregions);
3624 for (i = 0; i < mtd->numeraseregions; i++)
3625 printk(KERN_INFO "[offset: 0x%08x, erasesize: 0x%05x,"
3626 " numblocks: %04u]\n",
3627 (unsigned int) mtd->eraseregions[i].offset,
3628 mtd->eraseregions[i].erasesize,
3629 mtd->eraseregions[i].numblocks);
3630
3631 for (die = 0, mtd->size = 0; die < this->dies; die++) {
3632 this->diesize[die] = (loff_t)blksperdie << this->erase_shift;
3633 this->diesize[die] -= (loff_t)(this->boundary[die] + 1)
3634 << (this->erase_shift - 1);
3635 mtd->size += this->diesize[die];
3636 }
3637 }
3638
3639 /**
3640 * flexonenand_check_blocks_erased - Check if blocks are erased
3641 * @param mtd_info - mtd info structure
3642 * @param start - first erase block to check
3643 * @param end - last erase block to check
3644 *
3645 * Converting an unerased block from MLC to SLC
3646 * causes byte values to change. Since both data and its ECC
3647 * have changed, reads on the block give uncorrectable error.
3648 * This might lead to the block being detected as bad.
3649 *
3650 * Avoid this by ensuring that the block to be converted is
3651 * erased.
3652 */
3653 static int flexonenand_check_blocks_erased(struct mtd_info *mtd, int start, int end)
3654 {
3655 struct onenand_chip *this = mtd->priv;
3656 int i, ret;
3657 int block;
3658 struct mtd_oob_ops ops = {
3659 .mode = MTD_OPS_PLACE_OOB,
3660 .ooboffs = 0,
3661 .ooblen = mtd->oobsize,
3662 .datbuf = NULL,
3663 .oobbuf = this->oob_buf,
3664 };
3665 loff_t addr;
3666
3667 printk(KERN_DEBUG "Check blocks from %d to %d\n", start, end);
3668
3669 for (block = start; block <= end; block++) {
3670 addr = flexonenand_addr(this, block);
3671 if (onenand_block_isbad_nolock(mtd, addr, 0))
3672 continue;
3673
3674 /*
3675 * Since main area write results in ECC write to spare,
3676 * it is sufficient to check only ECC bytes for change.
3677 */
3678 ret = onenand_read_oob_nolock(mtd, addr, &ops);
3679 if (ret)
3680 return ret;
3681
3682 for (i = 0; i < mtd->oobsize; i++)
3683 if (this->oob_buf[i] != 0xff)
3684 break;
3685
3686 if (i != mtd->oobsize) {
3687 printk(KERN_WARNING "%s: Block %d not erased.\n",
3688 __func__, block);
3689 return 1;
3690 }
3691 }
3692
3693 return 0;
3694 }
3695
3696 /**
3697 * flexonenand_set_boundary - Writes the SLC boundary
3698 * @param mtd - mtd info structure
3699 */
3700 int flexonenand_set_boundary(struct mtd_info *mtd, int die,
3701 int boundary, int lock)
3702 {
3703 struct onenand_chip *this = mtd->priv;
3704 int ret, density, blksperdie, old, new, thisboundary;
3705 loff_t addr;
3706
3707 /* Change only once for SDP Flex-OneNAND */
3708 if (die && (!ONENAND_IS_DDP(this)))
3709 return 0;
3710
3711 /* boundary value of -1 indicates no required change */
3712 if (boundary < 0 || boundary == this->boundary[die])
3713 return 0;
3714
3715 density = onenand_get_density(this->device_id);
3716 blksperdie = ((16 << density) << 20) >> this->erase_shift;
3717 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
3718
3719 if (boundary >= blksperdie) {
3720 printk(KERN_ERR "%s: Invalid boundary value. "
3721 "Boundary not changed.\n", __func__);
3722 return -EINVAL;
3723 }
3724
3725 /* Check if converting blocks are erased */
3726 old = this->boundary[die] + (die * this->density_mask);
3727 new = boundary + (die * this->density_mask);
3728 ret = flexonenand_check_blocks_erased(mtd, min(old, new) + 1, max(old, new));
3729 if (ret) {
3730 printk(KERN_ERR "%s: Please erase blocks "
3731 "before boundary change\n", __func__);
3732 return ret;
3733 }
3734
3735 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
3736 this->wait(mtd, FL_SYNCING);
3737
3738 /* Check is boundary is locked */
3739 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
3740 ret = this->wait(mtd, FL_READING);
3741
3742 thisboundary = this->read_word(this->base + ONENAND_DATARAM);
3743 if ((thisboundary >> FLEXONENAND_PI_UNLOCK_SHIFT) != 3) {
3744 printk(KERN_ERR "%s: boundary locked\n", __func__);
3745 ret = 1;
3746 goto out;
3747 }
3748
3749 printk(KERN_INFO "Changing die %d boundary: %d%s\n",
3750 die, boundary, lock ? "(Locked)" : "(Unlocked)");
3751
3752 addr = die ? this->diesize[0] : 0;
3753
3754 boundary &= FLEXONENAND_PI_MASK;
3755 boundary |= lock ? 0 : (3 << FLEXONENAND_PI_UNLOCK_SHIFT);
3756
3757 this->command(mtd, ONENAND_CMD_ERASE, addr, 0);
3758 ret = this->wait(mtd, FL_ERASING);
3759 if (ret) {
3760 printk(KERN_ERR "%s: Failed PI erase for Die %d\n",
3761 __func__, die);
3762 goto out;
3763 }
3764
3765 this->write_word(boundary, this->base + ONENAND_DATARAM);
3766 this->command(mtd, ONENAND_CMD_PROG, addr, 0);
3767 ret = this->wait(mtd, FL_WRITING);
3768 if (ret) {
3769 printk(KERN_ERR "%s: Failed PI write for Die %d\n",
3770 __func__, die);
3771 goto out;
3772 }
3773
3774 this->command(mtd, FLEXONENAND_CMD_PI_UPDATE, die, 0);
3775 ret = this->wait(mtd, FL_WRITING);
3776 out:
3777 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_REG_COMMAND);
3778 this->wait(mtd, FL_RESETING);
3779 if (!ret)
3780 /* Recalculate device size on boundary change*/
3781 flexonenand_get_size(mtd);
3782
3783 return ret;
3784 }
3785
3786 /**
3787 * onenand_chip_probe - [OneNAND Interface] The generic chip probe
3788 * @param mtd MTD device structure
3789 *
3790 * OneNAND detection method:
3791 * Compare the values from command with ones from register
3792 */
3793 static int onenand_chip_probe(struct mtd_info *mtd)
3794 {
3795 struct onenand_chip *this = mtd->priv;
3796 int bram_maf_id, bram_dev_id, maf_id, dev_id;
3797 int syscfg;
3798
3799 /* Save system configuration 1 */
3800 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
3801 /* Clear Sync. Burst Read mode to read BootRAM */
3802 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE), this->base + ONENAND_REG_SYS_CFG1);
3803
3804 /* Send the command for reading device ID from BootRAM */
3805 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
3806
3807 /* Read manufacturer and device IDs from BootRAM */
3808 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
3809 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
3810
3811 /* Reset OneNAND to read default register values */
3812 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
3813 /* Wait reset */
3814 this->wait(mtd, FL_RESETING);
3815
3816 /* Restore system configuration 1 */
3817 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
3818
3819 /* Check manufacturer ID */
3820 if (onenand_check_maf(bram_maf_id))
3821 return -ENXIO;
3822
3823 /* Read manufacturer and device IDs from Register */
3824 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
3825 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
3826
3827 /* Check OneNAND device */
3828 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
3829 return -ENXIO;
3830
3831 return 0;
3832 }
3833
3834 /**
3835 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
3836 * @param mtd MTD device structure
3837 */
3838 static int onenand_probe(struct mtd_info *mtd)
3839 {
3840 struct onenand_chip *this = mtd->priv;
3841 int maf_id, dev_id, ver_id;
3842 int density;
3843 int ret;
3844
3845 ret = this->chip_probe(mtd);
3846 if (ret)
3847 return ret;
3848
3849 /* Read manufacturer and device IDs from Register */
3850 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
3851 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
3852 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
3853 this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY);
3854
3855 /* Flash device information */
3856 onenand_print_device_info(dev_id, ver_id);
3857 this->device_id = dev_id;
3858 this->version_id = ver_id;
3859
3860 /* Check OneNAND features */
3861 onenand_check_features(mtd);
3862
3863 density = onenand_get_density(dev_id);
3864 if (FLEXONENAND(this)) {
3865 this->dies = ONENAND_IS_DDP(this) ? 2 : 1;
3866 /* Maximum possible erase regions */
3867 mtd->numeraseregions = this->dies << 1;
3868 mtd->eraseregions = kzalloc(sizeof(struct mtd_erase_region_info)
3869 * (this->dies << 1), GFP_KERNEL);
3870 if (!mtd->eraseregions)
3871 return -ENOMEM;
3872 }
3873
3874 /*
3875 * For Flex-OneNAND, chipsize represents maximum possible device size.
3876 * mtd->size represents the actual device size.
3877 */
3878 this->chipsize = (16 << density) << 20;
3879
3880 /* OneNAND page size & block size */
3881 /* The data buffer size is equal to page size */
3882 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
3883 /* We use the full BufferRAM */
3884 if (ONENAND_IS_4KB_PAGE(this))
3885 mtd->writesize <<= 1;
3886
3887 mtd->oobsize = mtd->writesize >> 5;
3888 /* Pages per a block are always 64 in OneNAND */
3889 mtd->erasesize = mtd->writesize << 6;
3890 /*
3891 * Flex-OneNAND SLC area has 64 pages per block.
3892 * Flex-OneNAND MLC area has 128 pages per block.
3893 * Expose MLC erase size to find erase_shift and page_mask.
3894 */
3895 if (FLEXONENAND(this))
3896 mtd->erasesize <<= 1;
3897
3898 this->erase_shift = ffs(mtd->erasesize) - 1;
3899 this->page_shift = ffs(mtd->writesize) - 1;
3900 this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
3901 /* Set density mask. it is used for DDP */
3902 if (ONENAND_IS_DDP(this))
3903 this->density_mask = this->chipsize >> (this->erase_shift + 1);
3904 /* It's real page size */
3905 this->writesize = mtd->writesize;
3906
3907 /* REVISIT: Multichip handling */
3908
3909 if (FLEXONENAND(this))
3910 flexonenand_get_size(mtd);
3911 else
3912 mtd->size = this->chipsize;
3913
3914 /*
3915 * We emulate the 4KiB page and 256KiB erase block size
3916 * But oobsize is still 64 bytes.
3917 * It is only valid if you turn on 2X program support,
3918 * Otherwise it will be ignored by compiler.
3919 */
3920 if (ONENAND_IS_2PLANE(this)) {
3921 mtd->writesize <<= 1;
3922 mtd->erasesize <<= 1;
3923 }
3924
3925 return 0;
3926 }
3927
3928 /**
3929 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
3930 * @param mtd MTD device structure
3931 */
3932 static int onenand_suspend(struct mtd_info *mtd)
3933 {
3934 return onenand_get_device(mtd, FL_PM_SUSPENDED);
3935 }
3936
3937 /**
3938 * onenand_resume - [MTD Interface] Resume the OneNAND flash
3939 * @param mtd MTD device structure
3940 */
3941 static void onenand_resume(struct mtd_info *mtd)
3942 {
3943 struct onenand_chip *this = mtd->priv;
3944
3945 if (this->state == FL_PM_SUSPENDED)
3946 onenand_release_device(mtd);
3947 else
3948 printk(KERN_ERR "%s: resume() called for the chip which is not "
3949 "in suspended state\n", __func__);
3950 }
3951
3952 /**
3953 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
3954 * @param mtd MTD device structure
3955 * @param maxchips Number of chips to scan for
3956 *
3957 * This fills out all the not initialized function pointers
3958 * with the defaults.
3959 * The flash ID is read and the mtd/chip structures are
3960 * filled with the appropriate values.
3961 */
3962 int onenand_scan(struct mtd_info *mtd, int maxchips)
3963 {
3964 int i, ret;
3965 struct onenand_chip *this = mtd->priv;
3966
3967 if (!this->read_word)
3968 this->read_word = onenand_readw;
3969 if (!this->write_word)
3970 this->write_word = onenand_writew;
3971
3972 if (!this->command)
3973 this->command = onenand_command;
3974 if (!this->wait)
3975 onenand_setup_wait(mtd);
3976 if (!this->bbt_wait)
3977 this->bbt_wait = onenand_bbt_wait;
3978 if (!this->unlock_all)
3979 this->unlock_all = onenand_unlock_all;
3980
3981 if (!this->chip_probe)
3982 this->chip_probe = onenand_chip_probe;
3983
3984 if (!this->read_bufferram)
3985 this->read_bufferram = onenand_read_bufferram;
3986 if (!this->write_bufferram)
3987 this->write_bufferram = onenand_write_bufferram;
3988
3989 if (!this->block_markbad)
3990 this->block_markbad = onenand_default_block_markbad;
3991 if (!this->scan_bbt)
3992 this->scan_bbt = onenand_default_bbt;
3993
3994 if (onenand_probe(mtd))
3995 return -ENXIO;
3996
3997 /* Set Sync. Burst Read after probing */
3998 if (this->mmcontrol) {
3999 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
4000 this->read_bufferram = onenand_sync_read_bufferram;
4001 }
4002
4003 /* Allocate buffers, if necessary */
4004 if (!this->page_buf) {
4005 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
4006 if (!this->page_buf) {
4007 printk(KERN_ERR "%s: Can't allocate page_buf\n",
4008 __func__);
4009 return -ENOMEM;
4010 }
4011 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
4012 this->verify_buf = kzalloc(mtd->writesize, GFP_KERNEL);
4013 if (!this->verify_buf) {
4014 kfree(this->page_buf);
4015 return -ENOMEM;
4016 }
4017 #endif
4018 this->options |= ONENAND_PAGEBUF_ALLOC;
4019 }
4020 if (!this->oob_buf) {
4021 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
4022 if (!this->oob_buf) {
4023 printk(KERN_ERR "%s: Can't allocate oob_buf\n",
4024 __func__);
4025 if (this->options & ONENAND_PAGEBUF_ALLOC) {
4026 this->options &= ~ONENAND_PAGEBUF_ALLOC;
4027 kfree(this->page_buf);
4028 }
4029 return -ENOMEM;
4030 }
4031 this->options |= ONENAND_OOBBUF_ALLOC;
4032 }
4033
4034 this->state = FL_READY;
4035 init_waitqueue_head(&this->wq);
4036 spin_lock_init(&this->chip_lock);
4037
4038 /*
4039 * Allow subpage writes up to oobsize.
4040 */
4041 switch (mtd->oobsize) {
4042 case 128:
4043 if (FLEXONENAND(this)) {
4044 this->ecclayout = &flexonenand_oob_128;
4045 mtd->subpage_sft = 0;
4046 } else {
4047 this->ecclayout = &onenand_oob_128;
4048 mtd->subpage_sft = 2;
4049 }
4050 if (ONENAND_IS_NOP_1(this))
4051 mtd->subpage_sft = 0;
4052 break;
4053 case 64:
4054 this->ecclayout = &onenand_oob_64;
4055 mtd->subpage_sft = 2;
4056 break;
4057
4058 case 32:
4059 this->ecclayout = &onenand_oob_32;
4060 mtd->subpage_sft = 1;
4061 break;
4062
4063 default:
4064 printk(KERN_WARNING "%s: No OOB scheme defined for oobsize %d\n",
4065 __func__, mtd->oobsize);
4066 mtd->subpage_sft = 0;
4067 /* To prevent kernel oops */
4068 this->ecclayout = &onenand_oob_32;
4069 break;
4070 }
4071
4072 this->subpagesize = mtd->writesize >> mtd->subpage_sft;
4073
4074 /*
4075 * The number of bytes available for a client to place data into
4076 * the out of band area
4077 */
4078 this->ecclayout->oobavail = 0;
4079 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
4080 this->ecclayout->oobfree[i].length; i++)
4081 this->ecclayout->oobavail +=
4082 this->ecclayout->oobfree[i].length;
4083 mtd->oobavail = this->ecclayout->oobavail;
4084
4085 mtd->ecclayout = this->ecclayout;
4086
4087 /* Fill in remaining MTD driver data */
4088 mtd->type = ONENAND_IS_MLC(this) ? MTD_MLCNANDFLASH : MTD_NANDFLASH;
4089 mtd->flags = MTD_CAP_NANDFLASH;
4090 mtd->_erase = onenand_erase;
4091 mtd->_point = NULL;
4092 mtd->_unpoint = NULL;
4093 mtd->_read = onenand_read;
4094 mtd->_write = onenand_write;
4095 mtd->_read_oob = onenand_read_oob;
4096 mtd->_write_oob = onenand_write_oob;
4097 mtd->_panic_write = onenand_panic_write;
4098 #ifdef CONFIG_MTD_ONENAND_OTP
4099 mtd->_get_fact_prot_info = onenand_get_fact_prot_info;
4100 mtd->_read_fact_prot_reg = onenand_read_fact_prot_reg;
4101 mtd->_get_user_prot_info = onenand_get_user_prot_info;
4102 mtd->_read_user_prot_reg = onenand_read_user_prot_reg;
4103 mtd->_write_user_prot_reg = onenand_write_user_prot_reg;
4104 mtd->_lock_user_prot_reg = onenand_lock_user_prot_reg;
4105 #endif
4106 mtd->_sync = onenand_sync;
4107 mtd->_lock = onenand_lock;
4108 mtd->_unlock = onenand_unlock;
4109 mtd->_suspend = onenand_suspend;
4110 mtd->_resume = onenand_resume;
4111 mtd->_block_isbad = onenand_block_isbad;
4112 mtd->_block_markbad = onenand_block_markbad;
4113 mtd->owner = THIS_MODULE;
4114 mtd->writebufsize = mtd->writesize;
4115
4116 /* Unlock whole block */
4117 if (!(this->options & ONENAND_SKIP_INITIAL_UNLOCKING))
4118 this->unlock_all(mtd);
4119
4120 ret = this->scan_bbt(mtd);
4121 if ((!FLEXONENAND(this)) || ret)
4122 return ret;
4123
4124 /* Change Flex-OneNAND boundaries if required */
4125 for (i = 0; i < MAX_DIES; i++)
4126 flexonenand_set_boundary(mtd, i, flex_bdry[2 * i],
4127 flex_bdry[(2 * i) + 1]);
4128
4129 return 0;
4130 }
4131
4132 /**
4133 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
4134 * @param mtd MTD device structure
4135 */
4136 void onenand_release(struct mtd_info *mtd)
4137 {
4138 struct onenand_chip *this = mtd->priv;
4139
4140 /* Deregister partitions */
4141 mtd_device_unregister(mtd);
4142
4143 /* Free bad block table memory, if allocated */
4144 if (this->bbm) {
4145 struct bbm_info *bbm = this->bbm;
4146 kfree(bbm->bbt);
4147 kfree(this->bbm);
4148 }
4149 /* Buffers allocated by onenand_scan */
4150 if (this->options & ONENAND_PAGEBUF_ALLOC) {
4151 kfree(this->page_buf);
4152 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
4153 kfree(this->verify_buf);
4154 #endif
4155 }
4156 if (this->options & ONENAND_OOBBUF_ALLOC)
4157 kfree(this->oob_buf);
4158 kfree(mtd->eraseregions);
4159 }
4160
4161 EXPORT_SYMBOL_GPL(onenand_scan);
4162 EXPORT_SYMBOL_GPL(onenand_release);
4163
4164 MODULE_LICENSE("GPL");
4165 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
4166 MODULE_DESCRIPTION("Generic OneNAND flash driver code");
Linux with added FPC-III support