2 * Device Tree Source for AM33XX SoC
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/bus/ti-sysc.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/pinctrl/am33xx.h>
14 #include <dt-bindings/clock/am3.h>
17 compatible = "ti,am33xx";
18 interrupt-parent = <&intc>;
39 ethernet0 = &cpsw_emac0;
40 ethernet1 = &cpsw_emac1;
49 compatible = "arm,cortex-a8";
53 operating-points-v2 = <&cpu0_opp_table>;
55 clocks = <&dpll_mpu_ck>;
58 clock-latency = <300000>; /* From omap-cpufreq driver */
62 cpu0_opp_table: opp-table {
63 compatible = "operating-points-v2-ti-cpu";
67 * The three following nodes are marked with opp-suspend
68 * because the can not be enabled simultaneously on a
72 opp-hz = /bits/ 64 <300000000>;
73 opp-microvolt = <950000 931000 969000>;
74 opp-supported-hw = <0x06 0x0010>;
79 opp-hz = /bits/ 64 <275000000>;
80 opp-microvolt = <1100000 1078000 1122000>;
81 opp-supported-hw = <0x01 0x00FF>;
86 opp-hz = /bits/ 64 <300000000>;
87 opp-microvolt = <1100000 1078000 1122000>;
88 opp-supported-hw = <0x06 0x0020>;
93 opp-hz = /bits/ 64 <500000000>;
94 opp-microvolt = <1100000 1078000 1122000>;
95 opp-supported-hw = <0x01 0xFFFF>;
99 opp-hz = /bits/ 64 <600000000>;
100 opp-microvolt = <1100000 1078000 1122000>;
101 opp-supported-hw = <0x06 0x0040>;
105 opp-hz = /bits/ 64 <600000000>;
106 opp-microvolt = <1200000 1176000 1224000>;
107 opp-supported-hw = <0x01 0xFFFF>;
111 opp-hz = /bits/ 64 <720000000>;
112 opp-microvolt = <1200000 1176000 1224000>;
113 opp-supported-hw = <0x06 0x0080>;
117 opp-hz = /bits/ 64 <720000000>;
118 opp-microvolt = <1260000 1234800 1285200>;
119 opp-supported-hw = <0x01 0xFFFF>;
123 opp-hz = /bits/ 64 <800000000>;
124 opp-microvolt = <1260000 1234800 1285200>;
125 opp-supported-hw = <0x06 0x0100>;
128 oppnitro-1000000000 {
129 opp-hz = /bits/ 64 <1000000000>;
130 opp-microvolt = <1325000 1298500 1351500>;
131 opp-supported-hw = <0x04 0x0200>;
136 compatible = "arm,cortex-a8-pmu";
138 reg = <0x4b000000 0x1000000>;
139 ti,hwmods = "debugss";
143 * The soc node represents the soc top level view. It is used for IPs
144 * that are not memory mapped in the MPU view or for the MPU itself.
147 compatible = "ti,omap-infra";
149 compatible = "ti,omap3-mpu";
151 pm-sram = <&pm_sram_code
157 * XXX: Use a flat representation of the AM33XX interconnect.
158 * The real AM33XX interconnect network is quite complex. Since
159 * it will not bring real advantage to represent that in DT
160 * for the moment, just use a fake OCP bus entry to represent
161 * the whole bus hierarchy.
164 compatible = "simple-bus";
165 #address-cells = <1>;
168 ti,hwmods = "l3_main";
170 l4_wkup: interconnect@44c00000 {
171 wkup_m3: wkup_m3@100000 {
172 compatible = "ti,am3352-wkup-m3";
173 reg = <0x100000 0x4000>,
175 reg-names = "umem", "dmem";
176 ti,hwmods = "wkup_m3";
177 ti,pm-firmware = "am335x-pm-firmware.elf";
180 l4_per: interconnect@48000000 {
182 l4_fw: interconnect@47c00000 {
184 l4_fast: interconnect@4a000000 {
186 l4_mpuss: interconnect@4b140000 {
189 intc: interrupt-controller@48200000 {
190 compatible = "ti,am33xx-intc";
191 interrupt-controller;
192 #interrupt-cells = <1>;
193 reg = <0x48200000 0x1000>;
196 edma: edma@49000000 {
197 compatible = "ti,edma3-tpcc";
199 reg = <0x49000000 0x10000>;
200 reg-names = "edma3_cc";
201 interrupts = <12 13 14>;
202 interrupt-names = "edma3_ccint", "edma3_mperr",
207 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
210 ti,edma-memcpy-channels = <20 21>;
213 edma_tptc0: tptc@49800000 {
214 compatible = "ti,edma3-tptc";
216 reg = <0x49800000 0x100000>;
218 interrupt-names = "edma3_tcerrint";
221 edma_tptc1: tptc@49900000 {
222 compatible = "ti,edma3-tptc";
224 reg = <0x49900000 0x100000>;
226 interrupt-names = "edma3_tcerrint";
229 edma_tptc2: tptc@49a00000 {
230 compatible = "ti,edma3-tptc";
232 reg = <0x49a00000 0x100000>;
234 interrupt-names = "edma3_tcerrint";
238 compatible = "ti,omap4-hsmmc";
240 ti,needs-special-reset;
242 reg = <0x47810000 0x1000>;
247 compatible = "ti,am33xx-usb";
248 reg = <0x47400000 0x1000>;
250 #address-cells = <1>;
252 ti,hwmods = "usb_otg_hs";
255 usb_ctrl_mod: control@44e10620 {
256 compatible = "ti,am335x-usb-ctrl-module";
257 reg = <0x44e10620 0x10
259 reg-names = "phy_ctrl", "wakeup";
263 usb0_phy: usb-phy@47401300 {
264 compatible = "ti,am335x-usb-phy";
265 reg = <0x47401300 0x100>;
268 ti,ctrl_mod = <&usb_ctrl_mod>;
273 compatible = "ti,musb-am33xx";
275 reg = <0x47401400 0x400
277 reg-names = "mc", "control";
280 interrupt-names = "mc";
282 mentor,multipoint = <1>;
283 mentor,num-eps = <16>;
284 mentor,ram-bits = <12>;
285 mentor,power = <500>;
288 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
289 &cppi41dma 2 0 &cppi41dma 3 0
290 &cppi41dma 4 0 &cppi41dma 5 0
291 &cppi41dma 6 0 &cppi41dma 7 0
292 &cppi41dma 8 0 &cppi41dma 9 0
293 &cppi41dma 10 0 &cppi41dma 11 0
294 &cppi41dma 12 0 &cppi41dma 13 0
295 &cppi41dma 14 0 &cppi41dma 0 1
296 &cppi41dma 1 1 &cppi41dma 2 1
297 &cppi41dma 3 1 &cppi41dma 4 1
298 &cppi41dma 5 1 &cppi41dma 6 1
299 &cppi41dma 7 1 &cppi41dma 8 1
300 &cppi41dma 9 1 &cppi41dma 10 1
301 &cppi41dma 11 1 &cppi41dma 12 1
302 &cppi41dma 13 1 &cppi41dma 14 1>;
304 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
305 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
307 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
308 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
312 usb1_phy: usb-phy@47401b00 {
313 compatible = "ti,am335x-usb-phy";
314 reg = <0x47401b00 0x100>;
317 ti,ctrl_mod = <&usb_ctrl_mod>;
322 compatible = "ti,musb-am33xx";
324 reg = <0x47401c00 0x400
326 reg-names = "mc", "control";
328 interrupt-names = "mc";
330 mentor,multipoint = <1>;
331 mentor,num-eps = <16>;
332 mentor,ram-bits = <12>;
333 mentor,power = <500>;
336 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
337 &cppi41dma 17 0 &cppi41dma 18 0
338 &cppi41dma 19 0 &cppi41dma 20 0
339 &cppi41dma 21 0 &cppi41dma 22 0
340 &cppi41dma 23 0 &cppi41dma 24 0
341 &cppi41dma 25 0 &cppi41dma 26 0
342 &cppi41dma 27 0 &cppi41dma 28 0
343 &cppi41dma 29 0 &cppi41dma 15 1
344 &cppi41dma 16 1 &cppi41dma 17 1
345 &cppi41dma 18 1 &cppi41dma 19 1
346 &cppi41dma 20 1 &cppi41dma 21 1
347 &cppi41dma 22 1 &cppi41dma 23 1
348 &cppi41dma 24 1 &cppi41dma 25 1
349 &cppi41dma 26 1 &cppi41dma 27 1
350 &cppi41dma 28 1 &cppi41dma 29 1>;
352 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
353 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
355 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
356 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
360 cppi41dma: dma-controller@47402000 {
361 compatible = "ti,am3359-cppi41";
362 reg = <0x47400000 0x1000
366 reg-names = "glue", "controller", "scheduler", "queuemgr";
368 interrupt-names = "glue";
370 #dma-channels = <30>;
371 #dma-requests = <256>;
376 ocmcram: ocmcram@40300000 {
377 compatible = "mmio-sram";
378 reg = <0x40300000 0x10000>; /* 64k */
379 ranges = <0x0 0x40300000 0x10000>;
380 #address-cells = <1>;
383 pm_sram_code: pm-sram-code@0 {
384 compatible = "ti,sram";
389 pm_sram_data: pm-sram-data@1000 {
390 compatible = "ti,sram";
391 reg = <0x1000 0x1000>;
396 emif: emif@4c000000 {
397 compatible = "ti,emif-am3352";
398 reg = <0x4c000000 0x1000000>;
401 sram = <&pm_sram_code
406 gpmc: gpmc@50000000 {
407 compatible = "ti,am3352-gpmc";
410 reg = <0x50000000 0x2000>;
415 gpmc,num-waitpins = <2>;
416 #address-cells = <2>;
418 interrupt-controller;
419 #interrupt-cells = <2>;
425 sham: sham@53100000 {
426 compatible = "ti,omap4-sham";
428 reg = <0x53100000 0x200>;
435 compatible = "ti,omap4-aes";
437 reg = <0x53500000 0xa0>;
441 dma-names = "tx", "rx";
446 #include "am33xx-l4.dtsi"
447 #include "am33xx-clocks.dtsi"