arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /dts-v1/;
   3 #include "aspeed-g5.dtsi"
   4 #include <dt-bindings/gpio/aspeed-gpio.h>
   5
   6 / {
   7         model = "Zaius BMC";
   8         compatible = "ingrasys,zaius-bmc", "aspeed,ast2500";
   9
  10         aliases {
  11                 i2c15 = &i2cpcie0;
  12                 i2c16 = &i2cpcie1;
  13                 i2c17 = &i2cpcie2;
  14                 i2c19 = &i2cpcie3;
  15                 i2c20 = &i2cpcie4;
  16         };
  17
  18         chosen {
  19                 stdout-path = &uart5;
  20                 bootargs = "console=ttyS4,115200 earlyprintk";
  21         };
  22
  23         memory@80000000 {
  24                 reg = <0x80000000 0x40000000>;
  25         };
  26
  27         reserved-memory {
  28                 #address-cells = <1>;
  29                 #size-cells = <1>;
  30                 ranges;
  31
  32                 flash_memory: region@98000000 {
  33                         no-map;
  34                         reg = <0x98000000 0x04000000>; /* 64M */
  35                 };
  36         };
  37
  38         onewire0 {
  39                 compatible = "w1-gpio";
  40                 gpios = <&gpio ASPEED_GPIO(H, 0) GPIO_ACTIVE_HIGH>;
  41         };
  42
  43         onewire1 {
  44                 compatible = "w1-gpio";
  45                 gpios = <&gpio ASPEED_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
  46         };
  47
  48         onewire2 {
  49                 compatible = "w1-gpio";
  50                 gpios = <&gpio ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
  51         };
  52
  53         onewire3 {
  54                 compatible = "w1-gpio";
  55                 gpios = <&gpio ASPEED_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
  56         };
  57
  58         gpio-keys {
  59                 compatible = "gpio-keys";
  60
  61                 checkstop {
  62                         label = "checkstop";
  63                         gpios = <&gpio ASPEED_GPIO(F, 7) GPIO_ACTIVE_LOW>;
  64                         linux,code = <ASPEED_GPIO(F, 7)>;
  65                 };
  66
  67                 pcie-e2b-present{
  68                         label = "pcie-e2b-present";
  69                         gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_LOW>;
  70                         linux,code = <ASPEED_GPIO(E, 7)>;
  71                 };
  72         };
  73
  74         leds {
  75                 compatible = "gpio-leds";
  76
  77                 sys_boot_status {
  78                         label = "System boot status";
  79                         gpios = <&gpio ASPEED_GPIO(D, 5) GPIO_ACTIVE_LOW>;
  80                 };
  81
  82                 attention {
  83                         label = "Attention";
  84                         gpios = <&gpio ASPEED_GPIO(D, 6) GPIO_ACTIVE_LOW>;
  85                 };
  86
  87                 plt_fault {
  88                         label = "Platform fault";
  89                         gpios = <&gpio ASPEED_GPIO(D, 7) GPIO_ACTIVE_LOW>;
  90                 };
  91
  92                 hdd_fault {
  93                         label = "Onboard drive fault";
  94                         gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_LOW>;
  95                 };
  96         };
  97
  98         fsi: gpio-fsi {
  99                 compatible = "fsi-master-gpio", "fsi-master";
 100                 #address-cells = <2>;
 101                 #size-cells = <0>;
 102                 no-gpio-delays;
 103
 104                 trans-gpios = <&gpio ASPEED_GPIO(O, 6) GPIO_ACTIVE_HIGH>;
 105                 enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
 106                 clock-gpios = <&gpio ASPEED_GPIO(G, 0) GPIO_ACTIVE_HIGH>;
 107                 data-gpios = <&gpio ASPEED_GPIO(G, 1) GPIO_ACTIVE_HIGH>;
 108                 mux-gpios = <&gpio ASPEED_GPIO(P, 6) GPIO_ACTIVE_HIGH>;
 109         };
 110
 111         iio-hwmon {
 112                 compatible = "iio-hwmon";
 113                 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
 114                         <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
 115                         <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
 116                         <&adc 13>, <&adc 14>, <&adc 15>;
 117         };
 118
 119         iio-hwmon-battery {
 120                 compatible = "iio-hwmon";
 121                 io-channels = <&adc 12>;
 122         };
 123
 124 };
 125
 126 &fmc {
 127         status = "okay";
 128
 129         flash@0 {
 130                 status = "okay";
 131                 label = "bmc";
 132                 m25p,fast-read;
 133 #include "openbmc-flash-layout.dtsi"
 134         };
 135 };
 136
 137 &spi1 {
 138         status = "okay";
 139         pinctrl-names = "default";
 140         pinctrl-0 = <&pinctrl_spi1_default>;
 141
 142         flash@0 {
 143                 status = "okay";
 144                 label = "pnor";
 145                 m25p,fast-read;
 146         };
 147 };
 148
 149 &spi2 {
 150         status = "okay";
 151         pinctrl-names = "default";
 152         pinctrl-0 = <&pinctrl_spi2ck_default
 153                      &pinctrl_spi2cs0_default
 154                      &pinctrl_spi2cs1_default
 155                      &pinctrl_spi2miso_default
 156                      &pinctrl_spi2mosi_default>;
 157
 158         flash@0 {
 159                 status = "okay";
 160         };
 161 };
 162
 163 &uart1 {
 164         status = "okay";
 165         pinctrl-names = "default";
 166         pinctrl-0 = <&pinctrl_txd1_default
 167                      &pinctrl_rxd1_default>;
 168 };
 169
 170 &lpc_ctrl {
 171         status = "okay";
 172         memory-region = <&flash_memory>;
 173         flash = <&spi1>;
 174 };
 175
 176 &lpc_snoop {
 177         status = "okay";
 178         snoop-ports = <0x80>;
 179 };
 180
 181
 182 &uart5 {
 183         status = "okay";
 184 };
 185
 186 &mac0 {
 187         status = "okay";
 188         pinctrl-names = "default";
 189         pinctrl-0 = <&pinctrl_rmii1_default>;
 190         use-ncsi;
 191 };
 192
 193 &mac1 {
 194         status = "okay";
 195
 196         pinctrl-names = "default";
 197         pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
 198 };
 199
 200 &i2c0 {
 201         status = "okay";
 202
 203         eeprom@50 {
 204                 compatible = "atmel,24c64";
 205                 reg = <0x50>;
 206                 pagesize = <32>;
 207         };
 208
 209         rtc@68 {
 210                 compatible = "nxp,pcf8523";
 211                 reg = <0x68>;
 212         };
 213
 214         ucd90160@64 {
 215                 compatible = "ti,ucd90160";
 216                 reg = <0x64>;
 217         };
 218
 219         /* Power sequencer UCD90160 PMBUS @64h
 220          * FRU AT24C64D @50h
 221          * RTC PCF8523 @68h
 222          * Clock buffer 9DBL04 @6dh
 223          */
 224 };
 225
 226 &i2c1 {
 227         status = "okay";
 228
 229         i2c-switch@71 {
 230                 compatible = "nxp,pca9546";
 231                 reg = <0x71>;
 232                 #address-cells = <1>;
 233                 #size-cells = <0>;
 234
 235                 i2cpcie0: i2c@0 {
 236                         #address-cells = <1>;
 237                         #size-cells = <0>;
 238                         reg = <0>;
 239                 };
 240                 i2cpcie1: i2c@1 {
 241                         #address-cells = <1>;
 242                         #size-cells = <0>;
 243                         reg = <1>;
 244                 };
 245                 i2cpcie2: i2c@2 {
 246                         #address-cells = <1>;
 247                         #size-cells = <0>;
 248                         reg = <2>;
 249                 };
 250                 i2ctpm: i2c@3 {
 251                         #address-cells = <1>;
 252                         #size-cells = <0>;
 253                         reg = <3>;
 254                 };
 255         };
 256
 257         /* MUX1 PCA9546A @71h
 258          *   PCIe 0
 259          *   PCIe 1
 260          *   PCIe 2
 261          *   TPM header
 262          */
 263 };
 264
 265 &i2c2 {
 266         status = "disabled";
 267
 268         /* OCP Mezz Connector A (OOB SMBUS) */
 269 };
 270
 271 &i2c3 {
 272         status = "disabled";
 273
 274         /* OCP Mezz Connector A (PCIe slot SMBUS) */
 275 };
 276
 277 &i2c4 {
 278         status = "okay";
 279
 280         i2c-switch@71 {
 281                 compatible = "nxp,pca9546";
 282                 reg = <0x71>;
 283                 #address-cells = <1>;
 284                 #size-cells = <0>;
 285
 286                 i2cpcie3: i2c@0 {
 287                         #address-cells = <1>;
 288                         #size-cells = <0>;
 289                         reg = <0>;
 290                 };
 291                 i2cpcie4: i2c@1 {
 292                         #address-cells = <1>;
 293                         #size-cells = <0>;
 294                         reg = <1>;
 295                 };
 296         };
 297
 298         /* MUX1 PCA9546A @71h
 299          *   PCIe 3
 300          *   PCIe 4
 301          */
 302 };
 303
 304
 305 &i2c5 {
 306         status = "disabled";
 307
 308         /* CPU0 PRM 0.7V */
 309         /* CPU0 PRM 1.2V CH03 */
 310         /* CPU0 PRM 0.8V */
 311         /* CPU0 PRM 1.2V CH47 */
 312 };
 313
 314 &i2c6 {
 315         status = "disabled";
 316
 317         /* CPU1 PRM 0.7V */
 318         /* CPU1 PRM 1.2V CH03 */
 319         /* CPU1 PRM 0.8V */
 320         /* CPU1 PRM 1.2V CH47 */
 321 };
 322
 323 &i2c7 {
 324         status = "okay";
 325
 326         pca9541a@70 {
 327                 compatible = "nxp,pca9541";
 328                 reg = <0x70>;
 329
 330                 i2c-arb {
 331                         #address-cells = <1>;
 332                         #size-cells = <0>;
 333
 334                         hotswap@54 {
 335                                 compatible = "ti,lm5066i";
 336                                 reg = <0x54>;
 337                         };
 338                 };
 339
 340         };
 341
 342         vrm@64 {
 343                 compatible = "isil,isl68137";
 344                 reg = <0x64>;
 345         };
 346
 347         vrm@40 {
 348                 compatible = "isil,isl68137";
 349                 reg = <0x40>;
 350         };
 351
 352         vrm@60 {
 353                 compatible = "isil,isl68137";
 354                 reg = <0x60>;
 355         };
 356
 357         vrm@43 {
 358                 compatible = "infineon,ir38064";
 359                 reg = <0x43>;
 360         };
 361
 362         vrm@41 {
 363                 compatible = "isil,isl68137";
 364                 reg = <0x41>;
 365         };
 366
 367         /* Master selector PCA9541A @70h (other master: CPU0)
 368          *   LM5066I PMBUS @10h
 369          */
 370
 371         /*
 372          * Brick will be one of these types/addresses.  Depending
 373          * on the board SKU only one is actually present and will successfully
 374          * instantiate while the others will fail the probe operation.
 375          * These are the PVT (and presumably beyond) addresses:
 376          *    12V Quarter Brick DC/DC Converter Q54SJ12050 @6Ah
 377          *    12V Quarter Brick DC/DC Converter Q54SH12050 @30h
 378          */
 379         power-brick@6a {
 380                 compatible = "delta,dps800";
 381                 reg = <0x6a>;
 382         };
 383         power-brick@30 {
 384                 compatible = "delta,dps800";
 385                 reg = <0x30>;
 386         };
 387
 388         /* CPU0 VR ISL68137 0.7V, 0.96V PMBUS @64h */
 389         /* CPU0 VR ISL68137 1.2V CH03 PMBUS @40h */
 390         /* CPU0 VR ISL68137 0.8V PMBUS @60h */
 391         /* CPU0 VR 1.0V IR38064 I2C @11h, PMBUS @43h */
 392         /* CPU0 VR ISL68137 1.2V CH47 PMBUS @41h */
 393         /* Master selector PCA9541A @70h (other master: CPU0)
 394          *   LM5066I PMBUS @10h
 395          */
 396 };
 397
 398 &i2c8 {
 399         status = "okay";
 400
 401         vrm@64 {
 402                 compatible = "isil,isl68137";
 403                 reg = <0x64>;
 404         };
 405
 406         vrm@40 {
 407                 compatible = "isil,isl68137";
 408                 reg = <0x40>;
 409         };
 410
 411         vrm@41 {
 412                 compatible = "isil,isl68137";
 413                 reg = <0x41>;
 414         };
 415
 416         vrm@42 {
 417                 compatible = "infineon,ir38064";
 418                 reg = <0x42>;
 419         };
 420
 421         vrm@60 {
 422                 compatible = "isil,isl68137";
 423                 reg = <0x60>;
 424         };
 425
 426         /* CPU1 VR ISL68137 0.7V, 0.96V PMBUS @64h */
 427         /* CPU1 VR ISL68137 1.2V CH03 PMBUS @40h */
 428         /* CPU1 VR ISL68137 1.2V CH47 PMBUS @41h */
 429         /* CPU1 VR 1.0V IR38064 I2C @12h, PMBUS @42h */
 430         /* CPU1 VR ISL68137 0.8V PMBUS @60h */
 431 };
 432
 433
 434 &i2c9 {
 435         status = "disabled";
 436
 437         /* Fan board */
 438 };
 439
 440 &i2c10 {
 441         status = "disabled";
 442 };
 443
 444 &i2c11 {
 445         status = "disabled";
 446
 447         /* GPU sideband */
 448 };
 449
 450 &i2c12 {
 451         status = "disabled";
 452 };
 453
 454 &i2c13 {
 455         status = "disabled";
 456
 457         /* MUX PI3USB102
 458          *   CPU0 debug
 459          *   CPU1 debug
 460          */
 461 };
 462
 463 &pinctrl {
 464         aspeed,external-nodes = <&gfx &lhc>;
 465
 466         pinctrl_gpioh_unbiased: gpioi_unbiased {
 467                 pins = "A8", "C7", "B7", "A7", "D7", "B6", "A6", "E7";
 468                 bias-disable;
 469         };
 470 };
 471
 472 &gpio {
 473         pinctrl-names = "default";
 474         pinctrl-0 = <&pinctrl_gpioh_unbiased>;
 475
 476         line_iso_u146_en {
 477                 gpio-hog;
 478                 gpios = <ASPEED_GPIO(O, 4) GPIO_ACTIVE_HIGH>;
 479                 output-high;
 480                 line-name = "iso_u164_en";
 481         };
 482
 483         ncsi_mux_en_n {
 484                 gpio-hog;
 485                 gpios = <ASPEED_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
 486                 output-low;
 487                 line-name = "ncsi_mux_en_n";
 488         };
 489
 490         line_bmc_i2c2_sw_rst_n {
 491                 gpio-hog;
 492                 gpios = <ASPEED_GPIO(P, 1) GPIO_ACTIVE_HIGH>;
 493                 output-high;
 494                 line-name = "bmc_i2c2_sw_rst_n";
 495         };
 496
 497         line_bmc_i2c5_sw_rst_n {
 498                 gpio-hog;
 499                 gpios = <ASPEED_GPIO(P, 3) GPIO_ACTIVE_HIGH>;
 500                 output-high;
 501                 line-name = "bmc_i2c5_sw_rst_n";
 502         };
 503 };
 504
 505 &vuart {
 506         status = "okay";
 507 };
 508
 509 &gfx {
 510         status = "okay";
 511 };
 512
 513 &pwm_tacho {
 514         status = "okay";
 515         pinctrl-names = "default";
 516         pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
 517                 &pinctrl_pwm2_default &pinctrl_pwm3_default>;
 518
 519         fan@0 {
 520                 reg = <0x00>;
 521                 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
 522         };
 523
 524         fan@1 {
 525                 reg = <0x01>;
 526                 aspeed,fan-tach-ch = /bits/ 8 <0x01>;
 527         };
 528
 529         fan@2 {
 530                 reg = <0x02>;
 531                 aspeed,fan-tach-ch = /bits/ 8 <0x02>;
 532         };
 533
 534         fan@3 {
 535                 reg = <0x03>;
 536                 aspeed,fan-tach-ch = /bits/ 8 <0x03>;
 537         };
 538 };
 539
 540 &ibt {
 541         status = "okay";
 542 };
 543
 544 #include "ibm-power9-dual.dtsi"