| blob | 56cb10b42ed940dd42b9413cb58dc2c493e4941e |
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Device Tree Source for the r8a77470 SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a77470-cpg-mssr.h>
11 #include <dt-bindings/power/r8a77470-sysc.h>
12 / {
13 compatible = "renesas,r8a77470";
14 #address-cells = <2>;
15 #size-cells = <2>;
17 aliases {
18 i2c0 = &i2c0;
19 i2c1 = &i2c1;
20 i2c2 = &i2c2;
21 i2c3 = &i2c3;
22 i2c4 = &i2c4;
23 };
25 cpus {
26 #address-cells = <1>;
27 #size-cells = <0>;
28 enable-method = "renesas,apmu";
30 cpu0: cpu@0 {
31 device_type = "cpu";
32 compatible = "arm,cortex-a7";
33 reg = <0>;
34 clock-frequency = <1000000000>;
35 clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>;
36 power-domains = <&sysc R8A77470_PD_CA7_CPU0>;
37 next-level-cache = <&L2_CA7>;
38 };
40 cpu1: cpu@1 {
41 device_type = "cpu";
42 compatible = "arm,cortex-a7";
43 reg = <1>;
44 clock-frequency = <1000000000>;
45 clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>;
46 power-domains = <&sysc R8A77470_PD_CA7_CPU1>;
47 next-level-cache = <&L2_CA7>;
48 };
50 L2_CA7: cache-controller-0 {
51 compatible = "cache";
52 cache-unified;
53 cache-level = <2>;
54 power-domains = <&sysc R8A77470_PD_CA7_SCU>;
55 };
56 };
58 /* External root clock */
59 extal_clk: extal {
60 compatible = "fixed-clock";
61 #clock-cells = <0>;
62 /* This value must be overridden by the board. */
63 clock-frequency = <0>;
64 };
66 /* External SCIF clock */
67 scif_clk: scif {
68 compatible = "fixed-clock";
69 #clock-cells = <0>;
70 /* This value must be overridden by the board. */
71 clock-frequency = <0>;
72 };
74 soc {
75 compatible = "simple-bus";
76 interrupt-parent = <&gic>;
78 #address-cells = <2>;
79 #size-cells = <2>;
80 ranges;
82 rwdt: watchdog@e6020000 {
83 compatible = "renesas,r8a77470-wdt",
84 "renesas,rcar-gen2-wdt";
85 reg = <0 0xe6020000 0 0x0c>;
86 clocks = <&cpg CPG_MOD 402>;
87 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
88 resets = <&cpg 402>;
89 status = "disabled";
90 };
92 gpio0: gpio@e6050000 {
93 compatible = "renesas,gpio-r8a77470",
94 "renesas,rcar-gen2-gpio";
95 reg = <0 0xe6050000 0 0x50>;
96 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
97 #gpio-cells = <2>;
98 gpio-controller;
99 gpio-ranges = <&pfc 0 0 23>;
100 #interrupt-cells = <2>;
101 interrupt-controller;
102 clocks = <&cpg CPG_MOD 912>;
103 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
104 resets = <&cpg 912>;
105 };
107 gpio1: gpio@e6051000 {
108 compatible = "renesas,gpio-r8a77470",
109 "renesas,rcar-gen2-gpio";
110 reg = <0 0xe6051000 0 0x50>;
111 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
112 #gpio-cells = <2>;
113 gpio-controller;
114 gpio-ranges = <&pfc 0 32 23>;
115 #interrupt-cells = <2>;
116 interrupt-controller;
117 clocks = <&cpg CPG_MOD 911>;
118 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
119 resets = <&cpg 911>;
120 };
122 gpio2: gpio@e6052000 {
123 compatible = "renesas,gpio-r8a77470",
124 "renesas,rcar-gen2-gpio";
125 reg = <0 0xe6052000 0 0x50>;
126 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
127 #gpio-cells = <2>;
128 gpio-controller;
129 gpio-ranges = <&pfc 0 64 32>;
130 #interrupt-cells = <2>;
131 interrupt-controller;
132 clocks = <&cpg CPG_MOD 910>;
133 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
134 resets = <&cpg 910>;
135 };
137 gpio3: gpio@e6053000 {
138 compatible = "renesas,gpio-r8a77470",
139 "renesas,rcar-gen2-gpio";
140 reg = <0 0xe6053000 0 0x50>;
141 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
142 #gpio-cells = <2>;
143 gpio-controller;
144 gpio-ranges = <&pfc 0 96 30>;
145 gpio-reserved-ranges = <17 10>;
146 #interrupt-cells = <2>;
147 interrupt-controller;
148 clocks = <&cpg CPG_MOD 909>;
149 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
150 resets = <&cpg 909>;
151 };
153 gpio4: gpio@e6054000 {
154 compatible = "renesas,gpio-r8a77470",
155 "renesas,rcar-gen2-gpio";
156 reg = <0 0xe6054000 0 0x50>;
157 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
158 #gpio-cells = <2>;
159 gpio-controller;
160 gpio-ranges = <&pfc 0 128 26>;
161 #interrupt-cells = <2>;
162 interrupt-controller;
163 clocks = <&cpg CPG_MOD 908>;
164 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
165 resets = <&cpg 908>;
166 };
168 gpio5: gpio@e6055000 {
169 compatible = "renesas,gpio-r8a77470",
170 "renesas,rcar-gen2-gpio";
171 reg = <0 0xe6055000 0 0x50>;
172 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
173 #gpio-cells = <2>;
174 gpio-controller;
175 gpio-ranges = <&pfc 0 160 32>;
176 #interrupt-cells = <2>;
177 interrupt-controller;
178 clocks = <&cpg CPG_MOD 907>;
179 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
180 resets = <&cpg 907>;
181 };
183 pfc: pin-controller@e6060000 {
184 compatible = "renesas,pfc-r8a77470";
185 reg = <0 0xe6060000 0 0x118>;
186 };
188 cpg: clock-controller@e6150000 {
189 compatible = "renesas,r8a77470-cpg-mssr";
190 reg = <0 0xe6150000 0 0x1000>;
191 clocks = <&extal_clk>, <&usb_extal_clk>;
192 clock-names = "extal", "usb_extal";
193 #clock-cells = <2>;
194 #power-domain-cells = <0>;
195 #reset-cells = <1>;
196 };
198 apmu@e6151000 {
199 compatible = "renesas,r8a77470-apmu", "renesas,apmu";
200 reg = <0 0xe6151000 0 0x188>;
201 cpus = <&cpu0 &cpu1>;
202 };
204 rst: reset-controller@e6160000 {
205 compatible = "renesas,r8a77470-rst";
206 reg = <0 0xe6160000 0 0x100>;
207 };
209 sysc: system-controller@e6180000 {
210 compatible = "renesas,r8a77470-sysc";
211 reg = <0 0xe6180000 0 0x200>;
212 #power-domain-cells = <1>;
213 };
215 irqc: interrupt-controller@e61c0000 {
216 compatible = "renesas,irqc-r8a77470", "renesas,irqc";
217 #interrupt-cells = <2>;
218 interrupt-controller;
219 reg = <0 0xe61c0000 0 0x200>;
220 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
221 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
222 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
223 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
224 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
225 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
226 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
227 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
228 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
229 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
230 clocks = <&cpg CPG_MOD 407>;
231 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
232 resets = <&cpg 407>;
233 };
235 icram0: sram@e63a0000 {
236 compatible = "mmio-sram";
237 reg = <0 0xe63a0000 0 0x12000>;
238 };
240 icram1: sram@e63c0000 {
241 compatible = "mmio-sram";
242 reg = <0 0xe63c0000 0 0x1000>;
243 #address-cells = <1>;
244 #size-cells = <1>;
245 ranges = <0 0 0xe63c0000 0x1000>;
247 smp-sram@0 {
248 compatible = "renesas,smp-sram";
249 reg = <0 0x100>;
250 };
251 };
253 icram2: sram@e6300000 {
254 compatible = "mmio-sram";
255 reg = <0 0xe6300000 0 0x20000>;
256 };
258 i2c0: i2c@e6508000 {
259 #address-cells = <1>;
260 #size-cells = <0>;
261 compatible = "renesas,i2c-r8a77470",
262 "renesas,rcar-gen2-i2c";
263 reg = <0 0xe6508000 0 0x40>;
264 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
265 clocks = <&cpg CPG_MOD 931>;
266 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
267 resets = <&cpg 931>;
268 i2c-scl-internal-delay-ns = <6>;
269 status = "disabled";
270 };
272 i2c1: i2c@e6518000 {
273 #address-cells = <1>;
274 #size-cells = <0>;
275 compatible = "renesas,i2c-r8a77470",
276 "renesas,rcar-gen2-i2c";
277 reg = <0 0xe6518000 0 0x40>;
278 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
279 clocks = <&cpg CPG_MOD 930>;
280 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
281 resets = <&cpg 930>;
282 i2c-scl-internal-delay-ns = <6>;
283 status = "disabled";
284 };
286 i2c2: i2c@e6530000 {
287 #address-cells = <1>;
288 #size-cells = <0>;
289 compatible = "renesas,i2c-r8a77470",
290 "renesas,rcar-gen2-i2c";
291 reg = <0 0xe6530000 0 0x40>;
292 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
293 clocks = <&cpg CPG_MOD 929>;
294 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
295 resets = <&cpg 929>;
296 i2c-scl-internal-delay-ns = <6>;
297 status = "disabled";
298 };
300 i2c3: i2c@e6540000 {
301 #address-cells = <1>;
302 #size-cells = <0>;
303 compatible = "renesas,i2c-r8a77470",
304 "renesas,rcar-gen2-i2c";
305 reg = <0 0xe6540000 0 0x40>;
306 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
307 clocks = <&cpg CPG_MOD 928>;
308 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
309 resets = <&cpg 928>;
310 i2c-scl-internal-delay-ns = <6>;
311 status = "disabled";
312 };
314 i2c4: i2c@e6520000 {
315 #address-cells = <1>;
316 #size-cells = <0>;
317 compatible = "renesas,i2c-r8a77470",
318 "renesas,rcar-gen2-i2c";
319 reg = <0 0xe6520000 0 0x40>;
320 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
321 clocks = <&cpg CPG_MOD 927>;
322 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
323 resets = <&cpg 927>;
324 i2c-scl-internal-delay-ns = <6>;
325 status = "disabled";
326 };
328 hsusb0: hsusb@e6590000 {
329 compatible = "renesas,usbhs-r8a77470",
330 "renesas,rcar-gen2-usbhs";
331 reg = <0 0xe6590000 0 0x100>;
332 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
333 clocks = <&cpg CPG_MOD 704>;
334 dmas = <&usb_dmac00 0>, <&usb_dmac00 1>,
335 <&usb_dmac10 0>, <&usb_dmac10 1>;
336 dma-names = "ch0", "ch1", "ch2", "ch3";
337 renesas,buswait = <4>;
338 phys = <&usb0 1>;
339 phy-names = "usb";
340 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
341 resets = <&cpg 704>;
342 status = "disabled";
343 };
345 usbphy0: usb-phy@e6590100 {
346 compatible = "renesas,usb-phy-r8a77470",
347 "renesas,rcar-gen2-usb-phy";
348 reg = <0 0xe6590100 0 0x100>;
349 #address-cells = <1>;
350 #size-cells = <0>;
351 clocks = <&cpg CPG_MOD 704>;
352 clock-names = "usbhs";
353 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
354 resets = <&cpg 704>;
355 status = "disabled";
357 usb0: usb-channel@0 {
358 reg = <0>;
359 #phy-cells = <1>;
360 };
361 };
363 hsusb1: hsusb@e6598000 {
364 compatible = "renesas,usbhs-r8a77470",
365 "renesas,rcar-gen2-usbhs";
366 reg = <0 0xe6598000 0 0x100>;
367 interrupts = <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>;
368 clocks = <&cpg CPG_MOD 706>;
369 dmas = <&usb_dmac01 0>, <&usb_dmac01 1>,
370 <&usb_dmac11 0>, <&usb_dmac11 1>;
371 dma-names = "ch0", "ch1", "ch2", "ch3";
372 renesas,buswait = <4>;
373 /* We need to turn on usbphy0 to make usbphy1 to work */
374 phys = <&usb1 1>;
375 phy-names = "usb";
376 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
377 resets = <&cpg 706>;
378 status = "disabled";
379 };
381 usbphy1: usb-phy@e6598100 {
382 compatible = "renesas,usb-phy-r8a77470",
383 "renesas,rcar-gen2-usb-phy";
384 reg = <0 0xe6598100 0 0x100>;
385 #address-cells = <1>;
386 #size-cells = <0>;
387 clocks = <&cpg CPG_MOD 706>;
388 clock-names = "usbhs";
389 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
390 resets = <&cpg 706>;
391 status = "disabled";
393 usb1: usb-channel@0 {
394 reg = <0>;
395 #phy-cells = <1>;
396 };
397 };
399 usb_dmac00: dma-controller@e65a0000 {
400 compatible = "renesas,r8a77470-usb-dmac",
401 "renesas,usb-dmac";
402 reg = <0 0xe65a0000 0 0x100>;
403 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
404 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
405 interrupt-names = "ch0", "ch1";
406 clocks = <&cpg CPG_MOD 330>;
407 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
408 resets = <&cpg 330>;
409 #dma-cells = <1>;
410 dma-channels = <2>;
411 };
413 usb_dmac10: dma-controller@e65b0000 {
414 compatible = "renesas,r8a77470-usb-dmac",
415 "renesas,usb-dmac";
416 reg = <0 0xe65b0000 0 0x100>;
417 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
418 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
419 interrupt-names = "ch0", "ch1";
420 clocks = <&cpg CPG_MOD 331>;
421 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
422 resets = <&cpg 331>;
423 #dma-cells = <1>;
424 dma-channels = <2>;
425 };
427 usb_dmac01: dma-controller@e65a8000 {
428 compatible = "renesas,r8a77470-usb-dmac",
429 "renesas,usb-dmac";
430 reg = <0 0xe65a8000 0 0x100>;
431 interrupts = <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH
432 GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>;
433 interrupt-names = "ch0", "ch1";
434 clocks = <&cpg CPG_MOD 326>;
435 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
436 resets = <&cpg 326>;
437 #dma-cells = <1>;
438 dma-channels = <2>;
439 };
441 usb_dmac11: dma-controller@e65b8000 {
442 compatible = "renesas,r8a77470-usb-dmac",
443 "renesas,usb-dmac";
444 reg = <0 0xe65b8000 0 0x100>;
445 interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH
446 GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>;
447 interrupt-names = "ch0", "ch1";
448 clocks = <&cpg CPG_MOD 327>;
449 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
450 resets = <&cpg 327>;
451 #dma-cells = <1>;
452 dma-channels = <2>;
453 };
455 dmac0: dma-controller@e6700000 {
456 compatible = "renesas,dmac-r8a77470",
457 "renesas,rcar-dmac";
458 reg = <0 0xe6700000 0 0x20000>;
459 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
460 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
461 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
462 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
463 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
464 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
465 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
466 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
467 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
468 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
469 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
470 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
471 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
472 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
473 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
474 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
475 interrupt-names = "error",
476 "ch0", "ch1", "ch2", "ch3",
477 "ch4", "ch5", "ch6", "ch7",
478 "ch8", "ch9", "ch10", "ch11",
479 "ch12", "ch13", "ch14";
480 clocks = <&cpg CPG_MOD 219>;
481 clock-names = "fck";
482 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
483 resets = <&cpg 219>;
484 #dma-cells = <1>;
485 dma-channels = <15>;
486 };
488 dmac1: dma-controller@e6720000 {
489 compatible = "renesas,dmac-r8a77470",
490 "renesas,rcar-dmac";
491 reg = <0 0xe6720000 0 0x20000>;
492 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
493 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
494 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
495 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
496 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
497 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
498 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
499 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
500 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
501 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
502 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
503 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
504 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
505 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
506 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
507 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
508 interrupt-names = "error",
509 "ch0", "ch1", "ch2", "ch3",
510 "ch4", "ch5", "ch6", "ch7",
511 "ch8", "ch9", "ch10", "ch11",
512 "ch12", "ch13", "ch14";
513 clocks = <&cpg CPG_MOD 218>;
514 clock-names = "fck";
515 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
516 resets = <&cpg 218>;
517 #dma-cells = <1>;
518 dma-channels = <15>;
519 };
521 avb: ethernet@e6800000 {
522 compatible = "renesas,etheravb-r8a77470",
523 "renesas,etheravb-rcar-gen2";
524 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
525 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
526 clocks = <&cpg CPG_MOD 812>;
527 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
528 resets = <&cpg 812>;
529 #address-cells = <1>;
530 #size-cells = <0>;
531 status = "disabled";
532 };
534 qspi0: spi@e6b10000 {
535 compatible = "renesas,qspi-r8a77470", "renesas,qspi";
536 reg = <0 0xe6b10000 0 0x2c>;
537 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
538 clocks = <&cpg CPG_MOD 918>;
539 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
540 <&dmac1 0x17>, <&dmac1 0x18>;
541 dma-names = "tx", "rx", "tx", "rx";
542 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
543 num-cs = <1>;
544 #address-cells = <1>;
545 #size-cells = <0>;
546 resets = <&cpg 918>;
547 status = "disabled";
548 };
550 qspi1: spi@ee200000 {
551 compatible = "renesas,qspi-r8a77470", "renesas,qspi";
552 reg = <0 0xee200000 0 0x2c>;
553 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
554 clocks = <&cpg CPG_MOD 917>;
555 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
556 <&dmac1 0xd1>, <&dmac1 0xd2>;
557 dma-names = "tx", "rx", "tx", "rx";
558 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
559 num-cs = <1>;
560 #address-cells = <1>;
561 #size-cells = <0>;
562 resets = <&cpg 917>;
563 status = "disabled";
564 };
566 scif0: serial@e6e60000 {
567 compatible = "renesas,scif-r8a77470",
568 "renesas,rcar-gen2-scif", "renesas,scif";
569 reg = <0 0xe6e60000 0 0x40>;
570 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
571 clocks = <&cpg CPG_MOD 721>,
572 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
573 clock-names = "fck", "brg_int", "scif_clk";
574 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
575 <&dmac1 0x29>, <&dmac1 0x2a>;
576 dma-names = "tx", "rx", "tx", "rx";
577 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
578 resets = <&cpg 721>;
579 status = "disabled";
580 };
582 scif1: serial@e6e68000 {
583 compatible = "renesas,scif-r8a77470",
584 "renesas,rcar-gen2-scif", "renesas,scif";
585 reg = <0 0xe6e68000 0 0x40>;
586 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
587 clocks = <&cpg CPG_MOD 720>,
588 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
589 clock-names = "fck", "brg_int", "scif_clk";
590 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
591 <&dmac1 0x2d>, <&dmac1 0x2e>;
592 dma-names = "tx", "rx", "tx", "rx";
593 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
594 resets = <&cpg 720>;
595 status = "disabled";
596 };
598 scif2: serial@e6e58000 {
599 compatible = "renesas,scif-r8a77470",
600 "renesas,rcar-gen2-scif", "renesas,scif";
601 reg = <0 0xe6e58000 0 0x40>;
602 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
603 clocks = <&cpg CPG_MOD 719>,
604 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
605 clock-names = "fck", "brg_int", "scif_clk";
606 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
607 <&dmac1 0x2b>, <&dmac1 0x2c>;
608 dma-names = "tx", "rx", "tx", "rx";
609 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
610 resets = <&cpg 719>;
611 status = "disabled";
612 };
614 scif3: serial@e6ea8000 {
615 compatible = "renesas,scif-r8a77470",
616 "renesas,rcar-gen2-scif", "renesas,scif";
617 reg = <0 0xe6ea8000 0 0x40>;
618 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
619 clocks = <&cpg CPG_MOD 718>,
620 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
621 clock-names = "fck", "brg_int", "scif_clk";
622 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
623 <&dmac1 0x2f>, <&dmac1 0x30>;
624 dma-names = "tx", "rx", "tx", "rx";
625 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
626 resets = <&cpg 718>;
627 status = "disabled";
628 };
630 scif4: serial@e6ee0000 {
631 compatible = "renesas,scif-r8a77470",
632 "renesas,rcar-gen2-scif", "renesas,scif";
633 reg = <0 0xe6ee0000 0 0x40>;
634 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
635 clocks = <&cpg CPG_MOD 715>,
636 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
637 clock-names = "fck", "brg_int", "scif_clk";
638 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
639 <&dmac1 0xfb>, <&dmac1 0xfc>;
640 dma-names = "tx", "rx", "tx", "rx";
641 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
642 resets = <&cpg 715>;
643 status = "disabled";
644 };
646 scif5: serial@e6ee8000 {
647 compatible = "renesas,scif-r8a77470",
648 "renesas,rcar-gen2-scif", "renesas,scif";
649 reg = <0 0xe6ee8000 0 0x40>;
650 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
651 clocks = <&cpg CPG_MOD 714>,
652 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
653 clock-names = "fck", "brg_int", "scif_clk";
654 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
655 <&dmac1 0xfd>, <&dmac1 0xfe>;
656 dma-names = "tx", "rx", "tx", "rx";
657 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
658 resets = <&cpg 714>;
659 status = "disabled";
660 };
662 hscif0: serial@e62c0000 {
663 compatible = "renesas,hscif-r8a77470",
664 "renesas,rcar-gen2-hscif", "renesas,hscif";
665 reg = <0 0xe62c0000 0 0x60>;
666 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
667 clocks = <&cpg CPG_MOD 717>,
668 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
669 clock-names = "fck", "brg_int", "scif_clk";
670 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
671 <&dmac1 0x39>, <&dmac1 0x3a>;
672 dma-names = "tx", "rx", "tx", "rx";
673 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
674 resets = <&cpg 717>;
675 status = "disabled";
676 };
678 hscif1: serial@e62c8000 {
679 compatible = "renesas,hscif-r8a77470",
680 "renesas,rcar-gen2-hscif", "renesas,hscif";
681 reg = <0 0xe62c8000 0 0x60>;
682 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
683 clocks = <&cpg CPG_MOD 716>,
684 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
685 clock-names = "fck", "brg_int", "scif_clk";
686 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
687 <&dmac1 0x4d>, <&dmac1 0x4e>;
688 dma-names = "tx", "rx", "tx", "rx";
689 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
690 resets = <&cpg 716>;
691 status = "disabled";
692 };
694 hscif2: serial@e62d0000 {
695 compatible = "renesas,hscif-r8a77470",
696 "renesas,rcar-gen2-hscif", "renesas,hscif";
697 reg = <0 0xe62d0000 0 0x60>;
698 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
699 clocks = <&cpg CPG_MOD 713>,
700 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
701 clock-names = "fck", "brg_int", "scif_clk";
702 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
703 <&dmac1 0x3b>, <&dmac1 0x3c>;
704 dma-names = "tx", "rx", "tx", "rx";
705 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
706 resets = <&cpg 713>;
707 status = "disabled";
708 };
710 pwm0: pwm@e6e30000 {
711 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
712 reg = <0 0xe6e30000 0 0x8>;
713 clocks = <&cpg CPG_MOD 523>;
714 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
715 resets = <&cpg 523>;
716 #pwm-cells = <2>;
717 status = "disabled";
718 };
720 pwm1: pwm@e6e31000 {
721 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
722 reg = <0 0xe6e31000 0 0x8>;
723 clocks = <&cpg CPG_MOD 523>;
724 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
725 resets = <&cpg 523>;
726 #pwm-cells = <2>;
727 status = "disabled";
728 };
730 pwm2: pwm@e6e32000 {
731 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
732 reg = <0 0xe6e32000 0 0x8>;
733 clocks = <&cpg CPG_MOD 523>;
734 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
735 resets = <&cpg 523>;
736 #pwm-cells = <2>;
737 status = "disabled";
738 };
740 pwm3: pwm@e6e33000 {
741 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
742 reg = <0 0xe6e33000 0 0x8>;
743 clocks = <&cpg CPG_MOD 523>;
744 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
745 resets = <&cpg 523>;
746 #pwm-cells = <2>;
747 status = "disabled";
748 };
750 pwm4: pwm@e6e34000 {
751 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
752 reg = <0 0xe6e34000 0 0x8>;
753 clocks = <&cpg CPG_MOD 523>;
754 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
755 resets = <&cpg 523>;
756 #pwm-cells = <2>;
757 status = "disabled";
758 };
760 pwm5: pwm@e6e35000 {
761 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
762 reg = <0 0xe6e35000 0 0x8>;
763 clocks = <&cpg CPG_MOD 523>;
764 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
765 resets = <&cpg 523>;
766 #pwm-cells = <2>;
767 status = "disabled";
768 };
770 pwm6: pwm@e6e36000 {
771 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
772 reg = <0 0xe6e36000 0 0x8>;
773 clocks = <&cpg CPG_MOD 523>;
774 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
775 resets = <&cpg 523>;
776 #pwm-cells = <2>;
777 status = "disabled";
778 };
780 vin0: video@e6ef0000 {
781 compatible = "renesas,vin-r8a77470",
782 "renesas,rcar-gen2-vin";
783 reg = <0 0xe6ef0000 0 0x1000>;
784 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
785 clocks = <&cpg CPG_MOD 811>;
786 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
787 resets = <&cpg 811>;
788 status = "disabled";
789 };
791 vin1: video@e6ef1000 {
792 compatible = "renesas,vin-r8a77470",
793 "renesas,rcar-gen2-vin";
794 reg = <0 0xe6ef1000 0 0x1000>;
795 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
796 clocks = <&cpg CPG_MOD 810>;
797 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
798 resets = <&cpg 810>;
799 status = "disabled";
800 };
802 ohci0: usb@ee080000 {
803 compatible = "generic-ohci";
804 reg = <0 0xee080000 0 0x100>;
805 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
806 clocks = <&cpg CPG_MOD 703>;
807 phys = <&usb0 0>, <&usb2_phy0>;
808 phy-names = "usb";
809 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
810 resets = <&cpg 703>;
811 status = "disabled";
812 };
814 ehci0: usb@ee080100 {
815 compatible = "generic-ehci";
816 reg = <0 0xee080100 0 0x100>;
817 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
818 clocks = <&cpg CPG_MOD 703>;
819 phys = <&usb0 0>, <&usb2_phy0>;
820 phy-names = "usb";
821 companion = <&ohci0>;
822 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
823 resets = <&cpg 703>;
824 status = "disabled";
825 };
827 usb2_phy0: usb-phy@ee080200 {
828 compatible = "renesas,usb2-phy-r8a77470";
829 reg = <0 0xee080200 0 0x700>;
830 clocks = <&cpg CPG_MOD 703>;
831 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
832 resets = <&cpg 703>;
833 #phy-cells = <0>;
834 status = "disabled";
835 };
837 ohci1: usb@ee0c0000 {
838 compatible = "generic-ohci";
839 reg = <0 0xee0c0000 0 0x100>;
840 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
841 clocks = <&cpg CPG_MOD 705>;
842 phys = <&usb0 1>, <&usb2_phy1>, <&usb1 0>;
843 phy-names = "usb";
844 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
845 resets = <&cpg 705>;
846 status = "disabled";
847 };
849 ehci1: usb@ee0c0100 {
850 compatible = "generic-ehci";
851 reg = <0 0xee0c0100 0 0x100>;
852 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
853 clocks = <&cpg CPG_MOD 705>;
854 phys = <&usb0 1>, <&usb2_phy1>, <&usb1 0>;
855 phy-names = "usb";
856 companion = <&ohci1>;
857 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
858 resets = <&cpg 705>;
859 status = "disabled";
860 };
862 usb2_phy1: usb-phy@ee0c0200 {
863 compatible = "renesas,usb2-phy-r8a77470";
864 reg = <0 0xee0c0200 0 0x700>;
865 clocks = <&cpg CPG_MOD 705>;
866 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
867 resets = <&cpg 705>;
868 #phy-cells = <0>;
869 status = "disabled";
870 };
872 sdhi0: sd@ee100000 {
873 compatible = "renesas,sdhi-r8a77470",
874 "renesas,rcar-gen2-sdhi";
875 reg = <0 0xee100000 0 0x328>;
876 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
877 clocks = <&cpg CPG_MOD 314>;
878 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
879 <&dmac1 0xcd>, <&dmac1 0xce>;
880 dma-names = "tx", "rx", "tx", "rx";
881 max-frequency = <156000000>;
882 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
883 resets = <&cpg 314>;
884 status = "disabled";
885 };
887 sdhi1: sd@ee300000 {
888 compatible = "renesas,sdhi-mmc-r8a77470";
889 reg = <0 0xee300000 0 0x2000>;
890 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
891 clocks = <&cpg CPG_MOD 313>;
892 max-frequency = <156000000>;
893 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
894 resets = <&cpg 313>;
895 status = "disabled";
896 };
898 sdhi2: sd@ee160000 {
899 compatible = "renesas,sdhi-r8a77470",
900 "renesas,rcar-gen2-sdhi";
901 reg = <0 0xee160000 0 0x328>;
902 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
903 clocks = <&cpg CPG_MOD 312>;
904 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
905 <&dmac1 0xd3>, <&dmac1 0xd4>;
906 dma-names = "tx", "rx", "tx", "rx";
907 max-frequency = <78000000>;
908 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
909 resets = <&cpg 312>;
910 status = "disabled";
911 };
913 gic: interrupt-controller@f1001000 {
914 compatible = "arm,gic-400";
915 #interrupt-cells = <3>;
916 #address-cells = <0>;
917 interrupt-controller;
918 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
919 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
920 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
921 clocks = <&cpg CPG_MOD 408>;
922 clock-names = "clk";
923 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
924 resets = <&cpg 408>;
925 };
927 du: display@feb00000 {
928 compatible = "renesas,du-r8a77470";
929 reg = <0 0xfeb00000 0 0x40000>;
930 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
931 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
932 clocks = <&cpg CPG_MOD 724>,
933 <&cpg CPG_MOD 723>;
934 clock-names = "du.0", "du.1";
935 status = "disabled";
937 ports {
938 #address-cells = <1>;
939 #size-cells = <0>;
941 port@0 {
942 reg = <0>;
943 du_out_rgb0: endpoint {
944 };
945 };
946 port@1 {
947 reg = <1>;
948 du_out_rgb1: endpoint {
949 };
950 };
951 port@2 {
952 reg = <2>;
953 du_out_lvds0: endpoint {
954 };
955 };
956 };
957 };
959 prr: chipid@ff000044 {
960 compatible = "renesas,prr";
961 reg = <0 0xff000044 0 4>;
962 };
964 cmt0: timer@ffca0000 {
965 compatible = "renesas,r8a77470-cmt0",
966 "renesas,rcar-gen2-cmt0";
967 reg = <0 0xffca0000 0 0x1004>;
968 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
969 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
970 clocks = <&cpg CPG_MOD 124>;
971 clock-names = "fck";
972 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
973 resets = <&cpg 124>;
974 status = "disabled";
975 };
977 cmt1: timer@e6130000 {
978 compatible = "renesas,r8a77470-cmt1",
979 "renesas,rcar-gen2-cmt1";
980 reg = <0 0xe6130000 0 0x1004>;
981 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
982 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
983 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
984 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
985 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
986 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
987 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
988 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
989 clocks = <&cpg CPG_MOD 329>;
990 clock-names = "fck";
991 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
992 resets = <&cpg 329>;
993 status = "disabled";
994 };
995 };
997 timer {
998 compatible = "arm,armv7-timer";
999 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1000 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1001 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1002 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1003 };
1005 /* External USB clock - can be overridden by the board */
1006 usb_extal_clk: usb_extal {
1007 compatible = "fixed-clock";
1008 #clock-cells = <0>;
1009 clock-frequency = <48000000>;
1010 };
1011 };