arch/arm/mach-w90x900/gpio.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * linux/arch/arm/mach-w90x900/gpio.c
   4  *
   5  * Generic nuc900 GPIO handling
   6  *
   7  *  Wan ZongShun <mcuos.com@gmail.com>
   8  */
   9
  10 #include <linux/clk.h>
  11 #include <linux/errno.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/irq.h>
  14 #include <linux/debugfs.h>
  15 #include <linux/seq_file.h>
  16 #include <linux/kernel.h>
  17 #include <linux/list.h>
  18 #include <linux/module.h>
  19 #include <linux/io.h>
  20 #include <linux/gpio/driver.h>
  21
  22 #include <mach/hardware.h>
  23
  24 #define GPIO_BASE               (W90X900_VA_GPIO)
  25 #define GPIO_DIR                (0x04)
  26 #define GPIO_OUT                (0x08)
  27 #define GPIO_IN                 (0x0C)
  28 #define GROUPINERV              (0x10)
  29 #define GPIO_GPIO(Nb)           (0x00000001 << (Nb))
  30
  31 #define NUC900_GPIO_CHIP(name, base_gpio, nr_gpio)                      \
  32         {                                                               \
  33                 .chip = {                                               \
  34                         .label            = name,                       \
  35                         .direction_input  = nuc900_dir_input,           \
  36                         .direction_output = nuc900_dir_output,          \
  37                         .get              = nuc900_gpio_get,            \
  38                         .set              = nuc900_gpio_set,            \
  39                         .base             = base_gpio,                  \
  40                         .ngpio            = nr_gpio,                    \
  41                 }                                                       \
  42         }
  43
  44 struct nuc900_gpio_chip {
  45         struct gpio_chip        chip;
  46         void __iomem            *regbase;       /* Base of group register*/
  47         spinlock_t              gpio_lock;
  48 };
  49
  50 static int nuc900_gpio_get(struct gpio_chip *chip, unsigned offset)
  51 {
  52         struct nuc900_gpio_chip *nuc900_gpio = gpiochip_get_data(chip);
  53         void __iomem *pio = nuc900_gpio->regbase + GPIO_IN;
  54         unsigned int regval;
  55
  56         regval = __raw_readl(pio);
  57         regval &= GPIO_GPIO(offset);
  58
  59         return (regval != 0);
  60 }
  61
  62 static void nuc900_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
  63 {
  64         struct nuc900_gpio_chip *nuc900_gpio = gpiochip_get_data(chip);
  65         void __iomem *pio = nuc900_gpio->regbase + GPIO_OUT;
  66         unsigned int regval;
  67         unsigned long flags;
  68
  69         spin_lock_irqsave(&nuc900_gpio->gpio_lock, flags);
  70
  71         regval = __raw_readl(pio);
  72
  73         if (val)
  74                 regval |= GPIO_GPIO(offset);
  75         else
  76                 regval &= ~GPIO_GPIO(offset);
  77
  78         __raw_writel(regval, pio);
  79
  80         spin_unlock_irqrestore(&nuc900_gpio->gpio_lock, flags);
  81 }
  82
  83 static int nuc900_dir_input(struct gpio_chip *chip, unsigned offset)
  84 {
  85         struct nuc900_gpio_chip *nuc900_gpio = gpiochip_get_data(chip);
  86         void __iomem *pio = nuc900_gpio->regbase + GPIO_DIR;
  87         unsigned int regval;
  88         unsigned long flags;
  89
  90         spin_lock_irqsave(&nuc900_gpio->gpio_lock, flags);
  91
  92         regval = __raw_readl(pio);
  93         regval &= ~GPIO_GPIO(offset);
  94         __raw_writel(regval, pio);
  95
  96         spin_unlock_irqrestore(&nuc900_gpio->gpio_lock, flags);
  97
  98         return 0;
  99 }
 100
 101 static int nuc900_dir_output(struct gpio_chip *chip, unsigned offset, int val)
 102 {
 103         struct nuc900_gpio_chip *nuc900_gpio = gpiochip_get_data(chip);
 104         void __iomem *outreg = nuc900_gpio->regbase + GPIO_OUT;
 105         void __iomem *pio = nuc900_gpio->regbase + GPIO_DIR;
 106         unsigned int regval;
 107         unsigned long flags;
 108
 109         spin_lock_irqsave(&nuc900_gpio->gpio_lock, flags);
 110
 111         regval = __raw_readl(pio);
 112         regval |= GPIO_GPIO(offset);
 113         __raw_writel(regval, pio);
 114
 115         regval = __raw_readl(outreg);
 116
 117         if (val)
 118                 regval |= GPIO_GPIO(offset);
 119         else
 120                 regval &= ~GPIO_GPIO(offset);
 121
 122         __raw_writel(regval, outreg);
 123
 124         spin_unlock_irqrestore(&nuc900_gpio->gpio_lock, flags);
 125
 126         return 0;
 127 }
 128
 129 static struct nuc900_gpio_chip nuc900_gpio[] = {
 130         NUC900_GPIO_CHIP("GROUPC", 0, 16),
 131         NUC900_GPIO_CHIP("GROUPD", 16, 10),
 132         NUC900_GPIO_CHIP("GROUPE", 26, 14),
 133         NUC900_GPIO_CHIP("GROUPF", 40, 10),
 134         NUC900_GPIO_CHIP("GROUPG", 50, 17),
 135         NUC900_GPIO_CHIP("GROUPH", 67, 8),
 136         NUC900_GPIO_CHIP("GROUPI", 75, 17),
 137 };
 138
 139 void __init nuc900_init_gpio(int nr_group)
 140 {
 141         unsigned        i;
 142         struct nuc900_gpio_chip *gpio_chip;
 143
 144         for (i = 0; i < nr_group; i++) {
 145                 gpio_chip = &nuc900_gpio[i];
 146                 spin_lock_init(&gpio_chip->gpio_lock);
 147                 gpio_chip->regbase = GPIO_BASE + i * GROUPINERV;
 148                 gpiochip_add_data(&gpio_chip->chip, gpio_chip);
 149         }
 150 }